91 if (
MI->memoperands_empty())
96 EE =
MI->memoperands_end(); MMOI != EE; ++MMOI)
97 if ((*MMOI)->getAlign() < Alignment)
98 Alignment = (*MMOI)->getAlign();
100 unsigned AlignmentHint = 0;
101 if (Alignment >=
Align(16))
103 else if (Alignment >=
Align(8))
105 if (AlignmentHint == 0)
119 .
addReg(
MI->getOperand(3).getReg());
138 void SystemZAsmPrinter::emitCallInformation(CallType CT) {
148 switch (
MI->getOpcode()) {
149 case SystemZ::Return:
154 case SystemZ::Return_XPLINK:
161 case SystemZ::CondReturn:
168 case SystemZ::CondReturn_XPLINK:
177 case SystemZ::CRBReturn:
186 case SystemZ::CGRBReturn:
195 case SystemZ::CIBReturn:
204 case SystemZ::CGIBReturn:
213 case SystemZ::CLRBReturn:
222 case SystemZ::CLGRBReturn:
231 case SystemZ::CLIBReturn:
240 case SystemZ::CLGIBReturn:
249 case SystemZ::CallBRASL_XPLINK64:
252 .addReg(SystemZ::R7D)
253 .addExpr(Lower.getExpr(
MI->getOperand(0),
255 emitCallInformation(CallType::BRASL7);
258 case SystemZ::CallBASR_XPLINK64:
260 .addReg(SystemZ::R7D)
261 .addReg(
MI->getOperand(0).getReg()));
262 emitCallInformation(CallType::BASR76);
265 case SystemZ::CallBASR_STACKEXT:
267 .addReg(SystemZ::R3D)
268 .addReg(
MI->getOperand(0).getReg()));
269 emitCallInformation(CallType::BASR33);
272 case SystemZ::CallBRASL:
278 case SystemZ::CallBASR:
281 .
addReg(
MI->getOperand(0).getReg());
284 case SystemZ::CallJG:
289 case SystemZ::CallBRCL:
296 case SystemZ::CallBR:
298 .
addReg(
MI->getOperand(0).getReg());
301 case SystemZ::CallBCR:
305 .
addReg(
MI->getOperand(2).getReg());
308 case SystemZ::CRBCall:
317 case SystemZ::CGRBCall:
326 case SystemZ::CIBCall:
335 case SystemZ::CGIBCall:
344 case SystemZ::CLRBCall:
353 case SystemZ::CLGRBCall:
362 case SystemZ::CLIBCall:
371 case SystemZ::CLGIBCall:
400 case SystemZ::IILF64:
403 .
addImm(
MI->getOperand(2).getImm());
406 case SystemZ::IIHF64:
409 .
addImm(
MI->getOperand(2).getImm());
412 case SystemZ::RISBHH:
413 case SystemZ::RISBHL:
417 case SystemZ::RISBLH:
418 case SystemZ::RISBLL:
422 case SystemZ::VLVGP32:
437 Lower.lower(
MI, LoweredMI);
442 Lower.lower(
MI, LoweredMI);
447 Lower.lower(
MI, LoweredMI);
452 Lower.lower(
MI, LoweredMI);
487 #define LOWER_LOW(NAME) \
488 case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break
504 #define LOWER_HIGH(NAME) \
505 case SystemZ::NAME##64: LoweredMI = lowerRIHigh(MI, SystemZ::NAME); break
521 case SystemZ::Serialize:
531 case SystemZ::MemBarrier:
539 case SystemZ::Trap: {
552 case SystemZ::CondTrap: {
565 case TargetOpcode::FENTRY_CALL:
566 LowerFENTRY_CALL(*
MI, Lower);
569 case TargetOpcode::STACKMAP:
573 case TargetOpcode::PATCHPOINT:
574 LowerPATCHPOINT(*
MI, Lower);
577 case SystemZ::EXRL_Pseudo: {
578 unsigned TargetInsOpc =
MI->getOperand(0).getImm();
579 Register LenMinus1Reg =
MI->getOperand(1).getReg();
580 Register DestReg =
MI->getOperand(2).getReg();
581 int64_t DestDisp =
MI->getOperand(3).getImm();
583 int64_t SrcDisp =
MI->getOperand(5).getImm();
590 SystemZTargetStreamer::EXRLT2SymMap::iterator
I =
599 MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot));
604 Lower.lower(
MI, LoweredMI);
618 else if (NumBytes < 4) {
620 MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI);
623 else if (NumBytes < 6) {
625 MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0),
634 MCInstBuilder(SystemZ::BRCLAsm).addImm(0).addExpr(Dot), STI);
668 unsigned NumNOPBytes =
MI.getOperand(1).getImm();
675 assert(NumNOPBytes % 2 == 0 &&
"Invalid number of NOP bytes requested!");
678 unsigned ShadowBytes = 0;
682 while (ShadowBytes < NumNOPBytes) {
684 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
685 MII->getOpcode() == TargetOpcode::STACKMAP)
687 ShadowBytes +=
TII->getInstSizeInBytes(*MII);
694 while (ShadowBytes < NumNOPBytes)
710 unsigned EncodedBytes = 0;
713 if (CalleeMO.
isImm()) {
716 unsigned ScratchIdx = -1;
717 unsigned ScratchReg = 0;
719 ScratchIdx = Opers.getNextScratchIdx(ScratchIdx + 1);
720 ScratchReg =
MI.getOperand(ScratchIdx).getReg();
721 }
while (ScratchReg == SystemZ::R0D);
726 .addImm(CallTarget & 0xFFFFFFFF));
728 if (CallTarget >> 32) {
731 .addImm(CallTarget >> 32));
736 .addReg(SystemZ::R14D)
737 .addReg(ScratchReg));
743 .addReg(SystemZ::R14D)
749 unsigned NumBytes = Opers.getNumPatchBytes();
750 assert(NumBytes >= EncodedBytes &&
751 "Patchpoint can't request size less than the length of a call.");
752 assert((NumBytes - EncodedBytes) % 2 == 0 &&
753 "Invalid number of NOP bytes requested!");
754 while (EncodedBytes < NumBytes)
786 const char *ExtraCode,
792 if (ExtraCode[0] ==
'N' && !ExtraCode[1] && MO.
isReg() &&
793 SystemZ::GR128BitRegClass.contains(MO.
getReg()))
800 MCOp = Lower.lowerOperand(MO);
808 const char *ExtraCode,
813 MI->getOperand(OpNo + 2).getReg(), OS);
833 CurrentFnPPA1Sym =
nullptr;
834 CurrentFnEPMarkerSym =
nullptr;
838 static void emitPPA1Flags(std::unique_ptr<MCStreamer> &OutStreamer,
bool VarArg,
840 enum class PPA1Flag1 : uint8_t {
841 DSA64Bit = (0x80 >> 0),
842 VarArg = (0x80 >> 7),
845 enum class PPA1Flag2 : uint8_t {
846 ExternalProcedure = (0x80 >> 0),
847 STACKPROTECTOR = (0x80 >> 3),
850 enum class PPA1Flag3 : uint8_t {
851 FPRMask = (0x80 >> 2),
854 enum class PPA1Flag4 : uint8_t {
855 EPMOffsetPresent = (0x80 >> 0),
856 VRMask = (0x80 >> 2),
857 ProcedureNamePresent = (0x80 >> 7),
862 auto Flags1 = PPA1Flag1(0);
863 auto Flags2 = PPA1Flag2::ExternalProcedure;
864 auto Flags3 = PPA1Flag3(0);
865 auto Flags4 = PPA1Flag4::EPMOffsetPresent | PPA1Flag4::ProcedureNamePresent;
867 Flags1 |= PPA1Flag1::DSA64Bit;
870 Flags1 |= PPA1Flag1::VarArg;
873 Flags2 |= PPA1Flag2::STACKPROTECTOR;
877 Flags3 |= PPA1Flag3::FPRMask;
880 Flags4 |= PPA1Flag4::VRMask;
882 OutStreamer->AddComment(
"PPA1 Flags 1");
883 if ((Flags1 & PPA1Flag1::DSA64Bit) == PPA1Flag1::DSA64Bit)
884 OutStreamer->AddComment(
" Bit 0: 1 = 64-bit DSA");
886 OutStreamer->AddComment(
" Bit 0: 0 = 32-bit DSA");
887 if ((Flags1 & PPA1Flag1::VarArg) == PPA1Flag1::VarArg)
888 OutStreamer->AddComment(
" Bit 7: 1 = Vararg function");
889 OutStreamer->emitInt8(
static_cast<uint8_t
>(Flags1));
891 OutStreamer->AddComment(
"PPA1 Flags 2");
892 if ((Flags2 & PPA1Flag2::ExternalProcedure) == PPA1Flag2::ExternalProcedure)
893 OutStreamer->AddComment(
" Bit 0: 1 = External procedure");
894 if ((Flags2 & PPA1Flag2::STACKPROTECTOR) == PPA1Flag2::STACKPROTECTOR)
895 OutStreamer->AddComment(
" Bit 3: 1 = STACKPROTECT is enabled");
897 OutStreamer->AddComment(
" Bit 3: 0 = STACKPROTECT is not enabled");
898 OutStreamer->emitInt8(
static_cast<uint8_t
>(Flags2));
900 OutStreamer->AddComment(
"PPA1 Flags 3");
901 if ((Flags3 & PPA1Flag3::FPRMask) == PPA1Flag3::FPRMask)
902 OutStreamer->AddComment(
" Bit 2: 1 = FP Reg Mask is in optional area");
903 OutStreamer->emitInt8(
904 static_cast<uint8_t
>(Flags3));
906 OutStreamer->AddComment(
"PPA1 Flags 4");
907 if ((Flags4 & PPA1Flag4::VRMask) == PPA1Flag4::VRMask)
908 OutStreamer->AddComment(
" Bit 2: 1 = Vector Reg Mask is in optional area");
909 OutStreamer->emitInt8(
static_cast<uint8_t
>(
913 void SystemZAsmPrinter::emitPPA1(
MCSymbol *FnEndSym) {
916 const auto TargetHasVector = Subtarget.
hasVector();
928 uint8_t SavedVRMask = 0;
929 int64_t OffsetFPR = 0;
930 int64_t OffsetVR = 0;
931 const int64_t TopOfStack =
938 I &&
E &&
I <=
E; ++
I) {
940 assert(V < 16 &&
"GPR index out of range");
941 SavedGPRMask |= 1 << (15 - V);
944 for (
auto &CS : CSI) {
945 unsigned Reg = CS.getReg();
949 assert(
I < 16 &&
"FPR index out of range");
950 SavedFPRMask |= 1 << (15 -
I);
952 if (Temp < OffsetFPR)
954 }
else if (SystemZ::VR128BitRegClass.
contains(
Reg)) {
955 assert(
I >= 16 &&
I <= 23 &&
"VPR index out of range");
956 unsigned BitNum =
I - 16;
957 SavedVRMask |= 1 << (7 - BitNum);
965 OffsetFPR += (OffsetFPR < 0) ? TopOfStack : 0;
966 OffsetVR += (OffsetVR < 0) ? TopOfStack : 0;
970 uint8_t AllocaReg = ZFL->hasFP(*
MF) ? FrameReg : 0;
971 assert(AllocaReg < 16 &&
"Can't have alloca register larger than 15");
977 uint64_t FPRSaveAreaOffset = OffsetFPR;
978 assert(FPRSaveAreaOffset < 0x10000000 &&
"Offset out of range");
980 FrameAndFPROffset = FPRSaveAreaOffset & 0x0FFFFFFF;
981 FrameAndFPROffset |= FrameReg << 28;
986 if (TargetHasVector && SavedVRMask) {
987 uint64_t VRSaveAreaOffset = OffsetVR;
988 assert(VRSaveAreaOffset < 0x10000000 &&
"Offset out of range");
990 FrameAndVROffset = VRSaveAreaOffset & 0x0FFFFFFF;
991 FrameAndVROffset |= FrameReg << 28;
1006 TargetHasVector && SavedVRMask != 0);
1012 OutStreamer->emitAbsoluteSymbolDiff(FnEndSym, CurrentFnEPMarkerSym, 4);
1022 .
concat(utostr(FrameAndFPROffset >> 28))
1025 .
concat(utostr(FrameAndFPROffset & 0x0FFFFFFF))
1033 if (TargetHasVector && SavedVRMask) {
1040 .
concat(utostr(FrameAndVROffset >> 28))
1043 .
concat(utostr(FrameAndVROffset & 0x0FFFFFFF))
1049 OutStreamer->emitAbsoluteSymbolDiff(CurrentFnEPMarkerSym, CurrentFnPPA1Sym,
1056 if (Subtarget.getTargetTriple().isOSzOS()) {
1064 CurrentFnEPMarkerSym =
1081 uint32_t DSAAndFlags = DSASize & 0xFFFFFFE0;
1082 DSAAndFlags |= Flags;
1085 OutStreamer->AddComment(
"XPLINK Routine Layout Entry");
1087 OutStreamer->AddComment(
"Eyecatcher 0x00C300C500C500");
1088 OutStreamer->emitIntValueInHex(0x00C300C500C500, 7);
1092 OutStreamer->emitAbsoluteSymbolDiff(CurrentFnPPA1Sym, CurrentFnEPMarkerSym,
1098 OutStreamer->AddComment(
" Bit 2: 1 = Uses alloca");
1100 OutStreamer->AddComment(
" Bit 2: 0 = Does not use alloca");