LLVM
15.0.0git
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#include "Target/AArch64/AArch64TargetTransformInfo.h"
Definition at line 41 of file AArch64TargetTransformInfo.h.
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inlineexplicit |
Definition at line 63 of file AArch64TargetTransformInfo.h.
Definition at line 40 of file AArch64TargetTransformInfo.cpp.
References TM.
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Definition at line 337 of file AArch64TargetTransformInfo.h.
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Definition at line 91 of file AArch64TargetTransformInfo.h.
AArch64TTIImpl::TTI::MemCmpExpansionOptions AArch64TTIImpl::enableMemCmpExpansion | ( | bool | OptSize, |
bool | IsZeroCmp | ||
) | const |
Definition at line 2066 of file AArch64TargetTransformInfo.cpp.
References Options, and llvm::ARM_MB::ST.
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Definition at line 320 of file AArch64TargetTransformInfo.h.
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Definition at line 343 of file AArch64TargetTransformInfo.h.
InstructionCost AArch64TTIImpl::getAddressComputationCost | ( | Type * | Ty, |
ScalarEvolution * | SE, | ||
const SCEV * | Ptr | ||
) |
Definition at line 1979 of file AArch64TargetTransformInfo.cpp.
References llvm::Type::isVectorTy().
InstructionCost AArch64TTIImpl::getArithmeticInstrCost | ( | unsigned | Opcode, |
Type * | Ty, | ||
TTI::TargetCostKind | CostKind, | ||
TTI::OperandValueKind | Opd1Info = TTI::OK_AnyValue , |
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TTI::OperandValueKind | Opd2Info = TTI::OK_AnyValue , |
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TTI::OperandValueProperties | Opd1PropInfo = TTI::OP_None , |
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TTI::OperandValueProperties | Opd2PropInfo = TTI::OP_None , |
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ArrayRef< const Value * > | Args = ArrayRef<const Value *>() , |
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const Instruction * | CxtI = nullptr |
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) |
Definition at line 1860 of file AArch64TargetTransformInfo.cpp.
References llvm::MCID::Add, llvm::ISD::ADD, llvm::ISD::AND, llvm::AMDGPU::HSAMD::Kernel::Key::Args, CostKind, DL, llvm::ISD::FADD, llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FNEG, llvm::ISD::FSUB, llvm::Type::getScalarType(), llvm::Type::isFP128Ty(), llvm::Type::isVectorTy(), LLVM_FALLTHROUGH, llvm::AArch64CC::LT, Mul, llvm::ISD::MUL, llvm::ISD::MULHU, llvm::TargetTransformInfo::OK_UniformConstantValue, llvm::TargetTransformInfo::OP_None, llvm::TargetTransformInfo::OP_PowerOf2, llvm::ISD::OR, llvm::ISD::SDIV, llvm::MCID::Select, llvm::ISD::SHL, llvm::ISD::SRA, llvm::ISD::SRL, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::ISD::UDIV, llvm::MVT::v2i64, and llvm::ISD::XOR.
InstructionCost AArch64TTIImpl::getArithmeticReductionCost | ( | unsigned | Opcode, |
VectorType * | Ty, | ||
Optional< FastMathFlags > | FMF, | ||
TTI::TargetCostKind | CostKind | ||
) |
Definition at line 2549 of file AArch64TargetTransformInfo.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, assert(), CostKind, DL, llvm::InstructionCost::getInvalid(), llvm::AArch64CC::LT, llvm::ISD::OR, llvm::TargetTransformInfo::requiresOrderedReduction(), llvm::MVT::v16i8, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, llvm::MVT::v8i8, and llvm::ISD::XOR.
InstructionCost AArch64TTIImpl::getArithmeticReductionCostSVE | ( | unsigned | Opcode, |
VectorType * | ValTy, | ||
TTI::TargetCostKind | CostKind | ||
) |
Definition at line 2523 of file AArch64TargetTransformInfo.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, assert(), CostKind, DL, llvm::ISD::FADD, llvm::Type::getContext(), llvm::InstructionCost::getInvalid(), llvm::EVT::getTypeForEVT(), llvm::AArch64CC::LT, llvm::ISD::OR, and llvm::ISD::XOR.
InstructionCost AArch64TTIImpl::getCastInstrCost | ( | unsigned | Opcode, |
Type * | Dst, | ||
Type * | Src, | ||
TTI::CastContextHint | CCH, | ||
TTI::TargetCostKind | CostKind, | ||
const Instruction * | I = nullptr |
||
) |
Definition at line 1445 of file AArch64TargetTransformInfo.cpp.
References assert(), llvm::ISD::BITCAST, CostKind, DL, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, I, llvm::EVT::isSimple(), llvm::MVT::nxv16i1, llvm::MVT::nxv16i8, llvm::MVT::nxv2f16, llvm::MVT::nxv2f32, llvm::MVT::nxv2f64, llvm::MVT::nxv2i1, llvm::MVT::nxv2i16, llvm::MVT::nxv2i32, llvm::MVT::nxv2i64, llvm::MVT::nxv2i8, llvm::MVT::nxv4f16, llvm::MVT::nxv4f32, llvm::MVT::nxv4f64, llvm::MVT::nxv4i1, llvm::MVT::nxv4i16, llvm::MVT::nxv4i32, llvm::MVT::nxv4i64, llvm::MVT::nxv4i8, llvm::MVT::nxv8f16, llvm::MVT::nxv8f32, llvm::MVT::nxv8f64, llvm::MVT::nxv8i1, llvm::MVT::nxv8i16, llvm::MVT::nxv8i32, llvm::MVT::nxv8i64, llvm::MVT::nxv8i8, Operands, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::MVT::v16f32, llvm::MVT::v16i16, llvm::MVT::v16i32, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i16, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v2i8, llvm::MVT::v4f32, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v4i64, llvm::MVT::v4i8, llvm::MVT::v8f32, llvm::MVT::v8i16, llvm::MVT::v8i32, llvm::MVT::v8i64, llvm::MVT::v8i8, and llvm::ISD::ZERO_EXTEND.
InstructionCost AArch64TTIImpl::getCFInstrCost | ( | unsigned | Opcode, |
TTI::TargetCostKind | CostKind, | ||
const Instruction * | I = nullptr |
||
) |
Definition at line 1822 of file AArch64TargetTransformInfo.cpp.
References assert(), CostKind, and llvm::TargetTransformInfo::TCK_RecipThroughput.
InstructionCost AArch64TTIImpl::getCmpSelInstrCost | ( | unsigned | Opcode, |
Type * | ValTy, | ||
Type * | CondTy, | ||
CmpInst::Predicate | VecPred, | ||
TTI::TargetCostKind | CostKind, | ||
const Instruction * | I = nullptr |
||
) |
Definition at line 1998 of file AArch64TargetTransformInfo.cpp.
References llvm::any_of(), llvm::CmpInst::BAD_ICMP_PREDICATE, CostKind, DL, llvm::CmpInst::FCMP_OEQ, llvm::CmpInst::FCMP_OGE, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::CmpInst::FCMP_OLT, llvm::CmpInst::FCMP_UNE, I, llvm::CmpInst::isIntPredicate(), llvm::EVT::isSimple(), llvm::AArch64CC::LT, M, llvm::PatternMatch::m_Cmp(), llvm::PatternMatch::m_Select(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::match(), llvm::ISD::SELECT, llvm::ARM_MB::ST, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::MVT::v16i1, llvm::MVT::v16i16, llvm::MVT::v16i32, llvm::MVT::v16i64, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4f16, llvm::MVT::v4f32, llvm::MVT::v4i1, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v4i64, llvm::MVT::v8f16, llvm::MVT::v8i1, llvm::MVT::v8i16, llvm::MVT::v8i32, llvm::MVT::v8i64, and llvm::MVT::v8i8.
InstructionCost AArch64TTIImpl::getCostOfKeepingLiveOverCall | ( | ArrayRef< Type * > | Tys | ) |
Definition at line 2228 of file AArch64TargetTransformInfo.cpp.
References Align, CostKind, I, llvm::SPII::Load, llvm::SPII::Store, and llvm::TargetTransformInfo::TCK_RecipThroughput.
InstructionCost AArch64TTIImpl::getExtractWithExtendCost | ( | unsigned | Opcode, |
Type * | Dst, | ||
VectorType * | VecTy, | ||
unsigned | Index | ||
) |
Definition at line 1761 of file AArch64TargetTransformInfo.cpp.
References assert(), CostKind, DL, llvm::VectorType::getElementType(), llvm_unreachable, llvm::TargetTransformInfo::None, and llvm::TargetTransformInfo::TCK_RecipThroughput.
InstructionCost AArch64TTIImpl::getGatherScatterOpCost | ( | unsigned | Opcode, |
Type * | DataTy, | ||
const Value * | Ptr, | ||
bool | VariableMask, | ||
Align | Alignment, | ||
TTI::TargetCostKind | CostKind, | ||
const Instruction * | I = nullptr |
||
) |
Definition at line 2112 of file AArch64TargetTransformInfo.cpp.
References CostKind, DL, llvm::InstructionCost::getInvalid(), llvm::LinearPolySize< ElementCount >::getScalable(), getSVEGatherScatterOverhead(), I, and llvm::AArch64CC::LT.
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Definition at line 333 of file AArch64TargetTransformInfo.h.
InstructionCost AArch64TTIImpl::getInterleavedMemoryOpCost | ( | unsigned | Opcode, |
Type * | VecTy, | ||
unsigned | Factor, | ||
ArrayRef< unsigned > | Indices, | ||
Align | Alignment, | ||
unsigned | AddressSpace, | ||
TTI::TargetCostKind | CostKind, | ||
bool | UseMaskForCond = false , |
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bool | UseMaskForGaps = false |
||
) |
Definition at line 2200 of file AArch64TargetTransformInfo.cpp.
References assert(), CostKind, DL, llvm::FixedVectorType::get(), and llvm::Type::getScalarType().
InstructionCost AArch64TTIImpl::getIntImmCost | ( | const APInt & | Imm, |
Type * | Ty, | ||
TTI::TargetCostKind | CostKind | ||
) |
Calculate the cost of materializing the given constant.
Definition at line 78 of file AArch64TargetTransformInfo.cpp.
References llvm::APInt::ashr(), assert(), llvm::Type::getPrimitiveSizeInBits(), llvm::APInt::getSExtValue(), llvm::RISCVMatInt::Imm, llvm::Type::isIntegerTy(), and llvm::APInt::sextOrTrunc().
InstructionCost AArch64TTIImpl::getIntImmCost | ( | int64_t | Val | ) |
Calculate the cost of materializing a 64-bit value.
This helper method might only calculate a fraction of a larger immediate. Therefore it is valid to return a cost of ZERO.
Definition at line 63 of file AArch64TargetTransformInfo.cpp.
References llvm::AArch64_IMM::expandMOVImm(), Insn, and llvm::AArch64_AM::isLogicalImmediate().
Referenced by getIntImmCostInst(), and getIntImmCostIntrin().
InstructionCost AArch64TTIImpl::getIntImmCostInst | ( | unsigned | Opcode, |
unsigned | Idx, | ||
const APInt & | Imm, | ||
Type * | Ty, | ||
TTI::TargetCostKind | CostKind, | ||
Instruction * | Inst = nullptr |
||
) |
Definition at line 103 of file AArch64TargetTransformInfo.cpp.
References llvm::MCID::Add, assert(), llvm::MCID::Call, CostKind, getIntImmCost(), llvm::Type::getPrimitiveSizeInBits(), llvm::RISCVMatInt::Imm, llvm::Type::isIntegerTy(), llvm::SPII::Load, Mul, llvm::MipsISD::Ret, llvm::MCID::Select, llvm::SPII::Store, llvm::TargetTransformInfo::TCC_Basic, and llvm::TargetTransformInfo::TCC_Free.
InstructionCost AArch64TTIImpl::getIntImmCostIntrin | ( | Intrinsic::ID | IID, |
unsigned | Idx, | ||
const APInt & | Imm, | ||
Type * | Ty, | ||
TTI::TargetCostKind | CostKind | ||
) |
Definition at line 172 of file AArch64TargetTransformInfo.cpp.
References assert(), CostKind, getIntImmCost(), llvm::Type::getPrimitiveSizeInBits(), llvm::RISCVMatInt::Imm, llvm::Type::isIntegerTy(), llvm::TargetTransformInfo::TCC_Basic, and llvm::TargetTransformInfo::TCC_Free.
InstructionCost AArch64TTIImpl::getIntrinsicInstrCost | ( | const IntrinsicCostAttributes & | ICA, |
TTI::TargetCostKind | CostKind | ||
) |
Definition at line 233 of file AArch64TargetTransformInfo.cpp.
References llvm::abs(), llvm::MCID::Add, llvm::any_of(), CostKind, DL, llvm::IntrinsicCostAttributes::getID(), llvm::IntrinsicCostAttributes::getReturnType(), llvm::EVT::getTypeForEVT(), llvm::MVT::i32, llvm::MVT::i64, llvm::AArch64CC::LT, M, llvm::APIntOps::smax(), llvm::APIntOps::smin(), llvm::APIntOps::umax(), llvm::APIntOps::umin(), llvm::MVT::v16i8, llvm::MVT::v1i64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, and llvm::MVT::v8i8.
InstructionCost AArch64TTIImpl::getMaskedMemoryOpCost | ( | unsigned | Opcode, |
Type * | Src, | ||
Align | Alignment, | ||
unsigned | AddressSpace, | ||
TTI::TargetCostKind | CostKind | ||
) |
Definition at line 2088 of file AArch64TargetTransformInfo.cpp.
References CostKind, DL, llvm::InstructionCost::getInvalid(), llvm::LinearPolySize< ElementCount >::getScalable(), and llvm::AArch64CC::LT.
unsigned AArch64TTIImpl::getMaxInterleaveFactor | ( | unsigned | VF | ) |
Definition at line 2242 of file AArch64TargetTransformInfo.cpp.
References llvm::ARM_MB::ST.
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Try to return an estimate cost factor that can be used as a multiplier when scalarizing an operation for a vector with ElementCount VF
.
For scalable vectors this currently takes the most pessimistic view based upon the maximum possible value for vscale.
Definition at line 144 of file AArch64TargetTransformInfo.h.
References llvm::LinearPolySize< LeafTy >::getFixedValue(), llvm::LinearPolySize< LeafTy >::getKnownMinValue(), and llvm::LinearPolySize< LeafTy >::isScalable().
InstructionCost AArch64TTIImpl::getMemoryOpCost | ( | unsigned | Opcode, |
Type * | Src, | ||
MaybeAlign | Alignment, | ||
unsigned | AddressSpace, | ||
TTI::TargetCostKind | CostKind, | ||
const Instruction * | I = nullptr |
||
) |
Definition at line 2145 of file AArch64TargetTransformInfo.cpp.
References CostKind, DL, llvm::InstructionCost::getInvalid(), llvm::LinearPolySize< ElementCount >::getScalable(), llvm::Type::getScalarSizeInBits(), llvm::AArch64CC::LT, llvm::MVT::Other, llvm::ARM_MB::ST, llvm::SPII::Store, llvm::TargetTransformInfo::TCK_CodeSize, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::TargetTransformInfo::TCK_SizeAndLatency, and llvm::MVT::v4i8.
InstructionCost AArch64TTIImpl::getMinMaxReductionCost | ( | VectorType * | Ty, |
VectorType * | CondTy, | ||
bool | IsUnsigned, | ||
TTI::TargetCostKind | CostKind | ||
) |
Definition at line 2498 of file AArch64TargetTransformInfo.cpp.
References assert(), Attrs, CostKind, DL, llvm::MVT::f16, llvm::Type::getContext(), llvm::EVT::getTypeForEVT(), llvm::Type::isFPOrFPVectorTy(), llvm::AArch64CC::LT, llvm::maxnum(), llvm::APIntOps::smin(), llvm::ARM_MB::ST, and llvm::APIntOps::umin().
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Definition at line 130 of file AArch64TargetTransformInfo.h.
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Definition at line 93 of file AArch64TargetTransformInfo.h.
References Vector.
Value * AArch64TTIImpl::getOrCreateResultFromMemIntrinsic | ( | IntrinsicInst * | Inst, |
Type * | ExpectedType | ||
) |
Definition at line 2359 of file AArch64TargetTransformInfo.cpp.
References llvm::CallBase::arg_size(), Builder, llvm::numbers::e, llvm::UndefValue::get(), llvm::CallBase::getArgOperand(), llvm::IntrinsicInst::getIntrinsicID(), llvm::Value::getType(), i, and llvm::ARM_MB::ST.
void AArch64TTIImpl::getPeelingPreferences | ( | Loop * | L, |
ScalarEvolution & | SE, | ||
TTI::PeelingPreferences & | PP | ||
) |
Definition at line 2354 of file AArch64TargetTransformInfo.cpp.
TargetTransformInfo::PopcntSupportKind AArch64TTIImpl::getPopcntSupport | ( | unsigned | TyWidth | ) |
Definition at line 224 of file AArch64TargetTransformInfo.cpp.
References assert(), llvm::isPowerOf2_32(), llvm::TargetTransformInfo::PSK_FastHardware, and llvm::TargetTransformInfo::PSK_Software.
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Definition at line 115 of file AArch64TargetTransformInfo.h.
References llvm::LinearPolySize< TypeSize >::getFixed(), llvm::LinearPolySize< TypeSize >::getScalable(), llvm_unreachable, llvm::max(), llvm::TargetTransformInfo::RGK_FixedWidthVector, llvm::TargetTransformInfo::RGK_ScalableVector, and llvm::TargetTransformInfo::RGK_Scalar.
InstructionCost AArch64TTIImpl::getShuffleCost | ( | TTI::ShuffleKind | Kind, |
VectorType * | Tp, | ||
ArrayRef< int > | Mask, | ||
int | Index, | ||
VectorType * | SubTp, | ||
ArrayRef< const Value * > | Args = None |
||
) |
Definition at line 2697 of file AArch64TargetTransformInfo.cpp.
References llvm::all_of(), llvm::any_of(), llvm::AMDGPU::HSAMD::Kernel::Key::Args, assert(), DL, E, llvm::enumerate(), llvm::VectorType::get(), llvm::VectorType::getElementCount(), llvm::VectorType::getElementType(), llvm::LinearPolySize< ElementCount >::getFixed(), getPerfectShuffleCost(), llvm::Type::getScalarSizeInBits(), llvm::Type::getScalarType(), llvm::AArch64CC::LT, llvm::BitmaskEnumDetail::Mask(), N, llvm::MVT::nxv16i1, llvm::MVT::nxv16i8, llvm::MVT::nxv2bf16, llvm::MVT::nxv2f16, llvm::MVT::nxv2f32, llvm::MVT::nxv2f64, llvm::MVT::nxv2i1, llvm::MVT::nxv2i64, llvm::MVT::nxv4bf16, llvm::MVT::nxv4f16, llvm::MVT::nxv4f32, llvm::MVT::nxv4i1, llvm::MVT::nxv4i32, llvm::MVT::nxv8bf16, llvm::MVT::nxv8f16, llvm::MVT::nxv8i1, llvm::MVT::nxv8i16, llvm::TargetTransformInfo::SK_Broadcast, llvm::TargetTransformInfo::SK_PermuteSingleSrc, llvm::TargetTransformInfo::SK_PermuteTwoSrc, llvm::TargetTransformInfo::SK_Reverse, llvm::TargetTransformInfo::SK_Select, llvm::TargetTransformInfo::SK_Transpose, llvm::Sched::Source, llvm::UndefMaskElem, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4bf16, llvm::MVT::v4f16, llvm::MVT::v4f32, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8bf16, llvm::MVT::v8f16, llvm::MVT::v8i16, and llvm::MVT::v8i8.
InstructionCost AArch64TTIImpl::getSpliceCost | ( | VectorType * | Tp, |
int | Index | ||
) |
Definition at line 2648 of file AArch64TargetTransformInfo.cpp.
References llvm::CmpInst::BAD_ICMP_PREDICATE, CostKind, DL, llvm::Type::getContext(), llvm::EVT::getTypeForEVT(), llvm::MVT::i1, llvm::AArch64CC::LT, llvm::TargetTransformInfo::None, llvm::MVT::nxv16i8, llvm::MVT::nxv2bf16, llvm::MVT::nxv2f16, llvm::MVT::nxv2f32, llvm::MVT::nxv2f64, llvm::MVT::nxv2i64, llvm::MVT::nxv4bf16, llvm::MVT::nxv4f16, llvm::MVT::nxv4f32, llvm::MVT::nxv4i32, llvm::MVT::nxv8bf16, llvm::MVT::nxv8f16, llvm::MVT::nxv8i16, llvm::MCID::Select, llvm::TargetTransformInfo::SK_Splice, and llvm::TargetTransformInfo::TCK_RecipThroughput.
bool AArch64TTIImpl::getTgtMemIntrinsic | ( | IntrinsicInst * | Inst, |
MemIntrinsicInfo & | Info | ||
) |
Definition at line 2395 of file AArch64TargetTransformInfo.cpp.
References llvm::CallBase::arg_size(), llvm::CallBase::getArgOperand(), llvm::IntrinsicInst::getIntrinsicID(), and Info.
void AArch64TTIImpl::getUnrollingPreferences | ( | Loop * | L, |
ScalarEvolution & | SE, | ||
TTI::UnrollingPreferences & | UP, | ||
OptimizationRemarkEmitter * | ORE | ||
) |
Definition at line 2298 of file AArch64TargetTransformInfo.cpp.
References BB, llvm::TargetTransformInfo::UnrollingPreferences::DefaultUnrollRuntimeCount, EnableFalkorHWPFUnrollFix, F, llvm::AArch64Subtarget::Falkor, llvm::LoopBase< BlockT, LoopT >::getBlocks(), getCalledFunction(), getFalkorUnrollingPreferences(), llvm::LoopBase< BlockT, LoopT >::getLoopDepth(), I, llvm::AArch64Subtarget::Others, llvm::TargetTransformInfo::UnrollingPreferences::Partial, llvm::TargetTransformInfo::UnrollingPreferences::PartialOptSizeThreshold, llvm::TargetTransformInfo::UnrollingPreferences::PartialThreshold, llvm::TargetTransformInfo::UnrollingPreferences::Runtime, llvm::ARM_MB::ST, llvm::TargetTransformInfo::UnrollingPreferences::UnrollAndJam, llvm::TargetTransformInfo::UnrollingPreferences::UnrollAndJamInnerLoopThreshold, llvm::TargetTransformInfo::UnrollingPreferences::UnrollRemainder, and llvm::TargetTransformInfo::UnrollingPreferences::UpperBound.
InstructionCost AArch64TTIImpl::getVectorInstrCost | ( | unsigned | Opcode, |
Type * | Val, | ||
unsigned | Index | ||
) |
Definition at line 1832 of file AArch64TargetTransformInfo.cpp.
References assert(), DL, llvm::Type::isVectorTy(), llvm::AArch64CC::LT, and llvm::ARM_MB::ST.
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Definition at line 134 of file AArch64TargetTransformInfo.h.
Optional< Instruction * > AArch64TTIImpl::instCombineIntrinsic | ( | InstCombiner & | IC, |
IntrinsicInst & | II | ||
) | const |
Definition at line 1274 of file AArch64TargetTransformInfo.cpp.
References DL, llvm::IntrinsicInst::getIntrinsicID(), instCombineConvertFromSVBool(), instCombineLD1GatherIndex(), instCombineMaxMinNM(), instCombineRDFFR(), instCombineST1ScatterIndex(), instCombineSVECmpNE(), instCombineSVECntElts(), instCombineSVEDup(), instCombineSVEDupX(), instCombineSVELast(), instCombineSVELD1(), instCombineSVEPTest(), instCombineSVESDIV(), instCombineSVESel(), instCombineSVESrshl(), instCombineSVEST1(), instCombineSVETBL(), instCombineSVETupleGet(), instCombineSVEUnpack(), instCombineSVEVectorBinOp(), instCombineSVEVectorFAdd(), instCombineSVEVectorMul(), instCombineSVEZip(), and llvm::None.
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Definition at line 229 of file AArch64TargetTransformInfo.h.
References llvm::Type::isBFloatTy(), llvm::Type::isDoubleTy(), llvm::Type::isFloatTy(), llvm::Type::isHalfTy(), llvm::Type::isIntegerTy(), and llvm::Type::isPointerTy().
Referenced by isLegalMaskedGatherScatter(), and isLegalMaskedLoadStore().
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Definition at line 285 of file AArch64TargetTransformInfo.h.
References llvm::LinearPolySize< LeafTy >::getFixedValue(), llvm::Type::getScalarSizeInBits(), llvm::LinearPolySize< LeafTy >::isScalable(), and llvm::SystemZ::VectorBits.
Definition at line 278 of file AArch64TargetTransformInfo.h.
References isLegalMaskedGatherScatter().
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Definition at line 265 of file AArch64TargetTransformInfo.h.
References llvm::Type::getScalarType(), and isElementTypeLegalForScalableVector().
Referenced by isLegalMaskedGather(), and isLegalMaskedScatter().
Definition at line 257 of file AArch64TargetTransformInfo.h.
References isLegalMaskedLoadStore().
Definition at line 246 of file AArch64TargetTransformInfo.h.
References llvm::Type::getScalarType(), and isElementTypeLegalForScalableVector().
Referenced by isLegalMaskedLoad(), and isLegalMaskedStore().
Definition at line 281 of file AArch64TargetTransformInfo.h.
References isLegalMaskedGatherScatter().
Definition at line 261 of file AArch64TargetTransformInfo.h.
References isLegalMaskedLoadStore().
Definition at line 302 of file AArch64TargetTransformInfo.h.
References llvm::TargetTransformInfoImplBase::isLegalNTStore(), and llvm::isPowerOf2_64().
bool AArch64TTIImpl::isLegalToVectorizeReduction | ( | const RecurrenceDescriptor & | RdxDesc, |
ElementCount | VF | ||
) | const |
Definition at line 2467 of file AArch64TargetTransformInfo.cpp.
References llvm::Add, llvm::And, llvm::FAdd, llvm::FMax, llvm::FMin, llvm::FMulAdd, llvm::RecurrenceDescriptor::getRecurrenceKind(), llvm::RecurrenceDescriptor::getRecurrenceType(), llvm::Type::isBFloatTy(), llvm::LinearPolySize< LeafTy >::isScalable(), llvm::Or, llvm::SelectFCmp, llvm::SelectICmp, llvm::SMax, llvm::SMin, llvm::UMax, llvm::UMin, and llvm::Xor.
bool AArch64TTIImpl::prefersVectorizedAddressing | ( | ) | const |
Definition at line 2083 of file AArch64TargetTransformInfo.cpp.
References llvm::ARM_MB::ST.
bool AArch64TTIImpl::shouldConsiderAddressTypePromotion | ( | const Instruction & | I, |
bool & | AllowPromotionWithoutCommonHeader | ||
) |
See if I
should be considered for address type promotion.
We check if I
is a sext with right type and used in memory accesses. If it used in a "complex" getelementptr, we allow it to be promoted without finding other sext instructions that sign extended the same initial value. A getelementptr is considered as "complex" if it has more than 2 operands.
Definition at line 2440 of file AArch64TargetTransformInfo.cpp.
References llvm::Type::getInt64Ty(), and I.
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inline |
Definition at line 331 of file AArch64TargetTransformInfo.h.
bool AArch64TTIImpl::shouldMaximizeVectorBandwidth | ( | TargetTransformInfo::RegisterKind | K | ) | const |
Definition at line 54 of file AArch64TargetTransformInfo.cpp.
References assert(), llvm::TargetTransformInfo::RGK_FixedWidthVector, and llvm::TargetTransformInfo::RGK_Scalar.
Optional< Value * > AArch64TTIImpl::simplifyDemandedVectorEltsIntrinsic | ( | InstCombiner & | IC, |
IntrinsicInst & | II, | ||
APInt | DemandedElts, | ||
APInt & | UndefElts, | ||
APInt & | UndefElts2, | ||
APInt & | UndefElts3, | ||
std::function< void(Instruction *, unsigned, APInt, APInt &)> | SimplifyAndSetOp | ||
) | const |
Definition at line 1347 of file AArch64TargetTransformInfo.cpp.
References llvm::IntrinsicInst::getIntrinsicID(), and llvm::None.
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inline |
Definition at line 341 of file AArch64TargetTransformInfo.h.
Definition at line 2141 of file AArch64TargetTransformInfo.cpp.
References llvm::ARM_MB::ST.