LLVM  14.0.0git
PPCAsmPrinter.cpp
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1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is
11 // the output mechanism used by `llc'.
12 //
13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/
14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
15 //
16 //===----------------------------------------------------------------------===//
17 
19 #include "MCTargetDesc/PPCMCExpr.h"
22 #include "PPC.h"
23 #include "PPCInstrInfo.h"
24 #include "PPCMachineFunctionInfo.h"
25 #include "PPCSubtarget.h"
26 #include "PPCTargetMachine.h"
27 #include "PPCTargetStreamer.h"
29 #include "llvm/ADT/MapVector.h"
30 #include "llvm/ADT/SmallPtrSet.h"
31 #include "llvm/ADT/StringRef.h"
32 #include "llvm/ADT/Triple.h"
33 #include "llvm/ADT/Twine.h"
34 #include "llvm/BinaryFormat/ELF.h"
42 #include "llvm/CodeGen/StackMaps.h"
44 #include "llvm/IR/DataLayout.h"
45 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/GlobalVariable.h"
47 #include "llvm/IR/Module.h"
48 #include "llvm/MC/MCAsmInfo.h"
49 #include "llvm/MC/MCContext.h"
50 #include "llvm/MC/MCDirectives.h"
51 #include "llvm/MC/MCExpr.h"
52 #include "llvm/MC/MCInst.h"
53 #include "llvm/MC/MCInstBuilder.h"
54 #include "llvm/MC/MCSectionELF.h"
55 #include "llvm/MC/MCSectionXCOFF.h"
56 #include "llvm/MC/MCStreamer.h"
57 #include "llvm/MC/MCSymbol.h"
58 #include "llvm/MC/MCSymbolELF.h"
59 #include "llvm/MC/MCSymbolXCOFF.h"
60 #include "llvm/MC/SectionKind.h"
61 #include "llvm/Support/Casting.h"
62 #include "llvm/Support/CodeGen.h"
63 #include "llvm/Support/Debug.h"
64 #include "llvm/Support/Error.h"
66 #include "llvm/Support/Process.h"
71 #include <algorithm>
72 #include <cassert>
73 #include <cstdint>
74 #include <memory>
75 #include <new>
76 
77 using namespace llvm;
78 using namespace llvm::XCOFF;
79 
80 #define DEBUG_TYPE "asmprinter"
81 
83  "aix-ssp-tb-bit", cl::init(false),
84  cl::desc("Enable Passing SSP Canary info in Trackback on AIX"), cl::Hidden);
85 
86 // Specialize DenseMapInfo to allow
87 // std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind> in DenseMap.
88 // This specialization is needed here because that type is used as keys in the
89 // map representing TOC entries.
90 namespace llvm {
91 template <>
92 struct DenseMapInfo<std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>> {
93  using TOCKey = std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>;
94 
95  static inline TOCKey getEmptyKey() {
96  return {nullptr, MCSymbolRefExpr::VariantKind::VK_None};
97  }
98  static inline TOCKey getTombstoneKey() {
99  return {nullptr, MCSymbolRefExpr::VariantKind::VK_Invalid};
100  }
101  static unsigned getHashValue(const TOCKey &PairVal) {
104  DenseMapInfo<int>::getHashValue(PairVal.second));
105  }
106  static bool isEqual(const TOCKey &A, const TOCKey &B) { return A == B; }
107 };
108 } // end namespace llvm
109 
110 namespace {
111 
112 class PPCAsmPrinter : public AsmPrinter {
113 protected:
114  // For TLS on AIX, we need to be able to identify TOC entries of specific
115  // VariantKind so we can add the right relocations when we generate the
116  // entries. So each entry is represented by a pair of MCSymbol and
117  // VariantKind. For example, we need to be able to identify the following
118  // entry as a TLSGD entry so we can add the @m relocation:
119  // .tc .i[TC],i[TL]@m
120  // By default, VK_None is used for the VariantKind.
122  MCSymbol *>
123  TOC;
124  const PPCSubtarget *Subtarget = nullptr;
125  StackMaps SM;
126 
127 public:
128  explicit PPCAsmPrinter(TargetMachine &TM,
129  std::unique_ptr<MCStreamer> Streamer)
130  : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
131 
132  StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
133 
134  MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym,
136  MCSymbolRefExpr::VariantKind::VK_None);
137 
138  bool doInitialization(Module &M) override {
139  if (!TOC.empty())
140  TOC.clear();
142  }
143 
144  void emitInstruction(const MachineInstr *MI) override;
145 
146  /// This function is for PrintAsmOperand and PrintAsmMemoryOperand,
147  /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only.
148  /// The \p MI would be INLINEASM ONLY.
149  void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
150 
151  void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override;
152  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
153  const char *ExtraCode, raw_ostream &O) override;
154  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
155  const char *ExtraCode, raw_ostream &O) override;
156 
157  void emitEndOfAsmFile(Module &M) override;
158 
159  void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
160  void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
161  void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
162  bool runOnMachineFunction(MachineFunction &MF) override {
163  Subtarget = &MF.getSubtarget<PPCSubtarget>();
164  bool Changed = AsmPrinter::runOnMachineFunction(MF);
165  emitXRayTable();
166  return Changed;
167  }
168 };
169 
170 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
171 class PPCLinuxAsmPrinter : public PPCAsmPrinter {
172 public:
173  explicit PPCLinuxAsmPrinter(TargetMachine &TM,
174  std::unique_ptr<MCStreamer> Streamer)
175  : PPCAsmPrinter(TM, std::move(Streamer)) {}
176 
177  StringRef getPassName() const override {
178  return "Linux PPC Assembly Printer";
179  }
180 
181  void emitStartOfAsmFile(Module &M) override;
182  void emitEndOfAsmFile(Module &) override;
183 
184  void emitFunctionEntryLabel() override;
185 
186  void emitFunctionBodyStart() override;
187  void emitFunctionBodyEnd() override;
188  void emitInstruction(const MachineInstr *MI) override;
189 };
190 
191 class PPCAIXAsmPrinter : public PPCAsmPrinter {
192 private:
193  /// Symbols lowered from ExternalSymbolSDNodes, we will need to emit extern
194  /// linkage for them in AIX.
195  SmallPtrSet<MCSymbol *, 8> ExtSymSDNodeSymbols;
196 
197  /// A format indicator and unique trailing identifier to form part of the
198  /// sinit/sterm function names.
199  std::string FormatIndicatorAndUniqueModId;
200 
201  // Record a list of GlobalAlias associated with a GlobalObject.
202  // This is used for AIX's extra-label-at-definition aliasing strategy.
204  GOAliasMap;
205 
206  uint16_t getNumberOfVRSaved();
207  void emitTracebackTable();
208 
209  SmallVector<const GlobalVariable *, 8> TOCDataGlobalVars;
210 
211  void emitGlobalVariableHelper(const GlobalVariable *);
212 
213 public:
214  PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
215  : PPCAsmPrinter(TM, std::move(Streamer)) {
216  if (MAI->isLittleEndian())
218  "cannot create AIX PPC Assembly Printer for a little-endian target");
219  }
220 
221  StringRef getPassName() const override { return "AIX PPC Assembly Printer"; }
222 
223  bool doInitialization(Module &M) override;
224 
225  void emitXXStructorList(const DataLayout &DL, const Constant *List,
226  bool IsCtor) override;
227 
228  void SetupMachineFunction(MachineFunction &MF) override;
229 
230  void emitGlobalVariable(const GlobalVariable *GV) override;
231 
232  void emitFunctionDescriptor() override;
233 
234  void emitFunctionEntryLabel() override;
235 
236  void emitFunctionBodyEnd() override;
237 
238  void emitEndOfAsmFile(Module &) override;
239 
240  void emitLinkage(const GlobalValue *GV, MCSymbol *GVSym) const override;
241 
242  void emitInstruction(const MachineInstr *MI) override;
243 
244  bool doFinalization(Module &M) override;
245 
246  void emitTTypeReference(const GlobalValue *GV, unsigned Encoding) override;
247 };
248 
249 } // end anonymous namespace
250 
251 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
252  raw_ostream &O) {
253  // Computing the address of a global symbol, not calling it.
254  const GlobalValue *GV = MO.getGlobal();
255  getSymbol(GV)->print(O, MAI);
256  printOffset(MO.getOffset(), O);
257 }
258 
259 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
260  raw_ostream &O) {
261  const DataLayout &DL = getDataLayout();
262  const MachineOperand &MO = MI->getOperand(OpNo);
263 
264  switch (MO.getType()) {
266  // The MI is INLINEASM ONLY and UseVSXReg is always false.
267  const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
268 
269  // Linux assembler (Others?) does not take register mnemonics.
270  // FIXME - What about special registers used in mfspr/mtspr?
272  return;
273  }
275  O << MO.getImm();
276  return;
277 
279  MO.getMBB()->getSymbol()->print(O, MAI);
280  return;
282  O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
283  << MO.getIndex();
284  return;
286  GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
287  return;
289  PrintSymbolOperand(MO, O);
290  return;
291  }
292 
293  default:
294  O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
295  return;
296  }
297 }
298 
299 /// PrintAsmOperand - Print out an operand for an inline asm expression.
300 ///
301 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
302  const char *ExtraCode, raw_ostream &O) {
303  // Does this asm operand have a single letter operand modifier?
304  if (ExtraCode && ExtraCode[0]) {
305  if (ExtraCode[1] != 0) return true; // Unknown modifier.
306 
307  switch (ExtraCode[0]) {
308  default:
309  // See if this is a generic print operand
310  return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
311  case 'L': // Write second word of DImode reference.
312  // Verify that this operand has two consecutive registers.
313  if (!MI->getOperand(OpNo).isReg() ||
314  OpNo+1 == MI->getNumOperands() ||
315  !MI->getOperand(OpNo+1).isReg())
316  return true;
317  ++OpNo; // Return the high-part.
318  break;
319  case 'I':
320  // Write 'i' if an integer constant, otherwise nothing. Used to print
321  // addi vs add, etc.
322  if (MI->getOperand(OpNo).isImm())
323  O << "i";
324  return false;
325  case 'x':
326  if(!MI->getOperand(OpNo).isReg())
327  return true;
328  // This operand uses VSX numbering.
329  // If the operand is a VMX register, convert it to a VSX register.
330  Register Reg = MI->getOperand(OpNo).getReg();
332  Reg = PPC::VSX32 + (Reg - PPC::V0);
334  Reg = PPC::VSX32 + (Reg - PPC::VF0);
335  const char *RegName;
338  O << RegName;
339  return false;
340  }
341  }
342 
343  printOperand(MI, OpNo, O);
344  return false;
345 }
346 
347 // At the moment, all inline asm memory operands are a single register.
348 // In any case, the output of this routine should always be just one
349 // assembler operand.
350 
351 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
352  const char *ExtraCode,
353  raw_ostream &O) {
354  if (ExtraCode && ExtraCode[0]) {
355  if (ExtraCode[1] != 0) return true; // Unknown modifier.
356 
357  switch (ExtraCode[0]) {
358  default: return true; // Unknown modifier.
359  case 'L': // A memory reference to the upper word of a double word op.
360  O << getDataLayout().getPointerSize() << "(";
361  printOperand(MI, OpNo, O);
362  O << ")";
363  return false;
364  case 'y': // A memory reference for an X-form instruction
365  O << "0, ";
366  printOperand(MI, OpNo, O);
367  return false;
368  case 'I':
369  // Write 'i' if an integer constant, otherwise nothing. Used to print
370  // addi vs add, etc.
371  if (MI->getOperand(OpNo).isImm())
372  O << "i";
373  return false;
374  case 'U': // Print 'u' for update form.
375  case 'X': // Print 'x' for indexed form.
376  // FIXME: Currently for PowerPC memory operands are always loaded
377  // into a register, so we never get an update or indexed form.
378  // This is bad even for offset forms, since even if we know we
379  // have a value in -16(r1), we will generate a load into r<n>
380  // and then load from 0(r<n>). Until that issue is fixed,
381  // tolerate 'U' and 'X' but don't output anything.
382  assert(MI->getOperand(OpNo).isReg());
383  return false;
384  }
385  }
386 
387  assert(MI->getOperand(OpNo).isReg());
388  O << "0(";
389  printOperand(MI, OpNo, O);
390  O << ")";
391  return false;
392 }
393 
394 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
395 /// exists for it. If not, create one. Then return a symbol that references
396 /// the TOC entry.
397 MCSymbol *
398 PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym,
400  MCSymbol *&TOCEntry = TOC[{Sym, Kind}];
401  if (!TOCEntry)
402  TOCEntry = createTempSymbol("C");
403  return TOCEntry;
404 }
405 
406 void PPCAsmPrinter::emitEndOfAsmFile(Module &M) {
407  emitStackMaps(SM);
408 }
409 
410 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
411  unsigned NumNOPBytes = MI.getOperand(1).getImm();
412 
413  auto &Ctx = OutStreamer->getContext();
414  MCSymbol *MILabel = Ctx.createTempSymbol();
415  OutStreamer->emitLabel(MILabel);
416 
417  SM.recordStackMap(*MILabel, MI);
418  assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
419 
420  // Scan ahead to trim the shadow.
421  const MachineBasicBlock &MBB = *MI.getParent();
423  ++MII;
424  while (NumNOPBytes > 0) {
425  if (MII == MBB.end() || MII->isCall() ||
426  MII->getOpcode() == PPC::DBG_VALUE ||
427  MII->getOpcode() == TargetOpcode::PATCHPOINT ||
428  MII->getOpcode() == TargetOpcode::STACKMAP)
429  break;
430  ++MII;
431  NumNOPBytes -= 4;
432  }
433 
434  // Emit nops.
435  for (unsigned i = 0; i < NumNOPBytes; i += 4)
436  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
437 }
438 
439 // Lower a patchpoint of the form:
440 // [<def>], <id>, <numBytes>, <target>, <numArgs>
441 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
442  auto &Ctx = OutStreamer->getContext();
443  MCSymbol *MILabel = Ctx.createTempSymbol();
444  OutStreamer->emitLabel(MILabel);
445 
446  SM.recordPatchPoint(*MILabel, MI);
447  PatchPointOpers Opers(&MI);
448 
449  unsigned EncodedBytes = 0;
450  const MachineOperand &CalleeMO = Opers.getCallTarget();
451 
452  if (CalleeMO.isImm()) {
453  int64_t CallTarget = CalleeMO.getImm();
454  if (CallTarget) {
455  assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
456  "High 16 bits of call target should be zero.");
457  Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
458  EncodedBytes = 0;
459  // Materialize the jump address:
460  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8)
461  .addReg(ScratchReg)
462  .addImm((CallTarget >> 32) & 0xFFFF));
463  ++EncodedBytes;
464  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC)
465  .addReg(ScratchReg)
466  .addReg(ScratchReg)
467  .addImm(32).addImm(16));
468  ++EncodedBytes;
469  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8)
470  .addReg(ScratchReg)
471  .addReg(ScratchReg)
472  .addImm((CallTarget >> 16) & 0xFFFF));
473  ++EncodedBytes;
474  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8)
475  .addReg(ScratchReg)
476  .addReg(ScratchReg)
477  .addImm(CallTarget & 0xFFFF));
478 
479  // Save the current TOC pointer before the remote call.
480  int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
481  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD)
482  .addReg(PPC::X2)
483  .addImm(TOCSaveOffset)
484  .addReg(PPC::X1));
485  ++EncodedBytes;
486 
487  // If we're on ELFv1, then we need to load the actual function pointer
488  // from the function descriptor.
489  if (!Subtarget->isELFv2ABI()) {
490  // Load the new TOC pointer and the function address, but not r11
491  // (needing this is rare, and loading it here would prevent passing it
492  // via a 'nest' parameter.
493  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
494  .addReg(PPC::X2)
495  .addImm(8)
496  .addReg(ScratchReg));
497  ++EncodedBytes;
498  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
499  .addReg(ScratchReg)
500  .addImm(0)
501  .addReg(ScratchReg));
502  ++EncodedBytes;
503  }
504 
505  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8)
506  .addReg(ScratchReg));
507  ++EncodedBytes;
508  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8));
509  ++EncodedBytes;
510 
511  // Restore the TOC pointer after the call.
512  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
513  .addReg(PPC::X2)
514  .addImm(TOCSaveOffset)
515  .addReg(PPC::X1));
516  ++EncodedBytes;
517  }
518  } else if (CalleeMO.isGlobal()) {
519  const GlobalValue *GValue = CalleeMO.getGlobal();
520  MCSymbol *MOSymbol = getSymbol(GValue);
521  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext);
522 
523  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP)
524  .addExpr(SymVar));
525  EncodedBytes += 2;
526  }
527 
528  // Each instruction is 4 bytes.
529  EncodedBytes *= 4;
530 
531  // Emit padding.
532  unsigned NumBytes = Opers.getNumPatchBytes();
533  assert(NumBytes >= EncodedBytes &&
534  "Patchpoint can't request size less than the length of a call.");
535  assert((NumBytes - EncodedBytes) % 4 == 0 &&
536  "Invalid number of NOP bytes requested!");
537  for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
538  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
539 }
540 
541 /// This helper function creates the TlsGetAddr MCSymbol for AIX. We will
542 /// create the csect and use the qual-name symbol instead of creating just the
543 /// external symbol.
545  return Ctx
546  .getXCOFFSection(".__tls_get_addr", SectionKind::getText(),
548  ->getQualNameSymbol();
549 }
550 
551 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
552 /// call to __tls_get_addr to the current output stream.
553 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
556  unsigned Opcode = PPC::BL8_NOP_TLS;
557 
558  assert(MI->getNumOperands() >= 3 && "Expecting at least 3 operands from MI");
559  if (MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||
560  MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSLD_PCREL_FLAG) {
562  Opcode = PPC::BL8_NOTOC_TLS;
563  }
564  const Module *M = MF->getFunction().getParent();
565 
566  assert(MI->getOperand(0).isReg() &&
567  ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
568  (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
569  "GETtls[ld]ADDR[32] must define GPR3");
570  assert(MI->getOperand(1).isReg() &&
571  ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
572  (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
573  "GETtls[ld]ADDR[32] must read GPR3");
574 
575  if (Subtarget->isAIXABI()) {
576  // On AIX, the variable offset should already be in R4 and the region handle
577  // should already be in R3.
578  // For TLSGD, which currently is the only supported access model, we only
579  // need to generate an absolute branch to .__tls_get_addr.
580  Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4;
581  (void)VarOffsetReg;
582  assert(MI->getOperand(2).isReg() &&
583  MI->getOperand(2).getReg() == VarOffsetReg &&
584  "GETtls[ld]ADDR[32] must read GPR4");
585  MCSymbol *TlsGetAddr = createMCSymbolForTlsGetAddr(OutContext);
586  const MCExpr *TlsRef = MCSymbolRefExpr::create(
587  TlsGetAddr, MCSymbolRefExpr::VK_None, OutContext);
588  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BLA).addExpr(TlsRef));
589  return;
590  }
591 
592  MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol("__tls_get_addr");
593 
594  if (Subtarget->is32BitELFABI() && isPositionIndependent())
596 
597  const MCExpr *TlsRef =
598  MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);
599 
600  // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI.
601  if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() &&
602  M->getPICLevel() == PICLevel::BigPIC)
603  TlsRef = MCBinaryExpr::createAdd(
604  TlsRef, MCConstantExpr::create(32768, OutContext), OutContext);
605  const MachineOperand &MO = MI->getOperand(2);
606  const GlobalValue *GValue = MO.getGlobal();
607  MCSymbol *MOSymbol = getSymbol(GValue);
608  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
609  EmitToStreamer(*OutStreamer,
610  MCInstBuilder(Subtarget->isPPC64() ? Opcode
611  : (unsigned)PPC::BL_TLS)
612  .addExpr(TlsRef)
613  .addExpr(SymVar));
614 }
615 
616 /// Map a machine operand for a TOC pseudo-machine instruction to its
617 /// corresponding MCSymbol.
619  AsmPrinter &AP) {
620  switch (MO.getType()) {
622  return AP.getSymbol(MO.getGlobal());
624  return AP.GetCPISymbol(MO.getIndex());
626  return AP.GetJTISymbol(MO.getIndex());
628  return AP.GetBlockAddressSymbol(MO.getBlockAddress());
629  default:
630  llvm_unreachable("Unexpected operand type to get symbol.");
631  }
632 }
633 
634 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
635 /// the current output stream.
636 ///
637 void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
638  MCInst TmpInst;
639  const bool IsPPC64 = Subtarget->isPPC64();
640  const bool IsAIX = Subtarget->isAIXABI();
641  const Module *M = MF->getFunction().getParent();
642  PICLevel::Level PL = M->getPICLevel();
643 
644 #ifndef NDEBUG
645  // Validate that SPE and FPU are mutually exclusive in codegen
646  if (!MI->isInlineAsm()) {
647  for (const MachineOperand &MO: MI->operands()) {
648  if (MO.isReg()) {
649  Register Reg = MO.getReg();
650  if (Subtarget->hasSPE()) {
651  if (PPC::F4RCRegClass.contains(Reg) ||
652  PPC::F8RCRegClass.contains(Reg) ||
653  PPC::VFRCRegClass.contains(Reg) ||
654  PPC::VRRCRegClass.contains(Reg) ||
655  PPC::VSFRCRegClass.contains(Reg) ||
656  PPC::VSSRCRegClass.contains(Reg)
657  )
658  llvm_unreachable("SPE targets cannot have FPRegs!");
659  } else {
660  if (PPC::SPERCRegClass.contains(Reg))
661  llvm_unreachable("SPE register found in FPU-targeted code!");
662  }
663  }
664  }
665  }
666 #endif
667 
668  auto getTOCRelocAdjustedExprForXCOFF = [this](const MCExpr *Expr,
669  ptrdiff_t OriginalOffset) {
670  // Apply an offset to the TOC-based expression such that the adjusted
671  // notional offset from the TOC base (to be encoded into the instruction's D
672  // or DS field) is the signed 16-bit truncation of the original notional
673  // offset from the TOC base.
674  // This is consistent with the treatment used both by XL C/C++ and
675  // by AIX ld -r.
676  ptrdiff_t Adjustment =
677  OriginalOffset - llvm::SignExtend32<16>(OriginalOffset);
679  Expr, MCConstantExpr::create(-Adjustment, OutContext), OutContext);
680  };
681 
682  auto getTOCEntryLoadingExprForXCOFF =
683  [IsPPC64, getTOCRelocAdjustedExprForXCOFF,
684  this](const MCSymbol *MOSymbol, const MCExpr *Expr,
686  MCSymbolRefExpr::VariantKind::VK_None) -> const MCExpr * {
687  const unsigned EntryByteSize = IsPPC64 ? 8 : 4;
688  const auto TOCEntryIter = TOC.find({MOSymbol, VK});
689  assert(TOCEntryIter != TOC.end() &&
690  "Could not find the TOC entry for this symbol.");
691  const ptrdiff_t EntryDistanceFromTOCBase =
692  (TOCEntryIter - TOC.begin()) * EntryByteSize;
693  constexpr int16_t PositiveTOCRange = INT16_MAX;
694 
695  if (EntryDistanceFromTOCBase > PositiveTOCRange)
696  return getTOCRelocAdjustedExprForXCOFF(Expr, EntryDistanceFromTOCBase);
697 
698  return Expr;
699  };
700  auto GetVKForMO = [&](const MachineOperand &MO) {
701  // For GD TLS access on AIX, we have two TOC entries for the symbol (one for
702  // the variable offset and the other for the region handle). They are
703  // differentiated by MO_TLSGD_FLAG and MO_TLSGDM_FLAG.
705  return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM;
707  return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD;
708  return MCSymbolRefExpr::VariantKind::VK_None;
709  };
710 
711  // Lower multi-instruction pseudo operations.
712  switch (MI->getOpcode()) {
713  default: break;
714  case TargetOpcode::DBG_VALUE:
715  llvm_unreachable("Should be handled target independently");
716  case TargetOpcode::STACKMAP:
717  return LowerSTACKMAP(SM, *MI);
718  case TargetOpcode::PATCHPOINT:
719  return LowerPATCHPOINT(SM, *MI);
720 
721  case PPC::MoveGOTtoLR: {
722  // Transform %lr = MoveGOTtoLR
723  // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
724  // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
725  // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
726  // blrl
727  // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
728  MCSymbol *GOTSymbol =
729  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
730  const MCExpr *OffsExpr =
733  OutContext),
734  MCConstantExpr::create(4, OutContext),
735  OutContext);
736 
737  // Emit the 'bl'.
738  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr));
739  return;
740  }
741  case PPC::MovePCtoLR:
742  case PPC::MovePCtoLR8: {
743  // Transform %lr = MovePCtoLR
744  // Into this, where the label is the PIC base:
745  // bl L1$pb
746  // L1$pb:
747  MCSymbol *PICBase = MF->getPICBaseSymbol();
748 
749  // Emit the 'bl'.
750  EmitToStreamer(*OutStreamer,
752  // FIXME: We would like an efficient form for this, so we
753  // don't have to do a lot of extra uniquing.
754  .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
755 
756  // Emit the label.
757  OutStreamer->emitLabel(PICBase);
758  return;
759  }
760  case PPC::UpdateGBR: {
761  // Transform %rd = UpdateGBR(%rt, %ri)
762  // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
763  // add %rd, %rt, %ri
764  // or into (if secure plt mode is on):
765  // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha
766  // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l
767  // Get the offset from the GOT Base Register to the GOT
768  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
769  if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
770  unsigned PICR = TmpInst.getOperand(0).getReg();
771  MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(
772  M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_"
773  : ".LTOC");
774  const MCExpr *PB =
775  MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext);
776 
777  const MCExpr *DeltaExpr = MCBinaryExpr::createSub(
778  MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext);
779 
780  const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, OutContext);
781  EmitToStreamer(
782  *OutStreamer,
783  MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi));
784 
785  const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, OutContext);
786  EmitToStreamer(
787  *OutStreamer,
788  MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo));
789  return;
790  } else {
791  MCSymbol *PICOffset =
792  MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(*MF);
793  TmpInst.setOpcode(PPC::LWZ);
794  const MCExpr *Exp =
795  MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext);
796  const MCExpr *PB =
797  MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
799  OutContext);
800  const MCOperand TR = TmpInst.getOperand(1);
801  const MCOperand PICR = TmpInst.getOperand(0);
802 
803  // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
804  TmpInst.getOperand(1) =
806  TmpInst.getOperand(0) = TR;
807  TmpInst.getOperand(2) = PICR;
808  EmitToStreamer(*OutStreamer, TmpInst);
809 
810  TmpInst.setOpcode(PPC::ADD4);
811  TmpInst.getOperand(0) = PICR;
812  TmpInst.getOperand(1) = TR;
813  TmpInst.getOperand(2) = PICR;
814  EmitToStreamer(*OutStreamer, TmpInst);
815  return;
816  }
817  }
818  case PPC::LWZtoc: {
819  // Transform %rN = LWZtoc @op1, %r2
820  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
821 
822  // Change the opcode to LWZ.
823  TmpInst.setOpcode(PPC::LWZ);
824 
825  const MachineOperand &MO = MI->getOperand(1);
826  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
827  "Invalid operand for LWZtoc.");
828 
829  // Map the operand to its corresponding MCSymbol.
830  const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
831 
832  // Create a reference to the GOT entry for the symbol. The GOT entry will be
833  // synthesized later.
834  if (PL == PICLevel::SmallPIC && !IsAIX) {
835  const MCExpr *Exp =
837  OutContext);
838  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
839  EmitToStreamer(*OutStreamer, TmpInst);
840  return;
841  }
842 
843  MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
844 
845  // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the
846  // storage allocated in the TOC which contains the address of
847  // 'MOSymbol'. Said TOC entry will be synthesized later.
848  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol, VK);
849  const MCExpr *Exp =
850  MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext);
851 
852  // AIX uses the label directly as the lwz displacement operand for
853  // references into the toc section. The displacement value will be generated
854  // relative to the toc-base.
855  if (IsAIX) {
856  assert(
857  TM.getCodeModel() == CodeModel::Small &&
858  "This pseudo should only be selected for 32-bit small code model.");
859  Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK);
860  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
861 
862  // Print MO for better readability
863  if (isVerbose())
864  OutStreamer->GetCommentOS() << MO << '\n';
865  EmitToStreamer(*OutStreamer, TmpInst);
866  return;
867  }
868 
869  // Create an explicit subtract expression between the local symbol and
870  // '.LTOC' to manifest the toc-relative offset.
872  OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext);
873  Exp = MCBinaryExpr::createSub(Exp, PB, OutContext);
874  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
875  EmitToStreamer(*OutStreamer, TmpInst);
876  return;
877  }
878  case PPC::ADDItoc: {
879  assert(IsAIX && TM.getCodeModel() == CodeModel::Small &&
880  "Operand only valid in AIX 32 bit mode");
881 
882  // Transform %rN = ADDItoc @op1, %r2.
883  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
884 
885  // Change the opcode to load address.
886  TmpInst.setOpcode(PPC::LA);
887 
888  const MachineOperand &MO = MI->getOperand(1);
889  assert(MO.isGlobal() && "Invalid operand for ADDItoc.");
890 
891  // Map the operand to its corresponding MCSymbol.
892  const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
893 
894  const MCExpr *Exp =
895  MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_None, OutContext);
896 
897  TmpInst.getOperand(1) = TmpInst.getOperand(2);
898  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
899  EmitToStreamer(*OutStreamer, TmpInst);
900  return;
901  }
902  case PPC::LDtocJTI:
903  case PPC::LDtocCPT:
904  case PPC::LDtocBA:
905  case PPC::LDtoc: {
906  // Transform %x3 = LDtoc @min1, %x2
907  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
908 
909  // Change the opcode to LD.
910  TmpInst.setOpcode(PPC::LD);
911 
912  const MachineOperand &MO = MI->getOperand(1);
913  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
914  "Invalid operand!");
915 
916  // Map the operand to its corresponding MCSymbol.
917  const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
918 
919  MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
920 
921  // Map the machine operand to its corresponding MCSymbol, then map the
922  // global address operand to be a reference to the TOC entry we will
923  // synthesize later.
924  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol, VK);
925 
928  const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, VKExpr, OutContext);
929  TmpInst.getOperand(1) = MCOperand::createExpr(
930  IsAIX ? getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK) : Exp);
931 
932  // Print MO for better readability
933  if (isVerbose() && IsAIX)
934  OutStreamer->GetCommentOS() << MO << '\n';
935  EmitToStreamer(*OutStreamer, TmpInst);
936  return;
937  }
938  case PPC::ADDIStocHA: {
939  assert((IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large) &&
940  "This pseudo should only be selected for 32-bit large code model on"
941  " AIX.");
942 
943  // Transform %rd = ADDIStocHA %rA, @sym(%r2)
944  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
945 
946  // Change the opcode to ADDIS.
947  TmpInst.setOpcode(PPC::ADDIS);
948 
949  const MachineOperand &MO = MI->getOperand(2);
950  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
951  "Invalid operand for ADDIStocHA.");
952 
953  // Map the machine operand to its corresponding MCSymbol.
954  MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
955 
956  MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
957 
958  // Always use TOC on AIX. Map the global address operand to be a reference
959  // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to
960  // reference the storage allocated in the TOC which contains the address of
961  // 'MOSymbol'.
962  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol, VK);
963  const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry,
965  OutContext);
966  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
967  EmitToStreamer(*OutStreamer, TmpInst);
968  return;
969  }
970  case PPC::LWZtocL: {
971  assert(IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large &&
972  "This pseudo should only be selected for 32-bit large code model on"
973  " AIX.");
974 
975  // Transform %rd = LWZtocL @sym, %rs.
976  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
977 
978  // Change the opcode to lwz.
979  TmpInst.setOpcode(PPC::LWZ);
980 
981  const MachineOperand &MO = MI->getOperand(1);
982  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
983  "Invalid operand for LWZtocL.");
984 
985  // Map the machine operand to its corresponding MCSymbol.
986  MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
987 
988  MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
989 
990  // Always use TOC on AIX. Map the global address operand to be a reference
991  // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to
992  // reference the storage allocated in the TOC which contains the address of
993  // 'MOSymbol'.
994  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol, VK);
995  const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry,
997  OutContext);
998  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
999  EmitToStreamer(*OutStreamer, TmpInst);
1000  return;
1001  }
1002  case PPC::ADDIStocHA8: {
1003  // Transform %xd = ADDIStocHA8 %x2, @sym
1004  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1005 
1006  // Change the opcode to ADDIS8. If the global address is the address of
1007  // an external symbol, is a jump table address, is a block address, or is a
1008  // constant pool index with large code model enabled, then generate a TOC
1009  // entry and reference that. Otherwise, reference the symbol directly.
1010  TmpInst.setOpcode(PPC::ADDIS8);
1011 
1012  const MachineOperand &MO = MI->getOperand(2);
1013  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1014  "Invalid operand for ADDIStocHA8!");
1015 
1016  const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1017 
1018  MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1019 
1020  const bool GlobalToc =
1021  MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal());
1022  if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
1023  (MO.isCPI() && TM.getCodeModel() == CodeModel::Large))
1024  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, VK);
1025 
1027 
1028  const MCExpr *Exp =
1029  MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
1030 
1031  if (!MO.isJTI() && MO.getOffset())
1034  OutContext),
1035  OutContext);
1036 
1037  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
1038  EmitToStreamer(*OutStreamer, TmpInst);
1039  return;
1040  }
1041  case PPC::LDtocL: {
1042  // Transform %xd = LDtocL @sym, %xs
1043  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1044 
1045  // Change the opcode to LD. If the global address is the address of
1046  // an external symbol, is a jump table address, is a block address, or is
1047  // a constant pool index with large code model enabled, then generate a
1048  // TOC entry and reference that. Otherwise, reference the symbol directly.
1049  TmpInst.setOpcode(PPC::LD);
1050 
1051  const MachineOperand &MO = MI->getOperand(1);
1052  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
1053  MO.isBlockAddress()) &&
1054  "Invalid operand for LDtocL!");
1055 
1057  (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1058  "LDtocL used on symbol that could be accessed directly is "
1059  "invalid. Must match ADDIStocHA8."));
1060 
1061  const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1062 
1063  MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1064 
1065  if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large)
1066  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, VK);
1067 
1069  const MCExpr *Exp =
1070  MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
1071  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1072  EmitToStreamer(*OutStreamer, TmpInst);
1073  return;
1074  }
1075  case PPC::ADDItocL: {
1076  // Transform %xd = ADDItocL %xs, @sym
1077  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1078 
1079  // Change the opcode to ADDI8. If the global address is external, then
1080  // generate a TOC entry and reference that. Otherwise, reference the
1081  // symbol directly.
1082  TmpInst.setOpcode(PPC::ADDI8);
1083 
1084  const MachineOperand &MO = MI->getOperand(2);
1085  assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL.");
1086 
1088  !(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1089  "Interposable definitions must use indirect access."));
1090 
1091  const MCExpr *Exp =
1093  MCSymbolRefExpr::VK_PPC_TOC_LO, OutContext);
1094  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
1095  EmitToStreamer(*OutStreamer, TmpInst);
1096  return;
1097  }
1098  case PPC::ADDISgotTprelHA: {
1099  // Transform: %xd = ADDISgotTprelHA %x2, @sym
1100  // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
1101  assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1102  const MachineOperand &MO = MI->getOperand(2);
1103  const GlobalValue *GValue = MO.getGlobal();
1104  MCSymbol *MOSymbol = getSymbol(GValue);
1105  const MCExpr *SymGotTprel =
1107  OutContext);
1108  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1109  .addReg(MI->getOperand(0).getReg())
1110  .addReg(MI->getOperand(1).getReg())
1111  .addExpr(SymGotTprel));
1112  return;
1113  }
1114  case PPC::LDgotTprelL:
1115  case PPC::LDgotTprelL32: {
1116  // Transform %xd = LDgotTprelL @sym, %xs
1117  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1118 
1119  // Change the opcode to LD.
1120  TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ);
1121  const MachineOperand &MO = MI->getOperand(1);
1122  const GlobalValue *GValue = MO.getGlobal();
1123  MCSymbol *MOSymbol = getSymbol(GValue);
1125  MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO
1127  OutContext);
1128  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1129  EmitToStreamer(*OutStreamer, TmpInst);
1130  return;
1131  }
1132 
1133  case PPC::PPC32PICGOT: {
1134  MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
1135  MCSymbol *GOTRef = OutContext.createTempSymbol();
1136  MCSymbol *NextInstr = OutContext.createTempSymbol();
1137 
1138  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
1139  // FIXME: We would like an efficient form for this, so we don't have to do
1140  // a lot of extra uniquing.
1141  .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));
1142  const MCExpr *OffsExpr =
1143  MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),
1144  MCSymbolRefExpr::create(GOTRef, OutContext),
1145  OutContext);
1146  OutStreamer->emitLabel(GOTRef);
1147  OutStreamer->emitValue(OffsExpr, 4);
1148  OutStreamer->emitLabel(NextInstr);
1149  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR)
1150  .addReg(MI->getOperand(0).getReg()));
1151  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ)
1152  .addReg(MI->getOperand(1).getReg())
1153  .addImm(0)
1154  .addReg(MI->getOperand(0).getReg()));
1155  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
1156  .addReg(MI->getOperand(0).getReg())
1157  .addReg(MI->getOperand(1).getReg())
1158  .addReg(MI->getOperand(0).getReg()));
1159  return;
1160  }
1161  case PPC::PPC32GOT: {
1162  MCSymbol *GOTSymbol =
1163  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
1164  const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
1165  GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
1166  const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
1167  GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
1168  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
1169  .addReg(MI->getOperand(0).getReg())
1170  .addExpr(SymGotTlsL));
1171  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1172  .addReg(MI->getOperand(0).getReg())
1173  .addReg(MI->getOperand(0).getReg())
1174  .addExpr(SymGotTlsHA));
1175  return;
1176  }
1177  case PPC::ADDIStlsgdHA: {
1178  // Transform: %xd = ADDIStlsgdHA %x2, @sym
1179  // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
1180  assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1181  const MachineOperand &MO = MI->getOperand(2);
1182  const GlobalValue *GValue = MO.getGlobal();
1183  MCSymbol *MOSymbol = getSymbol(GValue);
1184  const MCExpr *SymGotTlsGD =
1186  OutContext);
1187  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1188  .addReg(MI->getOperand(0).getReg())
1189  .addReg(MI->getOperand(1).getReg())
1190  .addExpr(SymGotTlsGD));
1191  return;
1192  }
1193  case PPC::ADDItlsgdL:
1194  // Transform: %xd = ADDItlsgdL %xs, @sym
1195  // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l
1196  case PPC::ADDItlsgdL32: {
1197  // Transform: %rd = ADDItlsgdL32 %rs, @sym
1198  // Into: %rd = ADDI %rs, sym@got@tlsgd
1199  const MachineOperand &MO = MI->getOperand(2);
1200  const GlobalValue *GValue = MO.getGlobal();
1201  MCSymbol *MOSymbol = getSymbol(GValue);
1202  const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create(
1203  MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
1205  OutContext);
1206  EmitToStreamer(*OutStreamer,
1207  MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1208  .addReg(MI->getOperand(0).getReg())
1209  .addReg(MI->getOperand(1).getReg())
1210  .addExpr(SymGotTlsGD));
1211  return;
1212  }
1213  case PPC::GETtlsADDR:
1214  // Transform: %x3 = GETtlsADDR %x3, @sym
1215  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
1216  case PPC::GETtlsADDRPCREL:
1217  case PPC::GETtlsADDR32AIX:
1218  case PPC::GETtlsADDR64AIX:
1219  // Transform: %r3 = GETtlsADDRNNAIX %r3, %r4 (for NN == 32/64).
1220  // Into: BLA .__tls_get_addr()
1221  // Unlike on Linux, there is no symbol or relocation needed for this call.
1222  case PPC::GETtlsADDR32: {
1223  // Transform: %r3 = GETtlsADDR32 %r3, @sym
1224  // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
1225  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
1226  return;
1227  }
1228  case PPC::ADDIStlsldHA: {
1229  // Transform: %xd = ADDIStlsldHA %x2, @sym
1230  // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha
1231  assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1232  const MachineOperand &MO = MI->getOperand(2);
1233  const GlobalValue *GValue = MO.getGlobal();
1234  MCSymbol *MOSymbol = getSymbol(GValue);
1235  const MCExpr *SymGotTlsLD =
1237  OutContext);
1238  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1239  .addReg(MI->getOperand(0).getReg())
1240  .addReg(MI->getOperand(1).getReg())
1241  .addExpr(SymGotTlsLD));
1242  return;
1243  }
1244  case PPC::ADDItlsldL:
1245  // Transform: %xd = ADDItlsldL %xs, @sym
1246  // Into: %xd = ADDI8 %xs, sym@got@tlsld@l
1247  case PPC::ADDItlsldL32: {
1248  // Transform: %rd = ADDItlsldL32 %rs, @sym
1249  // Into: %rd = ADDI %rs, sym@got@tlsld
1250  const MachineOperand &MO = MI->getOperand(2);
1251  const GlobalValue *GValue = MO.getGlobal();
1252  MCSymbol *MOSymbol = getSymbol(GValue);
1253  const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create(
1254  MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
1256  OutContext);
1257  EmitToStreamer(*OutStreamer,
1258  MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1259  .addReg(MI->getOperand(0).getReg())
1260  .addReg(MI->getOperand(1).getReg())
1261  .addExpr(SymGotTlsLD));
1262  return;
1263  }
1264  case PPC::GETtlsldADDR:
1265  // Transform: %x3 = GETtlsldADDR %x3, @sym
1266  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
1267  case PPC::GETtlsldADDRPCREL:
1268  case PPC::GETtlsldADDR32: {
1269  // Transform: %r3 = GETtlsldADDR32 %r3, @sym
1270  // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
1271  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
1272  return;
1273  }
1274  case PPC::ADDISdtprelHA:
1275  // Transform: %xd = ADDISdtprelHA %xs, @sym
1276  // Into: %xd = ADDIS8 %xs, sym@dtprel@ha
1277  case PPC::ADDISdtprelHA32: {
1278  // Transform: %rd = ADDISdtprelHA32 %rs, @sym
1279  // Into: %rd = ADDIS %rs, sym@dtprel@ha
1280  const MachineOperand &MO = MI->getOperand(2);
1281  const GlobalValue *GValue = MO.getGlobal();
1282  MCSymbol *MOSymbol = getSymbol(GValue);
1283  const MCExpr *SymDtprel =
1285  OutContext);
1286  EmitToStreamer(
1287  *OutStreamer,
1288  MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS)
1289  .addReg(MI->getOperand(0).getReg())
1290  .addReg(MI->getOperand(1).getReg())
1291  .addExpr(SymDtprel));
1292  return;
1293  }
1294  case PPC::PADDIdtprel: {
1295  // Transform: %rd = PADDIdtprel %rs, @sym
1296  // Into: %rd = PADDI8 %rs, sym@dtprel
1297  const MachineOperand &MO = MI->getOperand(2);
1298  const GlobalValue *GValue = MO.getGlobal();
1299  MCSymbol *MOSymbol = getSymbol(GValue);
1300  const MCExpr *SymDtprel = MCSymbolRefExpr::create(
1301  MOSymbol, MCSymbolRefExpr::VK_DTPREL, OutContext);
1302  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::PADDI8)
1303  .addReg(MI->getOperand(0).getReg())
1304  .addReg(MI->getOperand(1).getReg())
1305  .addExpr(SymDtprel));
1306  return;
1307  }
1308 
1309  case PPC::ADDIdtprelL:
1310  // Transform: %xd = ADDIdtprelL %xs, @sym
1311  // Into: %xd = ADDI8 %xs, sym@dtprel@l
1312  case PPC::ADDIdtprelL32: {
1313  // Transform: %rd = ADDIdtprelL32 %rs, @sym
1314  // Into: %rd = ADDI %rs, sym@dtprel@l
1315  const MachineOperand &MO = MI->getOperand(2);
1316  const GlobalValue *GValue = MO.getGlobal();
1317  MCSymbol *MOSymbol = getSymbol(GValue);
1318  const MCExpr *SymDtprel =
1320  OutContext);
1321  EmitToStreamer(*OutStreamer,
1322  MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1323  .addReg(MI->getOperand(0).getReg())
1324  .addReg(MI->getOperand(1).getReg())
1325  .addExpr(SymDtprel));
1326  return;
1327  }
1328  case PPC::MFOCRF:
1329  case PPC::MFOCRF8:
1330  if (!Subtarget->hasMFOCRF()) {
1331  // Transform: %r3 = MFOCRF %cr7
1332  // Into: %r3 = MFCR ;; cr7
1333  unsigned NewOpcode =
1334  MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1335  OutStreamer->AddComment(PPCInstPrinter::
1336  getRegisterName(MI->getOperand(1).getReg()));
1337  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1338  .addReg(MI->getOperand(0).getReg()));
1339  return;
1340  }
1341  break;
1342  case PPC::MTOCRF:
1343  case PPC::MTOCRF8:
1344  if (!Subtarget->hasMFOCRF()) {
1345  // Transform: %cr7 = MTOCRF %r3
1346  // Into: MTCRF mask, %r3 ;; cr7
1347  unsigned NewOpcode =
1348  MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1349  unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1350  ->getEncodingValue(MI->getOperand(0).getReg());
1351  OutStreamer->AddComment(PPCInstPrinter::
1352  getRegisterName(MI->getOperand(0).getReg()));
1353  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1354  .addImm(Mask)
1355  .addReg(MI->getOperand(1).getReg()));
1356  return;
1357  }
1358  break;
1359  case PPC::LD:
1360  case PPC::STD:
1361  case PPC::LWA_32:
1362  case PPC::LWA: {
1363  // Verify alignment is legal, so we don't create relocations
1364  // that can't be supported.
1365  unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1366  const MachineOperand &MO = MI->getOperand(OpNum);
1367  if (MO.isGlobal()) {
1368  const DataLayout &DL = MO.getGlobal()->getParent()->getDataLayout();
1369  if (MO.getGlobal()->getPointerAlignment(DL) < 4)
1370  llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1371  }
1372  // Now process the instruction normally.
1373  break;
1374  }
1375  case PPC::PseudoEIEIO: {
1376  EmitToStreamer(
1377  *OutStreamer,
1378  MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1379  EmitToStreamer(
1380  *OutStreamer,
1381  MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1382  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::EnforceIEIO));
1383  return;
1384  }
1385  }
1386 
1387  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1388  EmitToStreamer(*OutStreamer, TmpInst);
1389 }
1390 
1391 void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
1392  if (!Subtarget->isPPC64())
1393  return PPCAsmPrinter::emitInstruction(MI);
1394 
1395  switch (MI->getOpcode()) {
1396  default:
1397  return PPCAsmPrinter::emitInstruction(MI);
1398  case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
1399  // .begin:
1400  // b .end # lis 0, FuncId[16..32]
1401  // nop # li 0, FuncId[0..15]
1402  // std 0, -8(1)
1403  // mflr 0
1404  // bl __xray_FunctionEntry
1405  // mtlr 0
1406  // .end:
1407  //
1408  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1409  // of instructions change.
1410  MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1411  MCSymbol *EndOfSled = OutContext.createTempSymbol();
1412  OutStreamer->emitLabel(BeginOfSled);
1413  EmitToStreamer(*OutStreamer,
1414  MCInstBuilder(PPC::B).addExpr(
1415  MCSymbolRefExpr::create(EndOfSled, OutContext)));
1416  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1417  EmitToStreamer(
1418  *OutStreamer,
1419  MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1420  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1421  EmitToStreamer(*OutStreamer,
1422  MCInstBuilder(PPC::BL8_NOP)
1423  .addExpr(MCSymbolRefExpr::create(
1424  OutContext.getOrCreateSymbol("__xray_FunctionEntry"),
1425  OutContext)));
1426  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1427  OutStreamer->emitLabel(EndOfSled);
1428  recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER, 2);
1429  break;
1430  }
1431  case TargetOpcode::PATCHABLE_RET: {
1432  unsigned RetOpcode = MI->getOperand(0).getImm();
1433  MCInst RetInst;
1434  RetInst.setOpcode(RetOpcode);
1435  for (const auto &MO : llvm::drop_begin(MI->operands())) {
1436  MCOperand MCOp;
1437  if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this))
1438  RetInst.addOperand(MCOp);
1439  }
1440 
1441  bool IsConditional;
1442  if (RetOpcode == PPC::BCCLR) {
1443  IsConditional = true;
1444  } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||
1445  RetOpcode == PPC::TCRETURNai8) {
1446  break;
1447  } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {
1448  IsConditional = false;
1449  } else {
1450  EmitToStreamer(*OutStreamer, RetInst);
1451  break;
1452  }
1453 
1454  MCSymbol *FallthroughLabel;
1455  if (IsConditional) {
1456  // Before:
1457  // bgtlr cr0
1458  //
1459  // After:
1460  // ble cr0, .end
1461  // .p2align 3
1462  // .begin:
1463  // blr # lis 0, FuncId[16..32]
1464  // nop # li 0, FuncId[0..15]
1465  // std 0, -8(1)
1466  // mflr 0
1467  // bl __xray_FunctionExit
1468  // mtlr 0
1469  // blr
1470  // .end:
1471  //
1472  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1473  // of instructions change.
1474  FallthroughLabel = OutContext.createTempSymbol();
1475  EmitToStreamer(
1476  *OutStreamer,
1477  MCInstBuilder(PPC::BCC)
1478  .addImm(PPC::InvertPredicate(
1479  static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))
1480  .addReg(MI->getOperand(2).getReg())
1481  .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext)));
1482  RetInst = MCInst();
1483  RetInst.setOpcode(PPC::BLR8);
1484  }
1485  // .p2align 3
1486  // .begin:
1487  // b(lr)? # lis 0, FuncId[16..32]
1488  // nop # li 0, FuncId[0..15]
1489  // std 0, -8(1)
1490  // mflr 0
1491  // bl __xray_FunctionExit
1492  // mtlr 0
1493  // b(lr)?
1494  //
1495  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1496  // of instructions change.
1497  OutStreamer->emitCodeAlignment(8, &getSubtargetInfo());
1498  MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1499  OutStreamer->emitLabel(BeginOfSled);
1500  EmitToStreamer(*OutStreamer, RetInst);
1501  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1502  EmitToStreamer(
1503  *OutStreamer,
1504  MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1505  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1506  EmitToStreamer(*OutStreamer,
1507  MCInstBuilder(PPC::BL8_NOP)
1508  .addExpr(MCSymbolRefExpr::create(
1509  OutContext.getOrCreateSymbol("__xray_FunctionExit"),
1510  OutContext)));
1511  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1512  EmitToStreamer(*OutStreamer, RetInst);
1513  if (IsConditional)
1514  OutStreamer->emitLabel(FallthroughLabel);
1515  recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT, 2);
1516  break;
1517  }
1518  case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
1519  llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
1520  case TargetOpcode::PATCHABLE_TAIL_CALL:
1521  // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
1522  // normal function exit from a tail exit.
1523  llvm_unreachable("Tail call is handled in the normal case. See comments "
1524  "around this assert.");
1525  }
1526 }
1527 
1528 void PPCLinuxAsmPrinter::emitStartOfAsmFile(Module &M) {
1529  if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1530  PPCTargetStreamer *TS =
1531  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1532 
1533  if (TS)
1534  TS->emitAbiVersion(2);
1535  }
1536 
1537  if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1538  !isPositionIndependent())
1540 
1541  if (M.getPICLevel() == PICLevel::SmallPIC)
1543 
1544  OutStreamer->SwitchSection(OutContext.getELFSection(
1546 
1547  MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));
1548  MCSymbol *CurrentPos = OutContext.createTempSymbol();
1549 
1550  OutStreamer->emitLabel(CurrentPos);
1551 
1552  // The GOT pointer points to the middle of the GOT, in order to reference the
1553  // entire 64kB range. 0x8000 is the midpoint.
1554  const MCExpr *tocExpr =
1555  MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),
1556  MCConstantExpr::create(0x8000, OutContext),
1557  OutContext);
1558 
1559  OutStreamer->emitAssignment(TOCSym, tocExpr);
1560 
1561  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1562 }
1563 
1564 void PPCLinuxAsmPrinter::emitFunctionEntryLabel() {
1565  // linux/ppc32 - Normal entry label.
1566  if (!Subtarget->isPPC64() &&
1567  (!isPositionIndependent() ||
1568  MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
1570 
1571  if (!Subtarget->isPPC64()) {
1572  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1573  if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {
1574  MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(*MF);
1575  MCSymbol *PICBase = MF->getPICBaseSymbol();
1576  OutStreamer->emitLabel(RelocSymbol);
1577 
1578  const MCExpr *OffsExpr =
1580  MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
1581  OutContext),
1582  MCSymbolRefExpr::create(PICBase, OutContext),
1583  OutContext);
1584  OutStreamer->emitValue(OffsExpr, 4);
1585  OutStreamer->emitLabel(CurrentFnSym);
1586  return;
1587  } else
1589  }
1590 
1591  // ELFv2 ABI - Normal entry label.
1592  if (Subtarget->isELFv2ABI()) {
1593  // In the Large code model, we allow arbitrary displacements between
1594  // the text section and its associated TOC section. We place the
1595  // full 8-byte offset to the TOC in memory immediately preceding
1596  // the function global entry point.
1597  if (TM.getCodeModel() == CodeModel::Large
1598  && !MF->getRegInfo().use_empty(PPC::X2)) {
1599  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1600 
1601  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1602  MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(*MF);
1603  const MCExpr *TOCDeltaExpr =
1604  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1605  MCSymbolRefExpr::create(GlobalEPSymbol,
1606  OutContext),
1607  OutContext);
1608 
1609  OutStreamer->emitLabel(PPCFI->getTOCOffsetSymbol(*MF));
1610  OutStreamer->emitValue(TOCDeltaExpr, 8);
1611  }
1613  }
1614 
1615  // Emit an official procedure descriptor.
1616  MCSectionSubPair Current = OutStreamer->getCurrentSection();
1617  MCSectionELF *Section = OutStreamer->getContext().getELFSection(
1619  OutStreamer->SwitchSection(Section);
1620  OutStreamer->emitLabel(CurrentFnSym);
1621  OutStreamer->emitValueToAlignment(8);
1622  MCSymbol *Symbol1 = CurrentFnSymForSize;
1623  // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
1624  // entry point.
1625  OutStreamer->emitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
1626  8 /*size*/);
1627  MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1628  // Generates a R_PPC64_TOC relocation for TOC base insertion.
1629  OutStreamer->emitValue(
1631  8/*size*/);
1632  // Emit a null environment pointer.
1633  OutStreamer->emitIntValue(0, 8 /* size */);
1634  OutStreamer->SwitchSection(Current.first, Current.second);
1635 }
1636 
1637 void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) {
1638  const DataLayout &DL = getDataLayout();
1639 
1640  bool isPPC64 = DL.getPointerSizeInBits() == 64;
1641 
1642  PPCTargetStreamer *TS =
1643  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1644 
1645  if (!TOC.empty()) {
1646  const char *Name = isPPC64 ? ".toc" : ".got2";
1647  MCSectionELF *Section = OutContext.getELFSection(
1649  OutStreamer->SwitchSection(Section);
1650  if (!isPPC64)
1651  OutStreamer->emitValueToAlignment(4);
1652 
1653  for (const auto &TOCMapPair : TOC) {
1654  const MCSymbol *const TOCEntryTarget = TOCMapPair.first.first;
1655  MCSymbol *const TOCEntryLabel = TOCMapPair.second;
1656 
1657  OutStreamer->emitLabel(TOCEntryLabel);
1658  if (isPPC64 && TS != nullptr)
1659  TS->emitTCEntry(*TOCEntryTarget, TOCMapPair.first.second);
1660  else
1661  OutStreamer->emitSymbolValue(TOCEntryTarget, 4);
1662  }
1663  }
1664 
1665  PPCAsmPrinter::emitEndOfAsmFile(M);
1666 }
1667 
1668 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
1669 void PPCLinuxAsmPrinter::emitFunctionBodyStart() {
1670  // In the ELFv2 ABI, in functions that use the TOC register, we need to
1671  // provide two entry points. The ABI guarantees that when calling the
1672  // local entry point, r2 is set up by the caller to contain the TOC base
1673  // for this function, and when calling the global entry point, r12 is set
1674  // up by the caller to hold the address of the global entry point. We
1675  // thus emit a prefix sequence along the following lines:
1676  //
1677  // func:
1678  // .Lfunc_gepNN:
1679  // # global entry point
1680  // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
1681  // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
1682  // .Lfunc_lepNN:
1683  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1684  // # local entry point, followed by function body
1685  //
1686  // For the Large code model, we create
1687  //
1688  // .Lfunc_tocNN:
1689  // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
1690  // func:
1691  // .Lfunc_gepNN:
1692  // # global entry point
1693  // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
1694  // add r2,r2,r12
1695  // .Lfunc_lepNN:
1696  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1697  // # local entry point, followed by function body
1698  //
1699  // This ensures we have r2 set up correctly while executing the function
1700  // body, no matter which entry point is called.
1701  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1702  const bool UsesX2OrR2 = !MF->getRegInfo().use_empty(PPC::X2) ||
1703  !MF->getRegInfo().use_empty(PPC::R2);
1704  const bool PCrelGEPRequired = Subtarget->isUsingPCRelativeCalls() &&
1705  UsesX2OrR2 && PPCFI->usesTOCBasePtr();
1706  const bool NonPCrelGEPRequired = !Subtarget->isUsingPCRelativeCalls() &&
1707  Subtarget->isELFv2ABI() && UsesX2OrR2;
1708 
1709  // Only do all that if the function uses R2 as the TOC pointer
1710  // in the first place. We don't need the global entry point if the
1711  // function uses R2 as an allocatable register.
1712  if (NonPCrelGEPRequired || PCrelGEPRequired) {
1713  // Note: The logic here must be synchronized with the code in the
1714  // branch-selection pass which sets the offset of the first block in the
1715  // function. This matters because it affects the alignment.
1716  MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(*MF);
1717  OutStreamer->emitLabel(GlobalEntryLabel);
1718  const MCSymbolRefExpr *GlobalEntryLabelExp =
1719  MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);
1720 
1721  if (TM.getCodeModel() != CodeModel::Large) {
1722  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1723  const MCExpr *TOCDeltaExpr =
1724  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1725  GlobalEntryLabelExp, OutContext);
1726 
1727  const MCExpr *TOCDeltaHi = PPCMCExpr::createHa(TOCDeltaExpr, OutContext);
1728  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1729  .addReg(PPC::X2)
1730  .addReg(PPC::X12)
1731  .addExpr(TOCDeltaHi));
1732 
1733  const MCExpr *TOCDeltaLo = PPCMCExpr::createLo(TOCDeltaExpr, OutContext);
1734  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
1735  .addReg(PPC::X2)
1736  .addReg(PPC::X2)
1737  .addExpr(TOCDeltaLo));
1738  } else {
1739  MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(*MF);
1740  const MCExpr *TOCOffsetDeltaExpr =
1741  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),
1742  GlobalEntryLabelExp, OutContext);
1743 
1744  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
1745  .addReg(PPC::X2)
1746  .addExpr(TOCOffsetDeltaExpr)
1747  .addReg(PPC::X12));
1748  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8)
1749  .addReg(PPC::X2)
1750  .addReg(PPC::X2)
1751  .addReg(PPC::X12));
1752  }
1753 
1754  MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(*MF);
1755  OutStreamer->emitLabel(LocalEntryLabel);
1756  const MCSymbolRefExpr *LocalEntryLabelExp =
1757  MCSymbolRefExpr::create(LocalEntryLabel, OutContext);
1758  const MCExpr *LocalOffsetExp =
1759  MCBinaryExpr::createSub(LocalEntryLabelExp,
1760  GlobalEntryLabelExp, OutContext);
1761 
1762  PPCTargetStreamer *TS =
1763  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1764 
1765  if (TS)
1766  TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
1767  } else if (Subtarget->isUsingPCRelativeCalls()) {
1768  // When generating the entry point for a function we have a few scenarios
1769  // based on whether or not that function uses R2 and whether or not that
1770  // function makes calls (or is a leaf function).
1771  // 1) A leaf function that does not use R2 (or treats it as callee-saved
1772  // and preserves it). In this case st_other=0 and both
1773  // the local and global entry points for the function are the same.
1774  // No special entry point code is required.
1775  // 2) A function uses the TOC pointer R2. This function may or may not have
1776  // calls. In this case st_other=[2,6] and the global and local entry
1777  // points are different. Code to correctly setup the TOC pointer in R2
1778  // is put between the global and local entry points. This case is
1779  // covered by the if statatement above.
1780  // 3) A function does not use the TOC pointer R2 but does have calls.
1781  // In this case st_other=1 since we do not know whether or not any
1782  // of the callees clobber R2. This case is dealt with in this else if
1783  // block. Tail calls are considered calls and the st_other should also
1784  // be set to 1 in that case as well.
1785  // 4) The function does not use the TOC pointer but R2 is used inside
1786  // the function. In this case st_other=1 once again.
1787  // 5) This function uses inline asm. We mark R2 as reserved if the function
1788  // has inline asm as we have to assume that it may be used.
1789  if (MF->getFrameInfo().hasCalls() || MF->getFrameInfo().hasTailCall() ||
1790  MF->hasInlineAsm() || (!PPCFI->usesTOCBasePtr() && UsesX2OrR2)) {
1791  PPCTargetStreamer *TS =
1792  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1793  if (TS)
1794  TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym),
1795  MCConstantExpr::create(1, OutContext));
1796  }
1797  }
1798 }
1799 
1800 /// EmitFunctionBodyEnd - Print the traceback table before the .size
1801 /// directive.
1802 ///
1803 void PPCLinuxAsmPrinter::emitFunctionBodyEnd() {
1804  // Only the 64-bit target requires a traceback table. For now,
1805  // we only emit the word of zeroes that GDB requires to find
1806  // the end of the function, and zeroes for the eight-byte
1807  // mandatory fields.
1808  // FIXME: We should fill in the eight-byte mandatory fields as described in
1809  // the PPC64 ELF ABI (this is a low-priority item because GDB does not
1810  // currently make use of these fields).
1811  if (Subtarget->isPPC64()) {
1812  OutStreamer->emitIntValue(0, 4/*size*/);
1813  OutStreamer->emitIntValue(0, 8/*size*/);
1814  }
1815 }
1816 
1817 void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
1818  MCSymbol *GVSym) const {
1819 
1820  assert(MAI->hasVisibilityOnlyWithLinkage() &&
1821  "AIX's linkage directives take a visibility setting.");
1822 
1823  MCSymbolAttr LinkageAttr = MCSA_Invalid;
1824  switch (GV->getLinkage()) {
1826  LinkageAttr = GV->isDeclaration() ? MCSA_Extern : MCSA_Global;
1827  break;
1833  LinkageAttr = MCSA_Weak;
1834  break;
1836  LinkageAttr = MCSA_Extern;
1837  break;
1839  return;
1842  "InternalLinkage should not have other visibility setting.");
1843  LinkageAttr = MCSA_LGlobal;
1844  break;
1846  llvm_unreachable("Should never emit this");
1848  llvm_unreachable("CommonLinkage of XCOFF should not come to this path");
1849  }
1850 
1851  assert(LinkageAttr != MCSA_Invalid && "LinkageAttr should not MCSA_Invalid.");
1852 
1853  MCSymbolAttr VisibilityAttr = MCSA_Invalid;
1854  if (!TM.getIgnoreXCOFFVisibility()) {
1855  switch (GV->getVisibility()) {
1856 
1857  // TODO: "exported" and "internal" Visibility needs to go here.
1859  break;
1861  VisibilityAttr = MAI->getHiddenVisibilityAttr();
1862  break;
1864  VisibilityAttr = MAI->getProtectedVisibilityAttr();
1865  break;
1866  }
1867  }
1868 
1869  OutStreamer->emitXCOFFSymbolLinkageWithVisibility(GVSym, LinkageAttr,
1870  VisibilityAttr);
1871 }
1872 
1873 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) {
1874  // Setup CurrentFnDescSym and its containing csect.
1875  MCSectionXCOFF *FnDescSec =
1876  cast<MCSectionXCOFF>(getObjFileLowering().getSectionForFunctionDescriptor(
1877  &MF.getFunction(), TM));
1878  FnDescSec->setAlignment(Align(Subtarget->isPPC64() ? 8 : 4));
1879 
1880  CurrentFnDescSym = FnDescSec->getQualNameSymbol();
1881 
1883 }
1884 
1885 uint16_t PPCAIXAsmPrinter::getNumberOfVRSaved() {
1886  // Calculate the number of VRs be saved.
1887  // Vector registers 20 through 31 are marked as reserved and cannot be used
1888  // in the default ABI.
1889  const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
1890  if (Subtarget.isAIXABI() && Subtarget.hasAltivec() &&
1891  TM.getAIXExtendedAltivecABI()) {
1892  const MachineRegisterInfo &MRI = MF->getRegInfo();
1893  for (unsigned Reg = PPC::V20; Reg <= PPC::V31; ++Reg)
1894  if (MRI.isPhysRegModified(Reg))
1895  // Number of VRs saved.
1896  return PPC::V31 - Reg + 1;
1897  }
1898  return 0;
1899 }
1900 
1901 void PPCAIXAsmPrinter::emitFunctionBodyEnd() {
1902 
1903  if (!TM.getXCOFFTracebackTable())
1904  return;
1905 
1906  emitTracebackTable();
1907 
1908  // If ShouldEmitEHBlock returns true, then the eh info table
1909  // will be emitted via `AIXException::endFunction`. Otherwise, we
1910  // need to emit a dumy eh info table when VRs are saved. We could not
1911  // consolidate these two places into one because there is no easy way
1912  // to access register information in `AIXException` class.
1914  (getNumberOfVRSaved() > 0)) {
1915  // Emit dummy EH Info Table.
1916  OutStreamer->SwitchSection(getObjFileLowering().getCompactUnwindSection());
1917  MCSymbol *EHInfoLabel =
1919  OutStreamer->emitLabel(EHInfoLabel);
1920 
1921  // Version number.
1922  OutStreamer->emitInt32(0);
1923 
1924  const DataLayout &DL = MMI->getModule()->getDataLayout();
1925  const unsigned PointerSize = DL.getPointerSize();
1926  // Add necessary paddings in 64 bit mode.
1927  OutStreamer->emitValueToAlignment(PointerSize);
1928 
1929  OutStreamer->emitIntValue(0, PointerSize);
1930  OutStreamer->emitIntValue(0, PointerSize);
1931  OutStreamer->SwitchSection(MF->getSection());
1932  }
1933 }
1934 
1935 void PPCAIXAsmPrinter::emitTracebackTable() {
1936 
1937  // Create a symbol for the end of function.
1938  MCSymbol *FuncEnd = createTempSymbol(MF->getName());
1939  OutStreamer->emitLabel(FuncEnd);
1940 
1941  OutStreamer->AddComment("Traceback table begin");
1942  // Begin with a fullword of zero.
1943  OutStreamer->emitIntValueInHexWithPadding(0, 4 /*size*/);
1944 
1945  SmallString<128> CommentString;
1946  raw_svector_ostream CommentOS(CommentString);
1947 
1948  auto EmitComment = [&]() {
1949  OutStreamer->AddComment(CommentOS.str());
1950  CommentString.clear();
1951  };
1952 
1953  auto EmitCommentAndValue = [&](uint64_t Value, int Size) {
1954  EmitComment();
1955  OutStreamer->emitIntValueInHexWithPadding(Value, Size);
1956  };
1957 
1958  unsigned int Version = 0;
1959  CommentOS << "Version = " << Version;
1960  EmitCommentAndValue(Version, 1);
1961 
1962  // There is a lack of information in the IR to assist with determining the
1963  // source language. AIX exception handling mechanism would only search for
1964  // personality routine and LSDA area when such language supports exception
1965  // handling. So to be conservatively correct and allow runtime to do its job,
1966  // we need to set it to C++ for now.
1967  TracebackTable::LanguageID LanguageIdentifier =
1969 
1970  CommentOS << "Language = "
1971  << getNameForTracebackTableLanguageId(LanguageIdentifier);
1972  EmitCommentAndValue(LanguageIdentifier, 1);
1973 
1974  // This is only populated for the third and fourth bytes.
1975  uint32_t FirstHalfOfMandatoryField = 0;
1976 
1977  // Emit the 3rd byte of the mandatory field.
1978 
1979  // We always set traceback offset bit to true.
1980  FirstHalfOfMandatoryField |= TracebackTable::HasTraceBackTableOffsetMask;
1981 
1982  const PPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>();
1983  const MachineRegisterInfo &MRI = MF->getRegInfo();
1984 
1985  // Check the function uses floating-point processor instructions or not
1986  for (unsigned Reg = PPC::F0; Reg <= PPC::F31; ++Reg) {
1987  if (MRI.isPhysRegUsed(Reg, /* SkipRegMaskTest */ true)) {
1988  FirstHalfOfMandatoryField |= TracebackTable::IsFloatingPointPresentMask;
1989  break;
1990  }
1991  }
1992 
1993 #define GENBOOLCOMMENT(Prefix, V, Field) \
1994  CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \
1995  << #Field
1996 
1997 #define GENVALUECOMMENT(PrefixAndName, V, Field) \
1998  CommentOS << (PrefixAndName) << " = " \
1999  << static_cast<unsigned>(((V) & (TracebackTable::Field##Mask)) >> \
2000  (TracebackTable::Field##Shift))
2001 
2002  GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsGlobaLinkage);
2003  GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsOutOfLineEpilogOrPrologue);
2004  EmitComment();
2005 
2006  GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasTraceBackTableOffset);
2007  GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsInternalProcedure);
2008  EmitComment();
2009 
2010  GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasControlledStorage);
2011  GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsTOCless);
2012  EmitComment();
2013 
2014  GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsFloatingPointPresent);
2015  EmitComment();
2016  GENBOOLCOMMENT("", FirstHalfOfMandatoryField,
2017  IsFloatingPointOperationLogOrAbortEnabled);
2018  EmitComment();
2019 
2020  OutStreamer->emitIntValueInHexWithPadding(
2021  (FirstHalfOfMandatoryField & 0x0000ff00) >> 8, 1);
2022 
2023  // Set the 4th byte of the mandatory field.
2024  FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask;
2025 
2026  const PPCRegisterInfo *RegInfo =
2027  static_cast<const PPCRegisterInfo *>(Subtarget->getRegisterInfo());
2028  Register FrameReg = RegInfo->getFrameRegister(*MF);
2029  if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31))
2030  FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask;
2031 
2032  const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs();
2033  if (!MustSaveCRs.empty())
2034  FirstHalfOfMandatoryField |= TracebackTable::IsCRSavedMask;
2035 
2036  if (FI->mustSaveLR())
2037  FirstHalfOfMandatoryField |= TracebackTable::IsLRSavedMask;
2038 
2039  GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsInterruptHandler);
2040  GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsFunctionNamePresent);
2041  GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsAllocaUsed);
2042  EmitComment();
2043  GENVALUECOMMENT("OnConditionDirective", FirstHalfOfMandatoryField,
2044  OnConditionDirective);
2045  GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsCRSaved);
2046  GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsLRSaved);
2047  EmitComment();
2048  OutStreamer->emitIntValueInHexWithPadding((FirstHalfOfMandatoryField & 0xff),
2049  1);
2050 
2051  // Set the 5th byte of mandatory field.
2052  uint32_t SecondHalfOfMandatoryField = 0;
2053 
2054  // Always store back chain.
2055  SecondHalfOfMandatoryField |= TracebackTable::IsBackChainStoredMask;
2056 
2057  uint32_t FPRSaved = 0;
2058  for (unsigned Reg = PPC::F14; Reg <= PPC::F31; ++Reg) {
2059  if (MRI.isPhysRegModified(Reg)) {
2060  FPRSaved = PPC::F31 - Reg + 1;
2061  break;
2062  }
2063  }
2064  SecondHalfOfMandatoryField |= (FPRSaved << TracebackTable::FPRSavedShift) &
2066  GENBOOLCOMMENT("", SecondHalfOfMandatoryField, IsBackChainStored);
2067  GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, IsFixup);
2068  GENVALUECOMMENT(", NumOfFPRsSaved", SecondHalfOfMandatoryField, FPRSaved);
2069  EmitComment();
2070  OutStreamer->emitIntValueInHexWithPadding(
2071  (SecondHalfOfMandatoryField & 0xff000000) >> 24, 1);
2072 
2073  // Set the 6th byte of mandatory field.
2074 
2075  // Check whether has Vector Instruction,We only treat instructions uses vector
2076  // register as vector instructions.
2077  bool HasVectorInst = false;
2078  for (unsigned Reg = PPC::V0; Reg <= PPC::V31; ++Reg)
2079  if (MRI.isPhysRegUsed(Reg, /* SkipRegMaskTest */ true)) {
2080  // Has VMX instruction.
2081  HasVectorInst = true;
2082  break;
2083  }
2084 
2085  if (FI->hasVectorParms() || HasVectorInst)
2086  SecondHalfOfMandatoryField |= TracebackTable::HasVectorInfoMask;
2087 
2088  uint16_t NumOfVRSaved = getNumberOfVRSaved();
2089  bool ShouldEmitEHBlock =
2090  TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock(MF) || NumOfVRSaved > 0;
2091 
2092  if (ShouldEmitEHBlock)
2093  SecondHalfOfMandatoryField |= TracebackTable::HasExtensionTableMask;
2094 
2095  uint32_t GPRSaved = 0;
2096 
2097  // X13 is reserved under 64-bit environment.
2098  unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13;
2099  unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31;
2100 
2101  for (unsigned Reg = GPRBegin; Reg <= GPREnd; ++Reg) {
2102  if (MRI.isPhysRegModified(Reg)) {
2103  GPRSaved = GPREnd - Reg + 1;
2104  break;
2105  }
2106  }
2107 
2108  SecondHalfOfMandatoryField |= (GPRSaved << TracebackTable::GPRSavedShift) &
2110 
2111  GENBOOLCOMMENT("", SecondHalfOfMandatoryField, HasExtensionTable);
2112  GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasVectorInfo);
2113  GENVALUECOMMENT(", NumOfGPRsSaved", SecondHalfOfMandatoryField, GPRSaved);
2114  EmitComment();
2115  OutStreamer->emitIntValueInHexWithPadding(
2116  (SecondHalfOfMandatoryField & 0x00ff0000) >> 16, 1);
2117 
2118  // Set the 7th byte of mandatory field.
2119  uint32_t NumberOfFixedParms = FI->getFixedParmsNum();
2120  SecondHalfOfMandatoryField |=
2121  (NumberOfFixedParms << TracebackTable::NumberOfFixedParmsShift) &
2123  GENVALUECOMMENT("NumberOfFixedParms", SecondHalfOfMandatoryField,
2124  NumberOfFixedParms);
2125  EmitComment();
2126  OutStreamer->emitIntValueInHexWithPadding(
2127  (SecondHalfOfMandatoryField & 0x0000ff00) >> 8, 1);
2128 
2129  // Set the 8th byte of mandatory field.
2130 
2131  // Always set parameter on stack.
2132  SecondHalfOfMandatoryField |= TracebackTable::HasParmsOnStackMask;
2133 
2134  uint32_t NumberOfFPParms = FI->getFloatingPointParmsNum();
2135  SecondHalfOfMandatoryField |=
2138 
2139  GENVALUECOMMENT("NumberOfFPParms", SecondHalfOfMandatoryField,
2140  NumberOfFloatingPointParms);
2141  GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasParmsOnStack);
2142  EmitComment();
2143  OutStreamer->emitIntValueInHexWithPadding(SecondHalfOfMandatoryField & 0xff,
2144  1);
2145 
2146  // Generate the optional fields of traceback table.
2147 
2148  // Parameter type.
2149  if (NumberOfFixedParms || NumberOfFPParms) {
2150  uint32_t ParmsTypeValue = FI->getParmsType();
2151 
2152  Expected<SmallString<32>> ParmsType =
2153  FI->hasVectorParms()
2155  ParmsTypeValue, NumberOfFixedParms, NumberOfFPParms,
2156  FI->getVectorParmsNum())
2157  : XCOFF::parseParmsType(ParmsTypeValue, NumberOfFixedParms,
2158  NumberOfFPParms);
2159 
2160  assert(ParmsType && toString(ParmsType.takeError()).c_str());
2161  if (ParmsType) {
2162  CommentOS << "Parameter type = " << ParmsType.get();
2163  EmitComment();
2164  }
2165  OutStreamer->emitIntValueInHexWithPadding(ParmsTypeValue,
2166  sizeof(ParmsTypeValue));
2167  }
2168  // Traceback table offset.
2169  OutStreamer->AddComment("Function size");
2170  if (FirstHalfOfMandatoryField & TracebackTable::HasTraceBackTableOffsetMask) {
2171  MCSymbol *FuncSectSym = getObjFileLowering().getFunctionEntryPointSymbol(
2172  &(MF->getFunction()), TM);
2173  OutStreamer->emitAbsoluteSymbolDiff(FuncEnd, FuncSectSym, 4);
2174  }
2175 
2176  // Since we unset the Int_Handler.
2177  if (FirstHalfOfMandatoryField & TracebackTable::IsInterruptHandlerMask)
2178  report_fatal_error("Hand_Mask not implement yet");
2179 
2180  if (FirstHalfOfMandatoryField & TracebackTable::HasControlledStorageMask)
2181  report_fatal_error("Ctl_Info not implement yet");
2182 
2183  if (FirstHalfOfMandatoryField & TracebackTable::IsFunctionNamePresentMask) {
2184  StringRef Name = MF->getName().substr(0, INT16_MAX);
2185  int16_t NameLength = Name.size();
2186  CommentOS << "Function name len = "
2187  << static_cast<unsigned int>(NameLength);
2188  EmitCommentAndValue(NameLength, 2);
2189  OutStreamer->AddComment("Function Name");
2190  OutStreamer->emitBytes(Name);
2191  }
2192 
2193  if (FirstHalfOfMandatoryField & TracebackTable::IsAllocaUsedMask) {
2194  uint8_t AllocReg = XCOFF::AllocRegNo;
2195  OutStreamer->AddComment("AllocaUsed");
2196  OutStreamer->emitIntValueInHex(AllocReg, sizeof(AllocReg));
2197  }
2198 
2199  if (SecondHalfOfMandatoryField & TracebackTable::HasVectorInfoMask) {
2200  uint16_t VRData = 0;
2201  if (NumOfVRSaved) {
2202  // Number of VRs saved.
2203  VRData |= (NumOfVRSaved << TracebackTable::NumberOfVRSavedShift) &
2205  // This bit is supposed to set only when the special register
2206  // VRSAVE is saved on stack.
2207  // However, IBM XL compiler sets the bit when any vector registers
2208  // are saved on the stack. We will follow XL's behavior on AIX
2209  // so that we don't get surprise behavior change for C code.
2211  }
2212 
2213  // Set has_varargs.
2214  if (FI->getVarArgsFrameIndex())
2216 
2217  // Vector parameters number.
2218  unsigned VectorParmsNum = FI->getVectorParmsNum();
2219  VRData |= (VectorParmsNum << TracebackTable::NumberOfVectorParmsShift) &
2221 
2222  if (HasVectorInst)
2224 
2225  GENVALUECOMMENT("NumOfVRsSaved", VRData, NumberOfVRSaved);
2226  GENBOOLCOMMENT(", ", VRData, IsVRSavedOnStack);
2227  GENBOOLCOMMENT(", ", VRData, HasVarArgs);
2228  EmitComment();
2229  OutStreamer->emitIntValueInHexWithPadding((VRData & 0xff00) >> 8, 1);
2230 
2231  GENVALUECOMMENT("NumOfVectorParams", VRData, NumberOfVectorParms);
2232  GENBOOLCOMMENT(", ", VRData, HasVMXInstruction);
2233  EmitComment();
2234  OutStreamer->emitIntValueInHexWithPadding(VRData & 0x00ff, 1);
2235 
2236  uint32_t VecParmTypeValue = FI->getVecExtParmsType();
2237 
2238  Expected<SmallString<32>> VecParmsType =
2239  XCOFF::parseVectorParmsType(VecParmTypeValue, VectorParmsNum);
2240  assert(VecParmsType && toString(VecParmsType.takeError()).c_str());
2241  if (VecParmsType) {
2242  CommentOS << "Vector Parameter type = " << VecParmsType.get();
2243  EmitComment();
2244  }
2245  OutStreamer->emitIntValueInHexWithPadding(VecParmTypeValue,
2246  sizeof(VecParmTypeValue));
2247  // Padding 2 bytes.
2248  CommentOS << "Padding";
2249  EmitCommentAndValue(0, 2);
2250  }
2251 
2252  uint8_t ExtensionTableFlag = 0;
2253  if (SecondHalfOfMandatoryField & TracebackTable::HasExtensionTableMask) {
2254  if (ShouldEmitEHBlock)
2255  ExtensionTableFlag |= ExtendedTBTableFlag::TB_EH_INFO;
2256  if (EnableSSPCanaryBitInTB &&
2258  ExtensionTableFlag |= ExtendedTBTableFlag::TB_SSP_CANARY;
2259 
2260  CommentOS << "ExtensionTableFlag = "
2261  << getExtendedTBTableFlagString(ExtensionTableFlag);
2262  EmitCommentAndValue(ExtensionTableFlag, sizeof(ExtensionTableFlag));
2263  }
2264 
2265  if (ExtensionTableFlag & ExtendedTBTableFlag::TB_EH_INFO) {
2266  auto &Ctx = OutStreamer->getContext();
2267  MCSymbol *EHInfoSym =
2269  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(EHInfoSym);
2270  const MCSymbol *TOCBaseSym =
2271  cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())
2272  ->getQualNameSymbol();
2273  const MCExpr *Exp =
2275  MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx);
2276 
2277  const DataLayout &DL = getDataLayout();
2278  OutStreamer->emitValueToAlignment(4);
2279  OutStreamer->AddComment("EHInfo Table");
2280  OutStreamer->emitValue(Exp, DL.getPointerSize());
2281  }
2282 #undef GENBOOLCOMMENT
2283 #undef GENVALUECOMMENT
2284 }
2285 
2287  return GV->hasAppendingLinkage() &&
2289  // TODO: Linker could still eliminate the GV if we just skip
2290  // handling llvm.used array. Skipping them for now until we or the
2291  // AIX OS team come up with a good solution.
2292  .Case("llvm.used", true)
2293  // It's correct to just skip llvm.compiler.used array here.
2294  .Case("llvm.compiler.used", true)
2295  .Default(false);
2296 }
2297 
2299  return StringSwitch<bool>(GV->getName())
2300  .Cases("llvm.global_ctors", "llvm.global_dtors", true)
2301  .Default(false);
2302 }
2303 
2304 void PPCAIXAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
2305  // Special LLVM global arrays have been handled at the initialization.
2307  return;
2308 
2309  // If the Global Variable has the toc-data attribute, it needs to be emitted
2310  // when we emit the .toc section.
2311  if (GV->hasAttribute("toc-data")) {
2312  TOCDataGlobalVars.push_back(GV);
2313  return;
2314  }
2315 
2316  emitGlobalVariableHelper(GV);
2317 }
2318 
2319 void PPCAIXAsmPrinter::emitGlobalVariableHelper(const GlobalVariable *GV) {
2320  assert(!GV->getName().startswith("llvm.") &&
2321  "Unhandled intrinsic global variable.");
2322 
2323  if (GV->hasComdat())
2324  report_fatal_error("COMDAT not yet supported by AIX.");
2325 
2326  MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV));
2327 
2328  if (GV->isDeclarationForLinker()) {
2329  emitLinkage(GV, GVSym);
2330  return;
2331  }
2332 
2333  SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM);
2334  if (!GVKind.isGlobalWriteableData() && !GVKind.isReadOnly() &&
2335  !GVKind.isThreadLocal()) // Checks for both ThreadData and ThreadBSS.
2336  report_fatal_error("Encountered a global variable kind that is "
2337  "not supported yet.");
2338 
2339  // Print GV in verbose mode
2340  if (isVerbose()) {
2341  if (GV->hasInitializer()) {
2342  GV->printAsOperand(OutStreamer->GetCommentOS(),
2343  /*PrintType=*/false, GV->getParent());
2344  OutStreamer->GetCommentOS() << '\n';
2345  }
2346  }
2347 
2348  MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(
2349  getObjFileLowering().SectionForGlobal(GV, GVKind, TM));
2350 
2351  // Switch to the containing csect.
2352  OutStreamer->SwitchSection(Csect);
2353 
2354  const DataLayout &DL = GV->getParent()->getDataLayout();
2355 
2356  // Handle common and zero-initialized local symbols.
2357  if (GV->hasCommonLinkage() || GVKind.isBSSLocal() ||
2358  GVKind.isThreadBSSLocal()) {
2359  Align Alignment = GV->getAlign().getValueOr(DL.getPreferredAlign(GV));
2360  uint64_t Size = DL.getTypeAllocSize(GV->getValueType());
2361  GVSym->setStorageClass(
2363 
2364  if (GVKind.isBSSLocal() || GVKind.isThreadBSSLocal())
2365  OutStreamer->emitXCOFFLocalCommonSymbol(
2366  OutContext.getOrCreateSymbol(GVSym->getSymbolTableName()), Size,
2367  GVSym, Alignment.value());
2368  else
2369  OutStreamer->emitCommonSymbol(GVSym, Size, Alignment.value());
2370  return;
2371  }
2372 
2373  MCSymbol *EmittedInitSym = GVSym;
2374  emitLinkage(GV, EmittedInitSym);
2375  emitAlignment(getGVAlignment(GV, DL), GV);
2376 
2377  // When -fdata-sections is enabled, every GlobalVariable will
2378  // be put into its own csect; therefore, label is not necessary here.
2379  if (!TM.getDataSections() || GV->hasSection()) {
2380  OutStreamer->emitLabel(EmittedInitSym);
2381  }
2382 
2383  // Emit aliasing label for global variable.
2384  llvm::for_each(GOAliasMap[GV], [this](const GlobalAlias *Alias) {
2385  OutStreamer->emitLabel(getSymbol(Alias));
2386  });
2387 
2388  emitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer());
2389 }
2390 
2391 void PPCAIXAsmPrinter::emitFunctionDescriptor() {
2392  const DataLayout &DL = getDataLayout();
2393  const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4;
2394 
2395  MCSectionSubPair Current = OutStreamer->getCurrentSection();
2396  // Emit function descriptor.
2397  OutStreamer->SwitchSection(
2398  cast<MCSymbolXCOFF>(CurrentFnDescSym)->getRepresentedCsect());
2399 
2400  // Emit aliasing label for function descriptor csect.
2401  llvm::for_each(GOAliasMap[&MF->getFunction()],
2402  [this](const GlobalAlias *Alias) {
2403  OutStreamer->emitLabel(getSymbol(Alias));
2404  });
2405 
2406  // Emit function entry point address.
2407  OutStreamer->emitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext),
2408  PointerSize);
2409  // Emit TOC base address.
2410  const MCSymbol *TOCBaseSym =
2411  cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())
2412  ->getQualNameSymbol();
2413  OutStreamer->emitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext),
2414  PointerSize);
2415  // Emit a null environment pointer.
2416  OutStreamer->emitIntValue(0, PointerSize);
2417 
2418  OutStreamer->SwitchSection(Current.first, Current.second);
2419 }
2420 
2421 void PPCAIXAsmPrinter::emitFunctionEntryLabel() {
2422  // It's not necessary to emit the label when we have individual
2423  // function in its own csect.
2424  if (!TM.getFunctionSections())
2425  PPCAsmPrinter::emitFunctionEntryLabel();
2426 
2427  // Emit aliasing label for function entry point label.
2429  GOAliasMap[&MF->getFunction()], [this](const GlobalAlias *Alias) {
2430  OutStreamer->emitLabel(
2431  getObjFileLowering().getFunctionEntryPointSymbol(Alias, TM));
2432  });
2433 }
2434 
2435 void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
2436  // If there are no functions and there are no toc-data definitions in this
2437  // module, we will never need to reference the TOC base.
2438  if (M.empty() && TOCDataGlobalVars.empty())
2439  return;
2440 
2441  // Switch to section to emit TOC base.
2442  OutStreamer->SwitchSection(getObjFileLowering().getTOCBaseSection());
2443 
2444  PPCTargetStreamer *TS =
2445  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2446 
2447  for (auto &I : TOC) {
2448  MCSectionXCOFF *TCEntry;
2449  // Setup the csect for the current TC entry. If the variant kind is
2450  // VK_PPC_AIX_TLSGDM the entry represents the region handle, we create a
2451  // new symbol to prefix the name with a dot.
2452  if (I.first.second == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM) {
2454  StringRef Prefix = ".";
2455  Name += Prefix;
2456  Name += I.first.first->getName();
2457  MCSymbol *S = OutContext.getOrCreateSymbol(Name);
2458  TCEntry = cast<MCSectionXCOFF>(
2459  getObjFileLowering().getSectionForTOCEntry(S, TM));
2460  } else {
2461  TCEntry = cast<MCSectionXCOFF>(
2462  getObjFileLowering().getSectionForTOCEntry(I.first.first, TM));
2463  }
2464  OutStreamer->SwitchSection(TCEntry);
2465 
2466  OutStreamer->emitLabel(I.second);
2467  if (TS != nullptr)
2468  TS->emitTCEntry(*I.first.first, I.first.second);
2469  }
2470 
2471  for (const auto *GV : TOCDataGlobalVars)
2472  emitGlobalVariableHelper(GV);
2473 }
2474 
2475 bool PPCAIXAsmPrinter::doInitialization(Module &M) {
2476  const bool Result = PPCAsmPrinter::doInitialization(M);
2477 
2478  auto setCsectAlignment = [this](const GlobalObject *GO) {
2479  // Declarations have 0 alignment which is set by default.
2480  if (GO->isDeclarationForLinker())
2481  return;
2482 
2483  SectionKind GOKind = getObjFileLowering().getKindForGlobal(GO, TM);
2484  MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(
2485  getObjFileLowering().SectionForGlobal(GO, GOKind, TM));
2486 
2487  Align GOAlign = getGVAlignment(GO, GO->getParent()->getDataLayout());
2488  if (GOAlign > Csect->getAlignment())
2489  Csect->setAlignment(GOAlign);
2490  };
2491 
2492  // We need to know, up front, the alignment of csects for the assembly path,
2493  // because once a .csect directive gets emitted, we could not change the
2494  // alignment value on it.
2495  for (const auto &G : M.globals()) {
2497  continue;
2498 
2500  // Generate a format indicator and a unique module id to be a part of
2501  // the sinit and sterm function names.
2502  if (FormatIndicatorAndUniqueModId.empty()) {
2503  std::string UniqueModuleId = getUniqueModuleId(&M);
2504  if (UniqueModuleId != "")
2505  // TODO: Use source file full path to generate the unique module id
2506  // and add a format indicator as a part of function name in case we
2507  // will support more than one format.
2508  FormatIndicatorAndUniqueModId = "clang_" + UniqueModuleId.substr(1);
2509  else
2510  // Use the Pid and current time as the unique module id when we cannot
2511  // generate one based on a module's strong external symbols.
2512  // FIXME: Adjust the comment accordingly after we use source file full
2513  // path instead.
2514  FormatIndicatorAndUniqueModId =
2515  "clangPidTime_" + llvm::itostr(sys::Process::getProcessId()) +
2516  "_" + llvm::itostr(time(nullptr));
2517  }
2518 
2519  emitSpecialLLVMGlobal(&G);
2520  continue;
2521  }
2522 
2523  setCsectAlignment(&G);
2524  }
2525 
2526  for (const auto &F : M)
2527  setCsectAlignment(&F);
2528 
2529  // Construct an aliasing list for each GlobalObject.
2530  for (const auto &Alias : M.aliases()) {
2531  const GlobalObject *Base = Alias.getBaseObject();
2532  if (!Base)
2534  "alias without a base object is not yet supported on AIX");
2535  GOAliasMap[Base].push_back(&Alias);
2536  }
2537 
2538  return Result;
2539 }
2540 
2541 void PPCAIXAsmPrinter::emitInstruction(const MachineInstr *MI) {
2542  switch (MI->getOpcode()) {
2543  default:
2544  break;
2545  case PPC::GETtlsADDR64AIX:
2546  case PPC::GETtlsADDR32AIX: {
2547  // The reference to .__tls_get_addr is unknown to the assembler
2548  // so we need to emit an external symbol reference.
2549  MCSymbol *TlsGetAddr = createMCSymbolForTlsGetAddr(OutContext);
2550  ExtSymSDNodeSymbols.insert(TlsGetAddr);
2551  break;
2552  }
2553  case PPC::BL8:
2554  case PPC::BL:
2555  case PPC::BL8_NOP:
2556  case PPC::BL_NOP: {
2557  const MachineOperand &MO = MI->getOperand(0);
2558  if (MO.isSymbol()) {
2559  MCSymbolXCOFF *S =
2560  cast<MCSymbolXCOFF>(OutContext.getOrCreateSymbol(MO.getSymbolName()));
2561  ExtSymSDNodeSymbols.insert(S);
2562  }
2563  } break;
2564  case PPC::BL_TLS:
2565  case PPC::BL8_TLS:
2566  case PPC::BL8_TLS_:
2567  case PPC::BL8_NOP_TLS:
2568  report_fatal_error("TLS call not yet implemented");
2569  case PPC::TAILB:
2570  case PPC::TAILB8:
2571  case PPC::TAILBA:
2572  case PPC::TAILBA8:
2573  case PPC::TAILBCTR:
2574  case PPC::TAILBCTR8:
2575  if (MI->getOperand(0).isSymbol())
2576  report_fatal_error("Tail call for extern symbol not yet supported.");
2577  break;
2578  case PPC::DST:
2579  case PPC::DST64:
2580  case PPC::DSTT:
2581  case PPC::DSTT64:
2582  case PPC::DSTST:
2583  case PPC::DSTST64:
2584  case PPC::DSTSTT:
2585  case PPC::DSTSTT64:
2586  EmitToStreamer(
2587  *OutStreamer,
2588  MCInstBuilder(PPC::ORI).addReg(PPC::R0).addReg(PPC::R0).addImm(0));
2589  return;
2590  }
2591  return PPCAsmPrinter::emitInstruction(MI);
2592 }
2593 
2594 bool PPCAIXAsmPrinter::doFinalization(Module &M) {
2595  // Do streamer related finalization for DWARF.
2596  if (!MAI->usesDwarfFileAndLocDirectives() && MMI->hasDebugInfo())
2597  OutStreamer->doFinalizationAtSectionEnd(
2598  OutStreamer->getContext().getObjectFileInfo()->getTextSection());
2599 
2600  for (MCSymbol *Sym : ExtSymSDNodeSymbols)
2601  OutStreamer->emitSymbolAttribute(Sym, MCSA_Extern);
2602  return PPCAsmPrinter::doFinalization(M);
2603 }
2604 
2605 static unsigned mapToSinitPriority(int P) {
2606  if (P < 0 || P > 65535)
2607  report_fatal_error("invalid init priority");
2608 
2609  if (P <= 20)
2610  return P;
2611 
2612  if (P < 81)
2613  return 20 + (P - 20) * 16;
2614 
2615  if (P <= 1124)
2616  return 1004 + (P - 81);
2617 
2618  if (P < 64512)
2619  return 2047 + (P - 1124) * 33878;
2620 
2621  return 2147482625u + (P - 64512);
2622 }
2623 
2624 static std::string convertToSinitPriority(int Priority) {
2625  // This helper function converts clang init priority to values used in sinit
2626  // and sterm functions.
2627  //
2628  // The conversion strategies are:
2629  // We map the reserved clang/gnu priority range [0, 100] into the sinit/sterm
2630  // reserved priority range [0, 1023] by
2631  // - directly mapping the first 21 and the last 20 elements of the ranges
2632  // - linear interpolating the intermediate values with a step size of 16.
2633  //
2634  // We map the non reserved clang/gnu priority range of [101, 65535] into the
2635  // sinit/sterm priority range [1024, 2147483648] by:
2636  // - directly mapping the first and the last 1024 elements of the ranges
2637  // - linear interpolating the intermediate values with a step size of 33878.
2638  unsigned int P = mapToSinitPriority(Priority);
2639 
2640  std::string PrioritySuffix;
2641  llvm::raw_string_ostream os(PrioritySuffix);
2642  os << llvm::format_hex_no_prefix(P, 8);
2643  os.flush();
2644  return PrioritySuffix;
2645 }
2646 
2647 void PPCAIXAsmPrinter::emitXXStructorList(const DataLayout &DL,
2648  const Constant *List, bool IsCtor) {
2649  SmallVector<Structor, 8> Structors;
2650  preprocessXXStructorList(DL, List, Structors);
2651  if (Structors.empty())
2652  return;
2653 
2654  unsigned Index = 0;
2655  for (Structor &S : Structors) {
2656  if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(S.Func))
2657  S.Func = CE->getOperand(0);
2658 
2661  (IsCtor ? llvm::Twine("__sinit") : llvm::Twine("__sterm")) +
2662  llvm::Twine(convertToSinitPriority(S.Priority)) +
2663  llvm::Twine("_", FormatIndicatorAndUniqueModId) +
2664  llvm::Twine("_", llvm::utostr(Index++)),
2665  cast<Function>(S.Func));
2666  }
2667 }
2668 
2669 void PPCAIXAsmPrinter::emitTTypeReference(const GlobalValue *GV,
2670  unsigned Encoding) {
2671  if (GV) {
2672  MCSymbol *TypeInfoSym = TM.getSymbol(GV);
2673  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(TypeInfoSym);
2674  const MCSymbol *TOCBaseSym =
2675  cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())
2676  ->getQualNameSymbol();
2677  auto &Ctx = OutStreamer->getContext();
2678  const MCExpr *Exp =
2680  MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx);
2681  OutStreamer->emitValue(Exp, GetSizeOfEncodedValue(Encoding));
2682  } else
2683  OutStreamer->emitIntValue(0, GetSizeOfEncodedValue(Encoding));
2684 }
2685 
2686 // Return a pass that prints the PPC assembly code for a MachineFunction to the
2687 // given output stream.
2688 static AsmPrinter *
2690  std::unique_ptr<MCStreamer> &&Streamer) {
2691  if (tm.getTargetTriple().isOSAIX())
2692  return new PPCAIXAsmPrinter(tm, std::move(Streamer));
2693 
2694  return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
2695 }
2696 
2697 // Force static initialization.
2707 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:67
llvm::PPCRegisterInfo
Definition: PPCRegisterInfo.h:57
i
i
Definition: README.txt:29
llvm::PPCII::MO_TLSGD_FLAG
@ MO_TLSGD_FLAG
MO_TLSGD_FLAG - If this bit is set the symbol reference is relative to TLS General Dynamic model for ...
Definition: PPC.h:123
AsmPrinter.h
llvm::XCOFF::TracebackTable::NumberOfFloatingPointParmsMask
static constexpr uint32_t NumberOfFloatingPointParmsMask
Definition: XCOFF.h:366
llvm::MachineOperand::MO_BlockAddress
@ MO_BlockAddress
Address of a basic block.
Definition: MachineOperand.h:63
llvm::XCOFF::getExtendedTBTableFlagString
SmallString< 32 > getExtendedTBTableFlagString(uint8_t Flag)
Definition: XCOFF.cpp:162
llvm::StringRef::startswith
LLVM_NODISCARD bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:286
MachineModuleInfoImpls.h
llvm::XCOFF::XTY_ER
@ XTY_ER
External reference.
Definition: XCOFF.h:184
llvm::SectionKind::isThreadLocal
bool isThreadLocal() const
Definition: SectionKind.h:151
llvm::MCSymbolRefExpr::VK_PPC_TOC_HA
@ VK_PPC_TOC_HA
Definition: MCExpr.h:263
llvm::PPCSubtarget::isSecurePlt
bool isSecurePlt() const
Definition: PPCSubtarget.h:293
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
MachineInstr.h
llvm::MachineOperand::MO_Immediate
@ MO_Immediate
Immediate operand.
Definition: MachineOperand.h:53
llvm::PPCSubtarget::getRegisterInfo
const PPCRegisterInfo * getRegisterInfo() const override
Definition: PPCSubtarget.h:213
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::XCOFF::TracebackTable::HasVectorInfoMask
static constexpr uint32_t HasVectorInfoMask
Definition: XCOFF.h:357
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MachineRegisterInfo::isPhysRegUsed
bool isPhysRegUsed(MCRegister PhysReg, bool SkipRegMaskTest=false) const
Return true if the specified register is modified or read in this function.
Definition: MachineRegisterInfo.cpp:585
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::MachineOperand::isBlockAddress
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
Definition: MachineOperand.h:343
llvm::Value::getPointerAlignment
Align getPointerAlignment(const DataLayout &DL) const
Returns an alignment of the pointer value.
Definition: Value.cpp:905
llvm::MCSectionXCOFF
Definition: MCSectionXCOFF.h:32
llvm::drop_begin
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
Definition: STLExtras.h:266
llvm::PICLevel::SmallPIC
@ SmallPIC
Definition: CodeGen.h:33
llvm::GlobalValue::hasCommonLinkage
bool hasCommonLinkage() const
Definition: GlobalValue.h:449
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:112
GENVALUECOMMENT
#define GENVALUECOMMENT(PrefixAndName, V, Field)
llvm::MCSymbolRefExpr::VK_GOT
@ VK_GOT
Definition: MCExpr.h:198
llvm::MCOperand::createExpr
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:162
llvm::GlobalValue::LinkOnceAnyLinkage
@ LinkOnceAnyLinkage
Keep one copy of function when linking (inline)
Definition: GlobalValue.h:50
llvm::LowerPPCMachineInstrToMCInst
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP)
Definition: PPCMCInstLower.cpp:151
llvm::cl::Prefix
@ Prefix
Definition: CommandLine.h:164
LLVMInitializePowerPCAsmPrinter
LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter()
Definition: PPCAsmPrinter.cpp:2698
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::MachineOperand::getGlobal
const GlobalValue * getGlobal() const
Definition: MachineOperand.h:563
llvm::GlobalValue::getLinkage
LinkageTypes getLinkage() const
Definition: GlobalValue.h:461
llvm::MCSymbolRefExpr::VK_PPC_TLSGD
@ VK_PPC_TLSGD
Definition: MCExpr.h:298
llvm::GlobalValue::HiddenVisibility
@ HiddenVisibility
The GV is hidden.
Definition: GlobalValue.h:64
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:72
llvm::SectionKind::isReadOnly
bool isReadOnly() const
Definition: SectionKind.h:125
llvm::PPCII::MO_GOT_TLSLD_PCREL_FLAG
@ MO_GOT_TLSLD_PCREL_FLAG
MO_GOT_TLSLD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...
Definition: PPC.h:145
StringRef.h
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::PPCInstPrinter::getRegisterName
static const char * getRegisterName(unsigned RegNo)
llvm::StringSwitch::Default
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:181
llvm::PPCFunctionInfo::getVarArgsFrameIndex
int getVarArgsFrameIndex() const
Definition: PPCMachineFunctionInfo.h:219
llvm::MCSymbolXCOFF::getSymbolTableName
StringRef getSymbolTableName() const
Definition: MCSymbolXCOFF.h:61
llvm::XCOFF::TracebackTable::IsVRSavedOnStackMask
static constexpr uint16_t IsVRSavedOnStackMask
Definition: XCOFF.h:383
MCDirectives.h
llvm::MCSA_Invalid
@ MCSA_Invalid
Not a valid directive.
Definition: MCDirectives.h:19
llvm::raw_string_ostream
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:625
llvm::ARM_MB::LD
@ LD
Definition: ARMBaseInfo.h:72
llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::isEqual
static bool isEqual(const TOCKey &A, const TOCKey &B)
Definition: PPCAsmPrinter.cpp:106
llvm::XCOFF::TracebackTable::NumberOfFixedParmsMask
static constexpr uint32_t NumberOfFixedParmsMask
Definition: XCOFF.h:362
llvm::MCConstantExpr::create
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Definition: MCExpr.cpp:194
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::toString
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:1020
MCSectionELF.h
llvm::MapVector::clear
void clear()
Definition: MapVector.h:88
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::PPCInstrInfo::isVFRegister
static bool isVFRegister(unsigned Reg)
Definition: PPCInstrInfo.h:585
llvm::GlobalObject::getAlign
MaybeAlign getAlign() const
Returns the alignment of the given variable or function.
Definition: GlobalObject.h:80
llvm::MachineOperand::getBlockAddress
const BlockAddress * getBlockAddress() const
Definition: MachineOperand.h:568
llvm::PPCFunctionInfo::getFixedParmsNum
unsigned getFixedParmsNum() const
Definition: PPCMachineFunctionInfo.h:228
GENBOOLCOMMENT
#define GENBOOLCOMMENT(Prefix, V, Field)
ErrorHandling.h
MapVector.h
llvm::GlobalVariable
Definition: GlobalVariable.h:40
llvm::XCOFF::XMC_PR
@ XMC_PR
Program Code.
Definition: XCOFF.h:48
llvm::PPCSubtarget::getFrameLowering
const PPCFrameLowering * getFrameLowering() const override
Definition: PPCSubtarget.h:203
llvm::GlobalAlias
Definition: GlobalAlias.h:27
llvm::PPCRegisterInfo::getFrameRegister
Register getFrameRegister(const MachineFunction &MF) const override
Definition: PPCRegisterInfo.cpp:1535
Error.h
MCInstBuilder.h
MachineBasicBlock.h
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:143
llvm::XCOFF::TracebackTable::IsLRSavedMask
static constexpr uint32_t IsLRSavedMask
Definition: XCOFF.h:346
R4
#define R4(n)
llvm::MachineOperand::isSymbol
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
Definition: MachineOperand.h:341
llvm::MachineOperand::isJTI
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
Definition: MachineOperand.h:337
llvm::PPCFrameLowering::getTOCSaveOffset
uint64_t getTOCSaveOffset() const
getTOCSaveOffset - Return the previous frame offset to save the TOC register – 64-bit SVR4 ABI only.
Definition: PPCFrameLowering.cpp:2683
llvm::TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol
static MCSymbol * getEHInfoTableSymbol(const MachineFunction *MF)
Definition: TargetLoweringObjectFileImpl.cpp:2206
Module.h
llvm::PPCFunctionInfo::getLocalEPSymbol
MCSymbol * getLocalEPSymbol(MachineFunction &MF) const
Definition: PPCMachineFunctionInfo.cpp:40
llvm::PPC::InvertPredicate
Predicate InvertPredicate(Predicate Opcode)
Invert the specified predicate. != -> ==, < -> >=.
printOperand
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Definition: SelectionDAGDumper.cpp:946
llvm::PPCII::MO_GOT_TLSGD_PCREL_FLAG
@ MO_GOT_TLSGD_PCREL_FLAG
MO_GOT_TLSGD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...
Definition: PPC.h:140
llvm::XCOFF::TracebackTable::HasVMXInstructionMask
static constexpr uint16_t HasVMXInstructionMask
Definition: XCOFF.h:388
mapToSinitPriority
static unsigned mapToSinitPriority(int P)
Definition: PPCAsmPrinter.cpp:2605
llvm::GlobalVariable::hasAttribute
bool hasAttribute(Attribute::AttrKind Kind) const
Return true if the attribute exists.
Definition: GlobalVariable.h:198
llvm::GlobalValue::DefaultVisibility
@ DefaultVisibility
The GV is visible.
Definition: GlobalValue.h:63
llvm::PPCFunctionInfo
PPCFunctionInfo - This class is derived from MachineFunction private PowerPC target-specific informat...
Definition: PPCMachineFunctionInfo.h:24
llvm::MapVector
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:37
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:449
llvm::XCOFF::AllocRegNo
constexpr uint8_t AllocRegNo
Definition: XCOFF.h:38
llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
@ VK_PPC_GOT_TLSGD_LO
Definition: MCExpr.h:295
llvm::Expected
Tagged union holding either a T or a Error.
Definition: APFloat.h:42
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::LowerPPCMachineOperandToMCOperand
bool LowerPPCMachineOperandToMCOperand(const MachineOperand &MO, MCOperand &OutMO, AsmPrinter &AP)
Definition: PPCMCInstLower.cpp:162
llvm::MCSectionELF
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:28
PPCMCTargetDesc.h
llvm::TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock
static bool ShouldEmitEHBlock(const MachineFunction *MF)
Definition: TargetLoweringObjectFileImpl.cpp:2176
llvm::format_hex_no_prefix
FormattedNumber format_hex_no_prefix(uint64_t N, unsigned Width, bool Upper=false)
format_hex_no_prefix - Output N as a fixed width hexadecimal.
Definition: Format.h:199
llvm::PatchPointOpers
MI-level patchpoint operands.
Definition: StackMaps.h:76
llvm::BitmaskEnumDetail::Mask
std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
llvm::MachineOperand::getOffset
int64_t getOffset() const
Return the offset from the symbol in this operand.
Definition: MachineOperand.h:600
llvm::StackMaps
Definition: StackMaps.h:251
llvm::ARCISD::BL
@ BL
Definition: ARCISelLowering.h:34
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::PPCFunctionInfo::getPICOffsetSymbol
MCSymbol * getPICOffsetSymbol(MachineFunction &MF) const
Definition: PPCMachineFunctionInfo.cpp:26
llvm::MachineOperand::MO_Register
@ MO_Register
Register operand.
Definition: MachineOperand.h:52
F
#define F(x, y, z)
Definition: MD5.cpp:56
llvm::GlobalVariable::hasInitializer
bool hasInitializer() const
Definitions have initializers, declarations don't.
Definition: GlobalVariable.h:92
MachineRegisterInfo.h
llvm::MCSymbolRefExpr::VK_PPC_L
@ VK_PPC_L
Definition: MCExpr.h:265
llvm::MCSymbolAttr
MCSymbolAttr
Definition: MCDirectives.h:18
llvm::XCOFF::TracebackTable::NumberOfVRSavedShift
static constexpr uint8_t NumberOfVRSavedShift
Definition: XCOFF.h:385
llvm::StackMaps::recordStackMap
void recordStackMap(const MCSymbol &L, const MachineInstr &MI)
Generate a stackmap record for a stackmap instruction.
Definition: StackMaps.cpp:524
llvm::PPCMCExpr::createLo
static const PPCMCExpr * createLo(const MCExpr *Expr, MCContext &Ctx)
Definition: PPCMCExpr.h:49
llvm::XCOFF::CsectProperties
Definition: XCOFF.h:412
llvm::XCOFF::TracebackTable::HasParmsOnStackMask
static constexpr uint32_t HasParmsOnStackMask
Definition: XCOFF.h:367
llvm::MCInst::setOpcode
void setOpcode(unsigned Op)
Definition: MCInst.h:197
llvm::ELF::SHT_PROGBITS
@ SHT_PROGBITS
Definition: ELF.h:910
llvm::ARMBuildAttrs::Section
@ Section
Legacy Tags.
Definition: ARMBuildAttributes.h:78
llvm::StringRef::substr
LLVM_NODISCARD StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:611
PPCInstPrinter.h
llvm::MachineBasicBlock::getSymbol
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
Definition: MachineBasicBlock.cpp:60
llvm::XCOFF::TracebackTable::HasTraceBackTableOffsetMask
static constexpr uint32_t HasTraceBackTableOffsetMask
Definition: XCOFF.h:332
PPCSubtarget.h
llvm::XCOFF::TracebackTable::NumberOfFixedParmsShift
static constexpr uint8_t NumberOfFixedParmsShift
Definition: XCOFF.h:363
llvm::getThePPC64LETarget
Target & getThePPC64LETarget()
Definition: PowerPCTargetInfo.cpp:25
R2
#define R2(n)
llvm::DenseMapInfo
Definition: APInt.h:34
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:636
llvm::MapVector::begin
iterator begin()
Definition: MapVector.h:69
Process.h
llvm::XCOFF::TracebackTable::GPRSavedShift
static constexpr uint32_t GPRSavedShift
Definition: XCOFF.h:359
GlobalValue.h
ELF.h
TargetMachine.h
llvm::GlobalValue::isDeclaration
bool isDeclaration() const
Return true if the primary definition of this global value is outside of the current translation unit...
Definition: Globals.cpp:228
llvm::GlobalValue::hasAppendingLinkage
bool hasAppendingLinkage() const
Definition: GlobalValue.h:442
ptrdiff_t
llvm::XCOFF::TracebackTable::IsCRSavedMask
static constexpr uint32_t IsCRSavedMask
Definition: XCOFF.h:345
llvm::PPCSubtarget
Definition: PPCSubtarget.h:71
llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::getTombstoneKey
static TOCKey getTombstoneKey()
Definition: PPCAsmPrinter.cpp:98
llvm::MCSymbolRefExpr::VK_PPC_TOC
@ VK_PPC_TOC
Definition: MCExpr.h:260
llvm::MachineOperand::MO_GlobalAddress
@ MO_GlobalAddress
Address of a global value.
Definition: MachineOperand.h:62
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:537
llvm::XCOFF::TracebackTable::NumberOfFloatingPointParmsShift
static constexpr uint8_t NumberOfFloatingPointParmsShift
Definition: XCOFF.h:368
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:724
llvm::PPCFunctionInfo::usesPICBase
bool usesPICBase() const
Definition: PPCMachineFunctionInfo.h:263
llvm::XCOFF::TB_SSP_CANARY
@ TB_SSP_CANARY
stack smasher canary present on stack.
Definition: XCOFF.h:403
llvm::MCSA_Extern
@ MCSA_Extern
.extern (XCOFF)
Definition: MCDirectives.h:32
llvm::PPCInstPrinter
Definition: PPCInstPrinter.h:21
Twine.h
llvm::GlobalObject
Definition: GlobalObject.h:28
MCSymbolELF.h
MCContext.h
llvm::AsmPrinter::SetupMachineFunction
virtual void SetupMachineFunction(MachineFunction &MF)
This should be called when a new MachineFunction is being processed from runOnMachineFunction.
Definition: AsmPrinter.cpp:1962
llvm::MCSymbolRefExpr::VK_DTPREL
@ VK_DTPREL
Definition: MCExpr.h:357
llvm::AsmPrinter::emitFunctionEntryLabel
virtual void emitFunctionEntryLabel()
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
Definition: AsmPrinter.cpp:843
MCSymbol.h
llvm::ms_demangle::QualifierMangleMode::Result
@ Result
llvm::AsmPrinter::emitStartOfAsmFile
virtual void emitStartOfAsmFile(Module &)
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: AsmPrinter.h:475
llvm::MCSA_LGlobal
@ MCSA_LGlobal
.lglobl (XCOFF)
Definition: MCDirectives.h:31
llvm::MCSymbolRefExpr::VK_PPC_U
@ VK_PPC_U
Definition: MCExpr.h:264
MCInst.h
llvm::XCOFF::TB_EH_INFO
@ TB_EH_INFO
Exception handling info present.
Definition: XCOFF.h:405
llvm::XCOFF::TracebackTable::IsAllocaUsedMask
static constexpr uint32_t IsAllocaUsedMask
Definition: XCOFF.h:343
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::CodeModel::Small
@ Small
Definition: CodeGen.h:28
createMCSymbolForTlsGetAddr
static MCSymbol * createMCSymbolForTlsGetAddr(MCContext &Ctx)
This helper function creates the TlsGetAddr MCSymbol for AIX.
Definition: PPCAsmPrinter.cpp:544
llvm::PPCSubtarget::isPPC64
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
Definition: PPCSubtarget.cpp:243
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:140
llvm::MCContext::getXCOFFSection
MCSectionXCOFF * getXCOFFSection(StringRef Section, SectionKind K, Optional< XCOFF::CsectProperties > CsectProp=None, bool MultiSymbolsAllowed=false, const char *BeginSymName=nullptr, Optional< XCOFF::DwarfSectionSubtypeFlags > DwarfSubtypeFlags=None)
Definition: MCContext.cpp:735
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::MCSymbolRefExpr::VK_PPC_NOTOC
@ VK_PPC_NOTOC
Definition: MCExpr.h:312
PPC.h
llvm::raw_ostream::flush
void flush()
Definition: raw_ostream.h:186
llvm::AArch64CC::PL
@ PL
Definition: AArch64BaseInfo.h:260
llvm::IndexedInstrProf::Version
const uint64_t Version
Definition: InstrProf.h:991
llvm::XCOFF::TracebackTable::HasControlledStorageMask
static constexpr uint32_t HasControlledStorageMask
Definition: XCOFF.h:334
SmallPtrSet.h
llvm::XCOFF::TracebackTable::NumberOfVRSavedMask
static constexpr uint16_t NumberOfVRSavedMask
Definition: XCOFF.h:382
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::SectionKind::getText
static SectionKind getText()
Definition: SectionKind.h:183
llvm::GlobalValue::InternalLinkage
@ InternalLinkage
Rename collisions when linking (static functions).
Definition: GlobalValue.h:55
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::Triple::isOSAIX
bool isOSAIX() const
Tests whether the OS is AIX.
Definition: Triple.h:627
llvm::MCSymbolRefExpr::VK_PPC_HA
@ VK_PPC_HA
Definition: MCExpr.h:249
MCSectionXCOFF.h
llvm::MCSymbol::print
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:59
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::TOCKey
std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > TOCKey
Definition: PPCAsmPrinter.cpp:93
llvm::detail::combineHashValue
static unsigned combineHashValue(unsigned a, unsigned b)
Simplistic combination of 32-bit hash values into 32-bit hash values.
Definition: DenseMapInfo.h:27
llvm::MCSymbolRefExpr::VK_PPC_LOCAL
@ VK_PPC_LOCAL
Definition: MCExpr.h:311
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::GlobalIndirectSymbol::getBaseObject
const GlobalObject * getBaseObject() const
Definition: Globals.cpp:467
llvm::MCInst::addOperand
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
llvm::SmallString< 128 >
llvm::PPCSubtarget::isGVIndirectSymbol
bool isGVIndirectSymbol(const GlobalValue *GV) const
True if the GV will be accessed via an indirect symbol.
Definition: PPCSubtarget.cpp:233
llvm::XCOFF::TracebackTable::LanguageID
LanguageID
Definition: XCOFF.h:303
PB
PassBuilder PB(Machine, PassOpts->PTO, None, &PIC)
llvm::XCOFF::TracebackTable::HasVarArgsMask
static constexpr uint16_t HasVarArgsMask
Definition: XCOFF.h:384
G
const DataFlowGraph & G
Definition: RDFGraph.cpp:202
llvm::PPCSubtarget::isAIXABI
bool isAIXABI() const
Definition: PPCSubtarget.h:345
llvm::MCSymbolXCOFF::setStorageClass
void setStorageClass(XCOFF::StorageClass SC)
Definition: MCSymbolXCOFF.h:37
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:626
llvm::SectionKind::isThreadBSSLocal
bool isThreadBSSLocal() const
Definition: SectionKind.h:157
llvm::PPCSubtarget::hasMFOCRF
bool hasMFOCRF() const
Definition: PPCSubtarget.h:283
llvm::Optional::getValueOr
constexpr T getValueOr(U &&value) const LLVM_LVALUE_FUNCTION
Definition: Optional.h:297
llvm::cl::opt< bool >
llvm::GlobalObject::hasSection
bool hasSection() const
Check if this global has a custom object file section.
Definition: GlobalObject.h:104
llvm::PPCFunctionInfo::getTOCOffsetSymbol
MCSymbol * getTOCOffsetSymbol(MachineFunction &MF) const
Definition: PPCMachineFunctionInfo.cpp:47
llvm::MCSymbolRefExpr::VK_PPC_TLSLD
@ VK_PPC_TLSLD
Definition: MCExpr.h:310
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:192
llvm::PPC::Predicate
Predicate
Predicate - These are "(BI << 5) | BO" for various predicates.
Definition: PPCPredicates.h:26
llvm::PPCFunctionInfo::mustSaveLR
bool mustSaveLR() const
Definition: PPCMachineFunctionInfo.h:187
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::PPCFunctionInfo::hasVectorParms
bool hasVectorParms() const
Definition: PPCMachineFunctionInfo.h:231
llvm::MCSymbolRefExpr::VariantKind
VariantKind
Definition: MCExpr.h:194
llvm::MachineOperand::getTargetFlags
unsigned getTargetFlags() const
Definition: MachineOperand.h:221
llvm::XCOFF::parseParmsTypeWithVecInfo
Expected< SmallString< 32 > > parseParmsTypeWithVecInfo(uint32_t Value, unsigned FixedParmsNum, unsigned FloatingParmsNum, unsigned VectorParmsNum)
Definition: XCOFF.cpp:188
llvm::MapVector::find
iterator find(const KeyT &Key)
Definition: MapVector.h:147
llvm::PPCII::MO_TLSGDM_FLAG
@ MO_TLSGDM_FLAG
MO_TLSGDM_FLAG - If this bit is set the symbol reference is relative to the region handle of TLS Gene...
Definition: PPC.h:135
llvm::AsmPrinter::GetCPISymbol
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
Definition: AsmPrinter.cpp:3125
Index
uint32_t Index
Definition: ELFObjHandler.cpp:84
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:321
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
convertToSinitPriority
static std::string convertToSinitPriority(int Priority)
Definition: PPCAsmPrinter.cpp:2624
PPCMCExpr.h
uint64_t
llvm::for_each
UnaryFunction for_each(R &&Range, UnaryFunction F)
Provide wrappers to std::for_each which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1540
llvm::GlobalValue::getVisibility
VisibilityTypes getVisibility() const
Definition: GlobalValue.h:229
llvm::XCOFF::parseVectorParmsType
Expected< SmallString< 32 > > parseVectorParmsType(uint32_t Value, unsigned ParmsNum)
Definition: XCOFF.cpp:240
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:572
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:132
llvm::MCSymbolRefExpr::VK_PPC_TOC_LO
@ VK_PPC_TOC_LO
Definition: MCExpr.h:261
llvm::GlobalValue::WeakAnyLinkage
@ WeakAnyLinkage
Keep one copy of named function when linking (weak)
Definition: GlobalValue.h:52
llvm::AsmPrinter::GetBlockAddressSymbol
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
Definition: AsmPrinter.cpp:3116
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::MCSymbolRefExpr::VK_PLT
@ VK_PLT
Definition: MCExpr.h:207
llvm::PPCSubtarget::is32BitELFABI
bool is32BitELFABI() const
Definition: PPCSubtarget.h:350
llvm::XCOFF::TracebackTable::CPlusPlus
@ CPlusPlus
Definition: XCOFF.h:313
llvm::DenseMap
Definition: DenseMap.h:714
MCSymbolXCOFF.h
llvm::ELF::SHF_WRITE
@ SHF_WRITE
Definition: ELF.h:985
EnableSSPCanaryBitInTB
static cl::opt< bool > EnableSSPCanaryBitInTB("aix-ssp-tb-bit", cl::init(false), cl::desc("Enable Passing SSP Canary info in Trackback on AIX"), cl::Hidden)
PPCInstrInfo.h
I
#define I(x, y, z)
Definition: MD5.cpp:59
PowerPCTargetInfo.h
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSGD
@ VK_PPC_GOT_TLSGD
Definition: MCExpr.h:294
llvm::MCSymbolRefExpr::VK_PPC_GOT_TPREL
@ VK_PPC_GOT_TPREL
Definition: MCExpr.h:285
llvm::MCInstBuilder
Definition: MCInstBuilder.h:21
llvm::MachineOperand::isCPI
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
Definition: MachineOperand.h:333
llvm::PPCFunctionInfo::getParmsType
uint32_t getParmsType() const
Definition: PPCMachineFunctionInfo.cpp:135
llvm::Value::print
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4598
llvm::MachineOperand::getType
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Definition: MachineOperand.h:219
llvm::MachineFunction::getName
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Definition: MachineFunction.cpp:541
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::AsmPrinter::getSymbol
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:486
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:79
llvm::PPCFunctionInfo::getGlobalEPSymbol
MCSymbol * getGlobalEPSymbol(MachineFunction &MF) const
Definition: PPCMachineFunctionInfo.cpp:33
llvm::move
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1605
llvm::PPCMCExpr::createHa
static const PPCMCExpr * createHa(const MCExpr *Expr, MCContext &Ctx)
Definition: PPCMCExpr.h:57
llvm::MCBinaryExpr::createSub
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:609
llvm::XCOFF::TracebackTable::IsFunctionNamePresentMask
static constexpr uint32_t IsFunctionNamePresentMask
Definition: XCOFF.h:342
llvm::PPCTargetStreamer::emitTCEntry
virtual void emitTCEntry(const MCSymbol &S, MCSymbolRefExpr::VariantKind Kind)=0
llvm::XCOFF::TracebackTable::FPRSavedMask
static constexpr uint32_t FPRSavedMask
Definition: XCOFF.h:352
llvm::WinEH::EncodingType::CE
@ CE
Windows NT (Windows on ARM)
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:360
llvm::PPCTargetStreamer::emitLocalEntry
virtual void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset)=0
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:67
llvm::PPCRegisterInfo::stripRegisterPrefix
static const char * stripRegisterPrefix(const char *RegName)
stripRegisterPrefix - This method strips the character prefix from a register name so that only the n...
Definition: PPCRegisterInfo.h:168
llvm::MCSymbolRefExpr
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
llvm::Value::printAsOperand
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:4675
llvm::GlobalObject::hasComdat
bool hasComdat() const
Definition: GlobalObject.h:122
llvm::MachineFunction
Definition: MachineFunction.h:230
llvm::MCSymbolRefExpr::VK_PPC_DTPREL_LO
@ VK_PPC_DTPREL_LO
Definition: MCExpr.h:276
llvm::GlobalValue::AppendingLinkage
@ AppendingLinkage
Special purpose, only applies to global arrays.
Definition: GlobalValue.h:54
Triple.h
llvm::AsmPrinter::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:341
llvm::XCOFF::parseParmsType
Expected< SmallString< 32 > > parseParmsType(uint32_t Value, unsigned FixedParmsNum, unsigned FloatingParmsNum)
Definition: XCOFF.cpp:110
llvm::MachineOperand::MO_JumpTableIndex
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
Definition: MachineOperand.h:60
llvm::XCOFF::TracebackTable::HasExtensionTableMask
static constexpr uint32_t HasExtensionTableMask
Definition: XCOFF.h:356
llvm::MCBinaryExpr::createAdd
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:524
llvm::MCSymbolRefExpr::VK_PPC_TOCBASE
@ VK_PPC_TOCBASE
Definition: MCExpr.h:259
llvm::XCOFF::TracebackTable::NumberOfVectorParmsShift
static constexpr uint8_t NumberOfVectorParmsShift
Definition: XCOFF.h:389
llvm::ELF::SHF_ALLOC
@ SHF_ALLOC
Definition: ELF.h:988
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:552
MCAsmInfo.h
llvm::MCSection::getAlignment
unsigned getAlignment() const
Definition: MCSection.h:138
DataLayout.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm::AsmPrinter::GetJTISymbol
MCSymbol * GetJTISymbol(unsigned JTID, bool isLinkerPrivate=false) const
Return the symbol for the specified jump table entry.
Definition: AsmPrinter.cpp:3153
llvm::MCInstBuilder::addImm
MCInstBuilder & addImm(int64_t Val)
Add a new integer immediate operand.
Definition: MCInstBuilder.h:37
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::Expected::get
reference get()
Returns a reference to the stored T value.
Definition: Error.h:569
llvm::GlobalValue::WeakODRLinkage
@ WeakODRLinkage
Same, but only replaced by something equivalent.
Definition: GlobalValue.h:53
uint32_t
llvm::PPCTargetStreamer::emitAbiVersion
virtual void emitAbiVersion(int AbiVersion)=0
llvm::MachineOperand::MO_MachineBasicBlock
@ MO_MachineBasicBlock
MachineBasicBlock reference.
Definition: MachineOperand.h:56
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::PPCTargetMachine::isPPC64
bool isPPC64() const
Definition: PPCTargetMachine.h:60
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::XCOFF::TracebackTable::IsFloatingPointPresentMask
static constexpr uint32_t IsFloatingPointPresentMask
Definition: XCOFF.h:336
llvm::PICLevel::Level
Level
Definition: CodeGen.h:33
llvm::MCInstBuilder::addExpr
MCInstBuilder & addExpr(const MCExpr *Val)
Add a new MCExpr operand.
Definition: MCInstBuilder.h:55
llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
@ VK_PPC_GOT_TLSLD_LO
Definition: MCExpr.h:302
llvm::GlobalValue::AvailableExternallyLinkage
@ AvailableExternallyLinkage
Available for inspection, not emission.
Definition: GlobalValue.h:49
llvm::Value::getName
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:297
llvm::StringSwitch::Cases
StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
Definition: StringSwitch.h:88
llvm::GlobalValue::CommonLinkage
@ CommonLinkage
Tentative definitions.
Definition: GlobalValue.h:58
isSpecialLLVMGlobalArrayToSkip
static bool isSpecialLLVMGlobalArrayToSkip(const GlobalVariable *GV)
Definition: PPCAsmPrinter.cpp:2286
llvm::SectionKind::isBSSLocal
bool isBSSLocal() const
Definition: SectionKind.h:164
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MapVector::end
iterator end()
Definition: MapVector.h:71
createPPCAsmPrinterPass
static AsmPrinter * createPPCAsmPrinterPass(TargetMachine &tm, std::unique_ptr< MCStreamer > &&Streamer)
Definition: PPCAsmPrinter.cpp:2689
llvm::XCOFF::TracebackTable::GPRSavedMask
static constexpr uint32_t GPRSavedMask
Definition: XCOFF.h:358
llvm::MachineFunction::getSection
MCSection * getSection() const
Returns the Section this function belongs to.
Definition: MachineFunction.h:581
llvm::getThePPC64Target
Target & getThePPC64Target()
Definition: PowerPCTargetInfo.cpp:21
llvm::MCSection::setAlignment
void setAlignment(Align Value)
Definition: MCSection.h:139
llvm::MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO
@ VK_PPC_GOT_TPREL_LO
Definition: MCExpr.h:286
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MapVector::empty
bool empty() const
Definition: MapVector.h:79
llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA
@ VK_PPC_GOT_TLSGD_HA
Definition: MCExpr.h:297
getMCSymbolForTOCPseudoMO
static MCSymbol * getMCSymbolForTOCPseudoMO(const MachineOperand &MO, AsmPrinter &AP)
Map a machine operand for a TOC pseudo-machine instruction to its corresponding MCSymbol.
Definition: PPCAsmPrinter.cpp:618
llvm::XCOFF::TracebackTable::IsInterruptHandlerMask
static constexpr uint32_t IsInterruptHandlerMask
Definition: XCOFF.h:341
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::ConstantExpr
A constant value that is initialized with an expression using other constant values.
Definition: Constants.h:936
llvm::SectionKind
SectionKind - This is a simple POD value that classifies the properties of a section.
Definition: SectionKind.h:22
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
std
Definition: BitVector.h:838
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:592
uint16_t
llvm::GlobalAlias::create
static GlobalAlias * create(Type *Ty, unsigned AddressSpace, LinkageTypes Linkage, const Twine &Name, Constant *Aliasee, Module *Parent)
If a parent module is specified, the alias is automatically inserted into the end of the specified mo...
Definition: Globals.cpp:485
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
GlobalVariable.h
llvm::MachineOperand::getIndex
int getIndex() const
Definition: MachineOperand.h:557
Casting.h
llvm::StackMaps::recordPatchPoint
void recordPatchPoint(const MCSymbol &L, const MachineInstr &MI)
Generate a stackmap record for a patchpoint instruction.
Definition: StackMaps.cpp:534
llvm::TargetLoweringObjectFileXCOFF::ShouldSetSSPCanaryBitInTB
static bool ShouldSetSSPCanaryBitInTB(const MachineFunction *MF)
Definition: TargetLoweringObjectFileImpl.cpp:2194
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::GlobalValue::ProtectedVisibility
@ ProtectedVisibility
The GV is protected.
Definition: GlobalValue.h:65
StackMaps.h
PPCTargetStreamer.h
llvm::getUniqueModuleId
std::string getUniqueModuleId(Module *M)
Produce a unique identifier for this module by taking the MD5 sum of the names of the module's strong...
Definition: ModuleUtils.cpp:244
llvm::PPCSubtarget::hasSPE
bool hasSPE() const
Definition: PPCSubtarget.h:266
llvm::AsmPrinter
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:82
llvm::MCSymbolRefExpr::create
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:385
llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::getHashValue
static unsigned getHashValue(const TOCKey &PairVal)
Definition: PPCAsmPrinter.cpp:101
llvm::SmallVectorImpl::clear
void clear()
Definition: SmallVector.h:585
llvm::MachineRegisterInfo::isPhysRegModified
bool isPhysRegModified(MCRegister PhysReg, bool SkipNoReturnDef=false) const
Return true if the specified register is modified in this function.
Definition: MachineRegisterInfo.cpp:570
llvm::MCSA_Global
@ MCSA_Global
.type _foo, @gnu_unique_object
Definition: MCDirectives.h:30
llvm::PPCTargetMachine
Common code between 32-bit and 64-bit PowerPC targets.
Definition: PPCTargetMachine.h:25
llvm::MachineOperand::isImm
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Definition: MachineOperand.h:323
SectionKind.h
llvm::MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA
@ VK_PPC_GOT_TPREL_HA
Definition: MCExpr.h:288
llvm::getThePPC32LETarget
Target & getThePPC32LETarget()
Definition: PowerPCTargetInfo.cpp:17
isSpecialLLVMGlobalArrayForStaticInit
static bool isSpecialLLVMGlobalArrayForStaticInit(const GlobalVariable *GV)
Definition: PPCAsmPrinter.cpp:2298
llvm::GlobalValue::ExternalLinkage
@ ExternalLinkage
Externally visible function.
Definition: GlobalValue.h:48
CodeGen.h
llvm::CodeModel::Large
@ Large
Definition: CodeGen.h:28
llvm::Expected::takeError
Error takeError()
Take ownership of the stored error.
Definition: Error.h:589
llvm::MCSA_Weak
@ MCSA_Weak
.weak
Definition: MCDirectives.h:44
llvm::PPCISD::MFOCRF
@ MFOCRF
R32 = MFOCRF(CRREG, INFLAG) - Represents the MFOCRF instruction.
Definition: PPCISelLowering.h:209
llvm::MCSymbolRefExpr::VK_PPC_DTPREL_HA
@ VK_PPC_DTPREL_HA
Definition: MCExpr.h:278
llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSLD
@ VK_PPC_GOT_TLSLD
Definition: MCExpr.h:301
llvm::sys::Process::getProcessId
static Pid getProcessId()
Get the process's identifier.
llvm::TargetLoweringObjectFileXCOFF::getStorageClassForGlobal
static XCOFF::StorageClass getStorageClassForGlobal(const GlobalValue *GV)
Definition: TargetLoweringObjectFileImpl.cpp:2467
llvm::GlobalValue::PrivateLinkage
@ PrivateLinkage
Like Internal, but omit from symbol table.
Definition: GlobalValue.h:56
llvm::PPCSubtarget::isUsingPCRelativeCalls
bool isUsingPCRelativeCalls() const
Definition: PPCSubtarget.cpp:245
llvm::PPCFunctionInfo::getFloatingPointParmsNum
unsigned getFloatingPointParmsNum() const
Definition: PPCMachineFunctionInfo.h:229
llvm::PPCSubtarget::hasAltivec
bool hasAltivec() const
Definition: PPCSubtarget.h:265
llvm::SectionKind::isGlobalWriteableData
bool isGlobalWriteableData() const
Definition: SectionKind.h:159
llvm::MCSymbolXCOFF
Definition: MCSymbolXCOFF.h:20
llvm::MachineOperand::getSymbolName
const char * getSymbolName() const
Definition: MachineOperand.h:608
llvm::TargetRegistry::RegisterAsmPrinter
static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn)
RegisterAsmPrinter - Register an AsmPrinter implementation for the given target.
Definition: TargetRegistry.h:903
llvm::PPCFunctionInfo::getMustSaveCRs
const SmallVectorImpl< Register > & getMustSaveCRs() const
Definition: PPCMachineFunctionInfo.h:259
llvm::MCSymbolRefExpr::VK_PPC_LO
@ VK_PPC_LO
Definition: MCExpr.h:247
ModuleUtils.h
llvm::MCSectionXCOFF::getQualNameSymbol
MCSymbolXCOFF * getQualNameSymbol() const
Definition: MCSectionXCOFF.h:102
MCStreamer.h
llvm::MCInst::getOperand
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:206
llvm::ARM::NameLength
size_t NameLength
Definition: ARMTargetParser.h:94
llvm::MCSectionSubPair
std::pair< MCSection *, const MCExpr * > MCSectionSubPair
Definition: MCStreamer.h:64
llvm::TargetMachine::getTargetTriple
const Triple & getTargetTriple() const
Definition: TargetMachine.h:128
PPCMachineFunctionInfo.h
llvm::GlobalValue::isDeclarationForLinker
bool isDeclarationForLinker() const
Definition: GlobalValue.h:534
llvm::raw_svector_ostream
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:658
llvm::codeview::CompileSym3Flags::Exp
@ Exp
llvm::MCInstBuilder::addReg
MCInstBuilder & addReg(unsigned Reg)
Add a new register operand.
Definition: MCInstBuilder.h:31
llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::getEmptyKey
static TOCKey getEmptyKey()
Definition: PPCAsmPrinter.cpp:95
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
MachineOperand.h
RegName
#define RegName(no)
llvm::XCOFF
Definition: XCOFF.h:24
llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA
@ VK_PPC_GOT_TLSLD_HA
Definition: MCExpr.h:304
llvm::Module::getDataLayout
const DataLayout & getDataLayout() const
Get the data layout for the module's target platform.
Definition: Module.cpp:401
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:42
llvm::GlobalValue::getValueType
Type * getValueType() const
Definition: GlobalValue.h:273
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::PPCFunctionInfo::getVecExtParmsType
uint32_t getVecExtParmsType() const
Definition: PPCMachineFunctionInfo.cpp:89
llvm::PPCFunctionInfo::getVectorParmsNum
unsigned getVectorParmsNum() const
Definition: PPCMachineFunctionInfo.h:230
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::XCOFF::getNameForTracebackTableLanguageId
StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId)
Definition: XCOFF.cpp:87
llvm::XCOFF::TracebackTable::NumberOfVectorParmsMask
static constexpr uint16_t NumberOfVectorParmsMask
Definition: XCOFF.h:387
llvm::MCSymbolRefExpr::VK_None
@ VK_None
Definition: MCExpr.h:195
llvm::XCOFF::TracebackTable::IsBackChainStoredMask
static constexpr uint32_t IsBackChainStoredMask
Definition: XCOFF.h:350
llvm::cl::desc
Definition: CommandLine.h:414
llvm::GlobalValue::ExternalWeakLinkage
@ ExternalWeakLinkage
ExternalWeak linkage description.
Definition: GlobalValue.h:57
llvm::PPCFunctionInfo::usesTOCBasePtr
bool usesTOCBasePtr() const
Definition: PPCMachineFunctionInfo.h:214
llvm::XCOFF::TracebackTable::FPRSavedShift
static constexpr uint32_t FPRSavedShift
Definition: XCOFF.h:353
raw_ostream.h
MachineFunction.h
PPCPredicates.h
llvm::GlobalValue::LinkOnceODRLinkage
@ LinkOnceODRLinkage
Same, but only replaced by something equivalent.
Definition: GlobalValue.h:51
llvm::MachineInstrBundleIterator< const MachineInstr >
TargetRegistry.h
llvm::PICLevel::BigPIC
@ BigPIC
Definition: CodeGen.h:33
MCExpr.h
llvm::PPCTargetStreamer
Definition: PPCTargetStreamer.h:21
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
Debug.h
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
PPCTargetMachine.h
llvm::AsmPrinter::PrintAsmOperand
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
Definition: AsmPrinterInlineAsm.cpp:599
llvm::sampleprof::Base
@ Base
Definition: Discriminator.h:58
llvm::MachineOperand::isGlobal
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
Definition: MachineOperand.h:339
llvm::getThePPC32Target
Target & getThePPC32Target()
Definition: PowerPCTargetInfo.cpp:13
llvm::MCOperand::getReg
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:69
llvm::PPCInstrInfo::isVRRegister
static bool isVRRegister(unsigned Reg)
Definition: PPCInstrInfo.h:588
llvm::PPCSubtarget::isELFv2ABI
bool isELFv2ABI() const
Definition: PPCSubtarget.cpp:242
llvm::MachineOperand::MO_ConstantPoolIndex
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
Definition: MachineOperand.h:58
llvm::AsmPrinter::doInitialization
bool doInitialization(Module &M) override
Set up the AsmPrinter when we are working on a new module.
Definition: AsmPrinter.cpp:267
getRegisterName
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
Definition: MIParser.cpp:1326
TargetLoweringObjectFileImpl.h