LLVM 19.0.0git
PPCAsmPrinter.cpp
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1//===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a printer that converts from our internal representation
10// of machine-dependent LLVM code to PowerPC assembly language. This printer is
11// the output mechanism used by `llc'.
12//
13// Documentation at http://developer.apple.com/documentation/DeveloperTools/
14// Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
15//
16//===----------------------------------------------------------------------===//
17
22#include "PPC.h"
23#include "PPCInstrInfo.h"
25#include "PPCSubtarget.h"
26#include "PPCTargetMachine.h"
27#include "PPCTargetStreamer.h"
29#include "llvm/ADT/MapVector.h"
30#include "llvm/ADT/SetVector.h"
31#include "llvm/ADT/Statistic.h"
33#include "llvm/ADT/StringRef.h"
34#include "llvm/ADT/Twine.h"
46#include "llvm/IR/DataLayout.h"
47#include "llvm/IR/GlobalValue.h"
49#include "llvm/IR/Module.h"
50#include "llvm/MC/MCAsmInfo.h"
51#include "llvm/MC/MCContext.h"
53#include "llvm/MC/MCExpr.h"
54#include "llvm/MC/MCInst.h"
58#include "llvm/MC/MCStreamer.h"
59#include "llvm/MC/MCSymbol.h"
60#include "llvm/MC/MCSymbolELF.h"
62#include "llvm/MC/SectionKind.h"
66#include "llvm/Support/Debug.h"
67#include "llvm/Support/Error.h"
76#include <algorithm>
77#include <cassert>
78#include <cstdint>
79#include <memory>
80#include <new>
81
82using namespace llvm;
83using namespace llvm::XCOFF;
84
85#define DEBUG_TYPE "asmprinter"
86
87STATISTIC(NumTOCEntries, "Number of Total TOC Entries Emitted.");
88STATISTIC(NumTOCConstPool, "Number of Constant Pool TOC Entries.");
89STATISTIC(NumTOCGlobalInternal,
90 "Number of Internal Linkage Global TOC Entries.");
91STATISTIC(NumTOCGlobalExternal,
92 "Number of External Linkage Global TOC Entries.");
93STATISTIC(NumTOCJumpTable, "Number of Jump Table TOC Entries.");
94STATISTIC(NumTOCThreadLocal, "Number of Thread Local TOC Entries.");
95STATISTIC(NumTOCBlockAddress, "Number of Block Address TOC Entries.");
96STATISTIC(NumTOCEHBlock, "Number of EH Block TOC Entries.");
97
99 "aix-ssp-tb-bit", cl::init(false),
100 cl::desc("Enable Passing SSP Canary info in Trackback on AIX"), cl::Hidden);
101
102// Specialize DenseMapInfo to allow
103// std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind> in DenseMap.
104// This specialization is needed here because that type is used as keys in the
105// map representing TOC entries.
106namespace llvm {
107template <>
108struct DenseMapInfo<std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>> {
109 using TOCKey = std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>;
110
111 static inline TOCKey getEmptyKey() {
113 }
114 static inline TOCKey getTombstoneKey() {
116 }
117 static unsigned getHashValue(const TOCKey &PairVal) {
120 DenseMapInfo<int>::getHashValue(PairVal.second));
121 }
122 static bool isEqual(const TOCKey &A, const TOCKey &B) { return A == B; }
123};
124} // end namespace llvm
125
126namespace {
127
128enum {
129 // GNU attribute tags for PowerPC ABI
130 Tag_GNU_Power_ABI_FP = 4,
131 Tag_GNU_Power_ABI_Vector = 8,
132 Tag_GNU_Power_ABI_Struct_Return = 12,
133
134 // GNU attribute values for PowerPC float ABI, as combination of two parts
135 Val_GNU_Power_ABI_NoFloat = 0b00,
136 Val_GNU_Power_ABI_HardFloat_DP = 0b01,
137 Val_GNU_Power_ABI_SoftFloat_DP = 0b10,
138 Val_GNU_Power_ABI_HardFloat_SP = 0b11,
139
140 Val_GNU_Power_ABI_LDBL_IBM128 = 0b0100,
141 Val_GNU_Power_ABI_LDBL_64 = 0b1000,
142 Val_GNU_Power_ABI_LDBL_IEEE128 = 0b1100,
143};
144
145class PPCAsmPrinter : public AsmPrinter {
146protected:
147 // For TLS on AIX, we need to be able to identify TOC entries of specific
148 // VariantKind so we can add the right relocations when we generate the
149 // entries. So each entry is represented by a pair of MCSymbol and
150 // VariantKind. For example, we need to be able to identify the following
151 // entry as a TLSGD entry so we can add the @m relocation:
152 // .tc .i[TC],i[TL]@m
153 // By default, VK_None is used for the VariantKind.
155 MCSymbol *>
156 TOC;
157 const PPCSubtarget *Subtarget = nullptr;
158
159 // Keep track of the number of TLS variables and their corresponding
160 // addresses, which is then used for the assembly printing of
161 // non-TOC-based local-exec variables.
162 MapVector<const GlobalValue *, uint64_t> TLSVarsToAddressMapping;
163
164public:
165 explicit PPCAsmPrinter(TargetMachine &TM,
166 std::unique_ptr<MCStreamer> Streamer)
167 : AsmPrinter(TM, std::move(Streamer)) {}
168
169 StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
170
171 enum TOCEntryType {
172 TOCType_ConstantPool,
173 TOCType_GlobalExternal,
174 TOCType_GlobalInternal,
175 TOCType_JumpTable,
176 TOCType_ThreadLocal,
177 TOCType_BlockAddress,
178 TOCType_EHBlock
179 };
180
181 MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym, TOCEntryType Type,
183 MCSymbolRefExpr::VariantKind::VK_None);
184
185 bool doInitialization(Module &M) override {
186 if (!TOC.empty())
187 TOC.clear();
189 }
190
191 void emitInstruction(const MachineInstr *MI) override;
192
193 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand,
194 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only.
195 /// The \p MI would be INLINEASM ONLY.
196 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
197
198 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override;
199 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
200 const char *ExtraCode, raw_ostream &O) override;
201 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
202 const char *ExtraCode, raw_ostream &O) override;
203
204 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
205 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
206 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
207 void EmitAIXTlsCallHelper(const MachineInstr *MI);
208 const MCExpr *getAdjustedFasterLocalExpr(const MachineOperand &MO,
209 int64_t Offset);
210 bool runOnMachineFunction(MachineFunction &MF) override {
211 Subtarget = &MF.getSubtarget<PPCSubtarget>();
212 bool Changed = AsmPrinter::runOnMachineFunction(MF);
214 return Changed;
215 }
216};
217
218/// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
219class PPCLinuxAsmPrinter : public PPCAsmPrinter {
220public:
221 explicit PPCLinuxAsmPrinter(TargetMachine &TM,
222 std::unique_ptr<MCStreamer> Streamer)
223 : PPCAsmPrinter(TM, std::move(Streamer)) {}
224
225 StringRef getPassName() const override {
226 return "Linux PPC Assembly Printer";
227 }
228
229 void emitGNUAttributes(Module &M);
230
231 void emitStartOfAsmFile(Module &M) override;
232 void emitEndOfAsmFile(Module &) override;
233
234 void emitFunctionEntryLabel() override;
235
236 void emitFunctionBodyStart() override;
237 void emitFunctionBodyEnd() override;
238 void emitInstruction(const MachineInstr *MI) override;
239};
240
241class PPCAIXAsmPrinter : public PPCAsmPrinter {
242private:
243 /// Symbols lowered from ExternalSymbolSDNodes, we will need to emit extern
244 /// linkage for them in AIX.
245 SmallSetVector<MCSymbol *, 8> ExtSymSDNodeSymbols;
246
247 /// A format indicator and unique trailing identifier to form part of the
248 /// sinit/sterm function names.
249 std::string FormatIndicatorAndUniqueModId;
250
251 // Record a list of GlobalAlias associated with a GlobalObject.
252 // This is used for AIX's extra-label-at-definition aliasing strategy.
254 GOAliasMap;
255
256 uint16_t getNumberOfVRSaved();
257 void emitTracebackTable();
258
260
261 void emitGlobalVariableHelper(const GlobalVariable *);
262
263 // Get the offset of an alias based on its AliaseeObject.
264 uint64_t getAliasOffset(const Constant *C);
265
266public:
267 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
268 : PPCAsmPrinter(TM, std::move(Streamer)) {
269 if (MAI->isLittleEndian())
271 "cannot create AIX PPC Assembly Printer for a little-endian target");
272 }
273
274 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; }
275
276 bool doInitialization(Module &M) override;
277
278 void emitXXStructorList(const DataLayout &DL, const Constant *List,
279 bool IsCtor) override;
280
281 void SetupMachineFunction(MachineFunction &MF) override;
282
283 void emitGlobalVariable(const GlobalVariable *GV) override;
284
285 void emitFunctionDescriptor() override;
286
287 void emitFunctionEntryLabel() override;
288
289 void emitFunctionBodyEnd() override;
290
291 void emitPGORefs(Module &M);
292
293 void emitEndOfAsmFile(Module &) override;
294
295 void emitLinkage(const GlobalValue *GV, MCSymbol *GVSym) const override;
296
297 void emitInstruction(const MachineInstr *MI) override;
298
299 bool doFinalization(Module &M) override;
300
301 void emitTTypeReference(const GlobalValue *GV, unsigned Encoding) override;
302
303 void emitModuleCommandLines(Module &M) override;
304};
305
306} // end anonymous namespace
307
308void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
309 raw_ostream &O) {
310 // Computing the address of a global symbol, not calling it.
311 const GlobalValue *GV = MO.getGlobal();
312 getSymbol(GV)->print(O, MAI);
313 printOffset(MO.getOffset(), O);
314}
315
316void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
317 raw_ostream &O) {
318 const DataLayout &DL = getDataLayout();
319 const MachineOperand &MO = MI->getOperand(OpNo);
320
321 switch (MO.getType()) {
323 // The MI is INLINEASM ONLY and UseVSXReg is always false.
325
326 // Linux assembler (Others?) does not take register mnemonics.
327 // FIXME - What about special registers used in mfspr/mtspr?
329 return;
330 }
332 O << MO.getImm();
333 return;
334
336 MO.getMBB()->getSymbol()->print(O, MAI);
337 return;
339 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
340 << MO.getIndex();
341 return;
343 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
344 return;
346 PrintSymbolOperand(MO, O);
347 return;
348 }
349
350 default:
351 O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
352 return;
353 }
354}
355
356/// PrintAsmOperand - Print out an operand for an inline asm expression.
357///
358bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
359 const char *ExtraCode, raw_ostream &O) {
360 // Does this asm operand have a single letter operand modifier?
361 if (ExtraCode && ExtraCode[0]) {
362 if (ExtraCode[1] != 0) return true; // Unknown modifier.
363
364 switch (ExtraCode[0]) {
365 default:
366 // See if this is a generic print operand
367 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
368 case 'L': // Write second word of DImode reference.
369 // Verify that this operand has two consecutive registers.
370 if (!MI->getOperand(OpNo).isReg() ||
371 OpNo+1 == MI->getNumOperands() ||
372 !MI->getOperand(OpNo+1).isReg())
373 return true;
374 ++OpNo; // Return the high-part.
375 break;
376 case 'I':
377 // Write 'i' if an integer constant, otherwise nothing. Used to print
378 // addi vs add, etc.
379 if (MI->getOperand(OpNo).isImm())
380 O << "i";
381 return false;
382 case 'x':
383 if(!MI->getOperand(OpNo).isReg())
384 return true;
385 // This operand uses VSX numbering.
386 // If the operand is a VMX register, convert it to a VSX register.
387 Register Reg = MI->getOperand(OpNo).getReg();
388 if (PPC::isVRRegister(Reg))
389 Reg = PPC::VSX32 + (Reg - PPC::V0);
390 else if (PPC::isVFRegister(Reg))
391 Reg = PPC::VSX32 + (Reg - PPC::VF0);
392 const char *RegName;
395 O << RegName;
396 return false;
397 }
398 }
399
400 printOperand(MI, OpNo, O);
401 return false;
402}
403
404// At the moment, all inline asm memory operands are a single register.
405// In any case, the output of this routine should always be just one
406// assembler operand.
407bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
408 const char *ExtraCode,
409 raw_ostream &O) {
410 if (ExtraCode && ExtraCode[0]) {
411 if (ExtraCode[1] != 0) return true; // Unknown modifier.
412
413 switch (ExtraCode[0]) {
414 default: return true; // Unknown modifier.
415 case 'L': // A memory reference to the upper word of a double word op.
416 O << getDataLayout().getPointerSize() << "(";
417 printOperand(MI, OpNo, O);
418 O << ")";
419 return false;
420 case 'y': // A memory reference for an X-form instruction
421 O << "0, ";
422 printOperand(MI, OpNo, O);
423 return false;
424 case 'I':
425 // Write 'i' if an integer constant, otherwise nothing. Used to print
426 // addi vs add, etc.
427 if (MI->getOperand(OpNo).isImm())
428 O << "i";
429 return false;
430 case 'U': // Print 'u' for update form.
431 case 'X': // Print 'x' for indexed form.
432 // FIXME: Currently for PowerPC memory operands are always loaded
433 // into a register, so we never get an update or indexed form.
434 // This is bad even for offset forms, since even if we know we
435 // have a value in -16(r1), we will generate a load into r<n>
436 // and then load from 0(r<n>). Until that issue is fixed,
437 // tolerate 'U' and 'X' but don't output anything.
438 assert(MI->getOperand(OpNo).isReg());
439 return false;
440 }
441 }
442
443 assert(MI->getOperand(OpNo).isReg());
444 O << "0(";
445 printOperand(MI, OpNo, O);
446 O << ")";
447 return false;
448}
449
450static void collectTOCStats(PPCAsmPrinter::TOCEntryType Type) {
451 ++NumTOCEntries;
452 switch (Type) {
453 case PPCAsmPrinter::TOCType_ConstantPool:
454 ++NumTOCConstPool;
455 break;
456 case PPCAsmPrinter::TOCType_GlobalInternal:
457 ++NumTOCGlobalInternal;
458 break;
459 case PPCAsmPrinter::TOCType_GlobalExternal:
460 ++NumTOCGlobalExternal;
461 break;
462 case PPCAsmPrinter::TOCType_JumpTable:
463 ++NumTOCJumpTable;
464 break;
465 case PPCAsmPrinter::TOCType_ThreadLocal:
466 ++NumTOCThreadLocal;
467 break;
468 case PPCAsmPrinter::TOCType_BlockAddress:
469 ++NumTOCBlockAddress;
470 break;
471 case PPCAsmPrinter::TOCType_EHBlock:
472 ++NumTOCEHBlock;
473 break;
474 }
475}
476
478 const TargetMachine &TM,
479 const MachineOperand &MO) {
480 CodeModel::Model ModuleModel = TM.getCodeModel();
481
482 // If the operand is not a global address then there is no
483 // global variable to carry an attribute.
485 return ModuleModel;
486
487 const GlobalValue *GV = MO.getGlobal();
488 assert(GV && "expected global for MO_GlobalAddress");
489
490 return S.getCodeModel(TM, GV);
491}
492
494 switch (CM) {
495 case CodeModel::Large:
497 return;
498 case CodeModel::Small:
500 return;
501 default:
502 report_fatal_error("Invalid code model for AIX");
503 }
504}
505
506/// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
507/// exists for it. If not, create one. Then return a symbol that references
508/// the TOC entry.
509MCSymbol *
510PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym, TOCEntryType Type,
512 // If this is a new TOC entry add statistics about it.
513 if (!TOC.contains({Sym, Kind}))
515
516 MCSymbol *&TOCEntry = TOC[{Sym, Kind}];
517 if (!TOCEntry)
518 TOCEntry = createTempSymbol("C");
519 return TOCEntry;
520}
521
522void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
523 unsigned NumNOPBytes = MI.getOperand(1).getImm();
524
525 auto &Ctx = OutStreamer->getContext();
526 MCSymbol *MILabel = Ctx.createTempSymbol();
527 OutStreamer->emitLabel(MILabel);
528
529 SM.recordStackMap(*MILabel, MI);
530 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
531
532 // Scan ahead to trim the shadow.
533 const MachineBasicBlock &MBB = *MI.getParent();
535 ++MII;
536 while (NumNOPBytes > 0) {
537 if (MII == MBB.end() || MII->isCall() ||
538 MII->getOpcode() == PPC::DBG_VALUE ||
539 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
540 MII->getOpcode() == TargetOpcode::STACKMAP)
541 break;
542 ++MII;
543 NumNOPBytes -= 4;
544 }
545
546 // Emit nops.
547 for (unsigned i = 0; i < NumNOPBytes; i += 4)
548 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
549}
550
551// Lower a patchpoint of the form:
552// [<def>], <id>, <numBytes>, <target>, <numArgs>
553void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
554 auto &Ctx = OutStreamer->getContext();
555 MCSymbol *MILabel = Ctx.createTempSymbol();
556 OutStreamer->emitLabel(MILabel);
557
558 SM.recordPatchPoint(*MILabel, MI);
559 PatchPointOpers Opers(&MI);
560
561 unsigned EncodedBytes = 0;
562 const MachineOperand &CalleeMO = Opers.getCallTarget();
563
564 if (CalleeMO.isImm()) {
565 int64_t CallTarget = CalleeMO.getImm();
566 if (CallTarget) {
567 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
568 "High 16 bits of call target should be zero.");
569 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
570 EncodedBytes = 0;
571 // Materialize the jump address:
572 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8)
573 .addReg(ScratchReg)
574 .addImm((CallTarget >> 32) & 0xFFFF));
575 ++EncodedBytes;
576 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC)
577 .addReg(ScratchReg)
578 .addReg(ScratchReg)
579 .addImm(32).addImm(16));
580 ++EncodedBytes;
581 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8)
582 .addReg(ScratchReg)
583 .addReg(ScratchReg)
584 .addImm((CallTarget >> 16) & 0xFFFF));
585 ++EncodedBytes;
586 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8)
587 .addReg(ScratchReg)
588 .addReg(ScratchReg)
589 .addImm(CallTarget & 0xFFFF));
590
591 // Save the current TOC pointer before the remote call.
592 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
593 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD)
594 .addReg(PPC::X2)
595 .addImm(TOCSaveOffset)
596 .addReg(PPC::X1));
597 ++EncodedBytes;
598
599 // If we're on ELFv1, then we need to load the actual function pointer
600 // from the function descriptor.
601 if (!Subtarget->isELFv2ABI()) {
602 // Load the new TOC pointer and the function address, but not r11
603 // (needing this is rare, and loading it here would prevent passing it
604 // via a 'nest' parameter.
605 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
606 .addReg(PPC::X2)
607 .addImm(8)
608 .addReg(ScratchReg));
609 ++EncodedBytes;
610 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
611 .addReg(ScratchReg)
612 .addImm(0)
613 .addReg(ScratchReg));
614 ++EncodedBytes;
615 }
616
617 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8)
618 .addReg(ScratchReg));
619 ++EncodedBytes;
620 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8));
621 ++EncodedBytes;
622
623 // Restore the TOC pointer after the call.
624 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
625 .addReg(PPC::X2)
626 .addImm(TOCSaveOffset)
627 .addReg(PPC::X1));
628 ++EncodedBytes;
629 }
630 } else if (CalleeMO.isGlobal()) {
631 const GlobalValue *GValue = CalleeMO.getGlobal();
632 MCSymbol *MOSymbol = getSymbol(GValue);
633 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext);
634
635 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP)
636 .addExpr(SymVar));
637 EncodedBytes += 2;
638 }
639
640 // Each instruction is 4 bytes.
641 EncodedBytes *= 4;
642
643 // Emit padding.
644 unsigned NumBytes = Opers.getNumPatchBytes();
645 assert(NumBytes >= EncodedBytes &&
646 "Patchpoint can't request size less than the length of a call.");
647 assert((NumBytes - EncodedBytes) % 4 == 0 &&
648 "Invalid number of NOP bytes requested!");
649 for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
650 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
651}
652
653/// This helper function creates the TlsGetAddr/TlsGetMod MCSymbol for AIX. We
654/// will create the csect and use the qual-name symbol instead of creating just
655/// the external symbol.
656static MCSymbol *createMCSymbolForTlsGetAddr(MCContext &Ctx, unsigned MIOpc) {
657 StringRef SymName;
658 switch (MIOpc) {
659 default:
660 SymName = ".__tls_get_addr";
661 break;
662 case PPC::GETtlsTpointer32AIX:
663 SymName = ".__get_tpointer";
664 break;
665 case PPC::GETtlsMOD32AIX:
666 case PPC::GETtlsMOD64AIX:
667 SymName = ".__tls_get_mod";
668 break;
669 }
670 return Ctx
674}
675
676void PPCAsmPrinter::EmitAIXTlsCallHelper(const MachineInstr *MI) {
677 assert(Subtarget->isAIXABI() &&
678 "Only expecting to emit calls to get the thread pointer on AIX!");
679
680 MCSymbol *TlsCall = createMCSymbolForTlsGetAddr(OutContext, MI->getOpcode());
681 const MCExpr *TlsRef =
683 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BLA).addExpr(TlsRef));
684}
685
686/// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
687/// call to __tls_get_addr to the current output stream.
688void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
691 unsigned Opcode = PPC::BL8_NOP_TLS;
692
693 assert(MI->getNumOperands() >= 3 && "Expecting at least 3 operands from MI");
694 if (MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||
695 MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSLD_PCREL_FLAG) {
697 Opcode = PPC::BL8_NOTOC_TLS;
698 }
699 const Module *M = MF->getFunction().getParent();
700
701 assert(MI->getOperand(0).isReg() &&
702 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
703 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
704 "GETtls[ld]ADDR[32] must define GPR3");
705 assert(MI->getOperand(1).isReg() &&
706 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
707 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
708 "GETtls[ld]ADDR[32] must read GPR3");
709
710 if (Subtarget->isAIXABI()) {
711 // For TLSGD, the variable offset should already be in R4 and the region
712 // handle should already be in R3. We generate an absolute branch to
713 // .__tls_get_addr. For TLSLD, the module handle should already be in R3.
714 // We generate an absolute branch to .__tls_get_mod.
715 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4;
716 (void)VarOffsetReg;
717 assert((MI->getOpcode() == PPC::GETtlsMOD32AIX ||
718 MI->getOpcode() == PPC::GETtlsMOD64AIX ||
719 (MI->getOperand(2).isReg() &&
720 MI->getOperand(2).getReg() == VarOffsetReg)) &&
721 "GETtls[ld]ADDR[32] must read GPR4");
722 EmitAIXTlsCallHelper(MI);
723 return;
724 }
725
726 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol("__tls_get_addr");
727
728 if (Subtarget->is32BitELFABI() && isPositionIndependent())
730
731 const MCExpr *TlsRef =
732 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);
733
734 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI.
735 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() &&
736 M->getPICLevel() == PICLevel::BigPIC)
738 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext);
739 const MachineOperand &MO = MI->getOperand(2);
740 const GlobalValue *GValue = MO.getGlobal();
741 MCSymbol *MOSymbol = getSymbol(GValue);
742 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
743 EmitToStreamer(*OutStreamer,
744 MCInstBuilder(Subtarget->isPPC64() ? Opcode
745 : (unsigned)PPC::BL_TLS)
746 .addExpr(TlsRef)
747 .addExpr(SymVar));
748}
749
750/// Map a machine operand for a TOC pseudo-machine instruction to its
751/// corresponding MCSymbol.
753 AsmPrinter &AP) {
754 switch (MO.getType()) {
756 return AP.getSymbol(MO.getGlobal());
758 return AP.GetCPISymbol(MO.getIndex());
760 return AP.GetJTISymbol(MO.getIndex());
763 default:
764 llvm_unreachable("Unexpected operand type to get symbol.");
765 }
766}
767
768static PPCAsmPrinter::TOCEntryType
770 // Use the target flags to determine if this MO is Thread Local.
771 // If we don't do this it comes out as Global.
773 return PPCAsmPrinter::TOCType_ThreadLocal;
774
775 switch (MO.getType()) {
777 const GlobalValue *GlobalV = MO.getGlobal();
778 GlobalValue::LinkageTypes Linkage = GlobalV->getLinkage();
779 if (Linkage == GlobalValue::ExternalLinkage ||
782 return PPCAsmPrinter::TOCType_GlobalExternal;
783
784 return PPCAsmPrinter::TOCType_GlobalInternal;
785 }
787 return PPCAsmPrinter::TOCType_ConstantPool;
789 return PPCAsmPrinter::TOCType_JumpTable;
791 return PPCAsmPrinter::TOCType_BlockAddress;
792 default:
793 llvm_unreachable("Unexpected operand type to get TOC type.");
794 }
795}
796/// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
797/// the current output stream.
798///
799void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
800 PPC_MC::verifyInstructionPredicates(MI->getOpcode(),
801 getSubtargetInfo().getFeatureBits());
802
803 MCInst TmpInst;
804 const bool IsPPC64 = Subtarget->isPPC64();
805 const bool IsAIX = Subtarget->isAIXABI();
806 const bool HasAIXSmallLocalTLS = Subtarget->hasAIXSmallLocalExecTLS() ||
807 Subtarget->hasAIXSmallLocalDynamicTLS();
808 const Module *M = MF->getFunction().getParent();
809 PICLevel::Level PL = M->getPICLevel();
810
811#ifndef NDEBUG
812 // Validate that SPE and FPU are mutually exclusive in codegen
813 if (!MI->isInlineAsm()) {
814 for (const MachineOperand &MO: MI->operands()) {
815 if (MO.isReg()) {
816 Register Reg = MO.getReg();
817 if (Subtarget->hasSPE()) {
818 if (PPC::F4RCRegClass.contains(Reg) ||
819 PPC::F8RCRegClass.contains(Reg) ||
820 PPC::VFRCRegClass.contains(Reg) ||
821 PPC::VRRCRegClass.contains(Reg) ||
822 PPC::VSFRCRegClass.contains(Reg) ||
823 PPC::VSSRCRegClass.contains(Reg)
824 )
825 llvm_unreachable("SPE targets cannot have FPRegs!");
826 } else {
827 if (PPC::SPERCRegClass.contains(Reg))
828 llvm_unreachable("SPE register found in FPU-targeted code!");
829 }
830 }
831 }
832 }
833#endif
834
835 auto getTOCRelocAdjustedExprForXCOFF = [this](const MCExpr *Expr,
836 ptrdiff_t OriginalOffset) {
837 // Apply an offset to the TOC-based expression such that the adjusted
838 // notional offset from the TOC base (to be encoded into the instruction's D
839 // or DS field) is the signed 16-bit truncation of the original notional
840 // offset from the TOC base.
841 // This is consistent with the treatment used both by XL C/C++ and
842 // by AIX ld -r.
843 ptrdiff_t Adjustment =
844 OriginalOffset - llvm::SignExtend32<16>(OriginalOffset);
846 Expr, MCConstantExpr::create(-Adjustment, OutContext), OutContext);
847 };
848
849 auto getTOCEntryLoadingExprForXCOFF =
850 [IsPPC64, getTOCRelocAdjustedExprForXCOFF,
851 this](const MCSymbol *MOSymbol, const MCExpr *Expr,
853 MCSymbolRefExpr::VariantKind::VK_None) -> const MCExpr * {
854 const unsigned EntryByteSize = IsPPC64 ? 8 : 4;
855 const auto TOCEntryIter = TOC.find({MOSymbol, VK});
856 assert(TOCEntryIter != TOC.end() &&
857 "Could not find the TOC entry for this symbol.");
858 const ptrdiff_t EntryDistanceFromTOCBase =
859 (TOCEntryIter - TOC.begin()) * EntryByteSize;
860 constexpr int16_t PositiveTOCRange = INT16_MAX;
861
862 if (EntryDistanceFromTOCBase > PositiveTOCRange)
863 return getTOCRelocAdjustedExprForXCOFF(Expr, EntryDistanceFromTOCBase);
864
865 return Expr;
866 };
867 auto GetVKForMO = [&](const MachineOperand &MO) {
868 // For TLS initial-exec and local-exec accesses on AIX, we have one TOC
869 // entry for the symbol (with the variable offset), which is differentiated
870 // by MO_TPREL_FLAG.
871 unsigned Flag = MO.getTargetFlags();
872 if (Flag == PPCII::MO_TPREL_FLAG ||
875 assert(MO.isGlobal() && "Only expecting a global MachineOperand here!\n");
876 TLSModel::Model Model = TM.getTLSModel(MO.getGlobal());
877 if (Model == TLSModel::LocalExec)
878 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE;
879 if (Model == TLSModel::InitialExec)
880 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
881 // On AIX, TLS model opt may have turned local-dynamic accesses into
882 // initial-exec accesses.
883 PPCFunctionInfo *FuncInfo = MF->getInfo<PPCFunctionInfo>();
884 if (Model == TLSModel::LocalDynamic &&
885 FuncInfo->isAIXFuncUseTLSIEForLD()) {
887 dbgs() << "Current function uses IE access for default LD vars.\n");
888 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
889 }
890 llvm_unreachable("Only expecting local-exec or initial-exec accesses!");
891 }
892 // For GD TLS access on AIX, we have two TOC entries for the symbol (one for
893 // the variable offset and the other for the region handle). They are
894 // differentiated by MO_TLSGD_FLAG and MO_TLSGDM_FLAG.
895 if (Flag == PPCII::MO_TLSGDM_FLAG)
896 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM;
898 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD;
899 // For local-dynamic TLS access on AIX, we have one TOC entry for the symbol
900 // (the variable offset) and one shared TOC entry for the module handle.
901 // They are differentiated by MO_TLSLD_FLAG and MO_TLSLDM_FLAG.
902 if (Flag == PPCII::MO_TLSLD_FLAG && IsAIX)
903 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD;
904 if (Flag == PPCII::MO_TLSLDM_FLAG && IsAIX)
905 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSML;
906 return MCSymbolRefExpr::VariantKind::VK_None;
907 };
908
909 // Lower multi-instruction pseudo operations.
910 switch (MI->getOpcode()) {
911 default: break;
912 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
913 assert(!Subtarget->isAIXABI() &&
914 "AIX does not support patchable function entry!");
915 // PATCHABLE_FUNCTION_ENTER on little endian is for XRAY support which is
916 // handled in PPCLinuxAsmPrinter.
917 if (MAI->isLittleEndian())
918 return;
919 const Function &F = MF->getFunction();
920 unsigned Num = 0;
921 (void)F.getFnAttribute("patchable-function-entry")
922 .getValueAsString()
923 .getAsInteger(10, Num);
924 if (!Num)
925 return;
926 emitNops(Num);
927 return;
928 }
929 case TargetOpcode::DBG_VALUE:
930 llvm_unreachable("Should be handled target independently");
931 case TargetOpcode::STACKMAP:
932 return LowerSTACKMAP(SM, *MI);
933 case TargetOpcode::PATCHPOINT:
934 return LowerPATCHPOINT(SM, *MI);
935
936 case PPC::MoveGOTtoLR: {
937 // Transform %lr = MoveGOTtoLR
938 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
939 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
940 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
941 // blrl
942 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
943 MCSymbol *GOTSymbol =
944 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
945 const MCExpr *OffsExpr =
948 OutContext),
949 MCConstantExpr::create(4, OutContext),
950 OutContext);
951
952 // Emit the 'bl'.
953 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr));
954 return;
955 }
956 case PPC::MovePCtoLR:
957 case PPC::MovePCtoLR8: {
958 // Transform %lr = MovePCtoLR
959 // Into this, where the label is the PIC base:
960 // bl L1$pb
961 // L1$pb:
962 MCSymbol *PICBase = MF->getPICBaseSymbol();
963
964 // Emit the 'bl'.
965 EmitToStreamer(*OutStreamer,
966 MCInstBuilder(PPC::BL)
967 // FIXME: We would like an efficient form for this, so we
968 // don't have to do a lot of extra uniquing.
969 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
970
971 // Emit the label.
972 OutStreamer->emitLabel(PICBase);
973 return;
974 }
975 case PPC::UpdateGBR: {
976 // Transform %rd = UpdateGBR(%rt, %ri)
977 // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
978 // add %rd, %rt, %ri
979 // or into (if secure plt mode is on):
980 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha
981 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l
982 // Get the offset from the GOT Base Register to the GOT
983 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
984 if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
985 unsigned PICR = TmpInst.getOperand(0).getReg();
986 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(
987 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_"
988 : ".LTOC");
989 const MCExpr *PB =
990 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext);
991
992 const MCExpr *DeltaExpr = MCBinaryExpr::createSub(
993 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext);
994
995 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, OutContext);
996 EmitToStreamer(
997 *OutStreamer,
998 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi));
999
1000 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, OutContext);
1001 EmitToStreamer(
1002 *OutStreamer,
1003 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo));
1004 return;
1005 } else {
1006 MCSymbol *PICOffset =
1007 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(*MF);
1008 TmpInst.setOpcode(PPC::LWZ);
1009 const MCExpr *Exp =
1010 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext);
1011 const MCExpr *PB =
1012 MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
1014 OutContext);
1015 const MCOperand TR = TmpInst.getOperand(1);
1016 const MCOperand PICR = TmpInst.getOperand(0);
1017
1018 // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
1019 TmpInst.getOperand(1) =
1021 TmpInst.getOperand(0) = TR;
1022 TmpInst.getOperand(2) = PICR;
1023 EmitToStreamer(*OutStreamer, TmpInst);
1024
1025 TmpInst.setOpcode(PPC::ADD4);
1026 TmpInst.getOperand(0) = PICR;
1027 TmpInst.getOperand(1) = TR;
1028 TmpInst.getOperand(2) = PICR;
1029 EmitToStreamer(*OutStreamer, TmpInst);
1030 return;
1031 }
1032 }
1033 case PPC::LWZtoc: {
1034 // Transform %rN = LWZtoc @op1, %r2
1035 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1036
1037 // Change the opcode to LWZ.
1038 TmpInst.setOpcode(PPC::LWZ);
1039
1040 const MachineOperand &MO = MI->getOperand(1);
1041 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1042 "Invalid operand for LWZtoc.");
1043
1044 // Map the operand to its corresponding MCSymbol.
1045 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1046
1047 // Create a reference to the GOT entry for the symbol. The GOT entry will be
1048 // synthesized later.
1049 if (PL == PICLevel::SmallPIC && !IsAIX) {
1050 const MCExpr *Exp =
1052 OutContext);
1053 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1054 EmitToStreamer(*OutStreamer, TmpInst);
1055 return;
1056 }
1057
1058 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1059
1060 // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the
1061 // storage allocated in the TOC which contains the address of
1062 // 'MOSymbol'. Said TOC entry will be synthesized later.
1063 MCSymbol *TOCEntry =
1064 lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
1065 const MCExpr *Exp =
1067
1068 // AIX uses the label directly as the lwz displacement operand for
1069 // references into the toc section. The displacement value will be generated
1070 // relative to the toc-base.
1071 if (IsAIX) {
1072 assert(
1073 getCodeModel(*Subtarget, TM, MO) == CodeModel::Small &&
1074 "This pseudo should only be selected for 32-bit small code model.");
1075 Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK);
1076 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1077
1078 // Print MO for better readability
1079 if (isVerbose())
1080 OutStreamer->getCommentOS() << MO << '\n';
1081 EmitToStreamer(*OutStreamer, TmpInst);
1082 return;
1083 }
1084
1085 // Create an explicit subtract expression between the local symbol and
1086 // '.LTOC' to manifest the toc-relative offset.
1088 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext);
1089 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext);
1090 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1091 EmitToStreamer(*OutStreamer, TmpInst);
1092 return;
1093 }
1094 case PPC::ADDItoc:
1095 case PPC::ADDItoc8: {
1096 assert(IsAIX && TM.getCodeModel() == CodeModel::Small &&
1097 "PseudoOp only valid for small code model AIX");
1098
1099 // Transform %rN = ADDItoc/8 %r2, @op1.
1100 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1101
1102 // Change the opcode to load address.
1103 TmpInst.setOpcode((!IsPPC64) ? (PPC::LA) : (PPC::LA8));
1104
1105 const MachineOperand &MO = MI->getOperand(2);
1106 assert(MO.isGlobal() && "Invalid operand for ADDItoc[8].");
1107
1108 // Map the operand to its corresponding MCSymbol.
1109 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1110
1111 const MCExpr *Exp =
1113
1114 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
1115 EmitToStreamer(*OutStreamer, TmpInst);
1116 return;
1117 }
1118 case PPC::LDtocJTI:
1119 case PPC::LDtocCPT:
1120 case PPC::LDtocBA:
1121 case PPC::LDtoc: {
1122 // Transform %x3 = LDtoc @min1, %x2
1123 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1124
1125 // Change the opcode to LD.
1126 TmpInst.setOpcode(PPC::LD);
1127
1128 const MachineOperand &MO = MI->getOperand(1);
1129 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1130 "Invalid operand!");
1131
1132 // Map the operand to its corresponding MCSymbol.
1133 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1134
1135 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1136
1137 // Map the machine operand to its corresponding MCSymbol, then map the
1138 // global address operand to be a reference to the TOC entry we will
1139 // synthesize later.
1140 MCSymbol *TOCEntry =
1141 lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
1142
1145 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, VKExpr, OutContext);
1146 TmpInst.getOperand(1) = MCOperand::createExpr(
1147 IsAIX ? getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK) : Exp);
1148
1149 // Print MO for better readability
1150 if (isVerbose() && IsAIX)
1151 OutStreamer->getCommentOS() << MO << '\n';
1152 EmitToStreamer(*OutStreamer, TmpInst);
1153 return;
1154 }
1155 case PPC::ADDIStocHA: {
1156 const MachineOperand &MO = MI->getOperand(2);
1157
1158 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1159 "Invalid operand for ADDIStocHA.");
1160 assert((IsAIX && !IsPPC64 &&
1161 getCodeModel(*Subtarget, TM, MO) == CodeModel::Large) &&
1162 "This pseudo should only be selected for 32-bit large code model on"
1163 " AIX.");
1164
1165 // Transform %rd = ADDIStocHA %rA, @sym(%r2)
1166 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1167
1168 // Change the opcode to ADDIS.
1169 TmpInst.setOpcode(PPC::ADDIS);
1170
1171 // Map the machine operand to its corresponding MCSymbol.
1172 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1173
1174 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1175
1176 // Map the global address operand to be a reference to the TOC entry we
1177 // will synthesize later. 'TOCEntry' is a label used to reference the
1178 // storage allocated in the TOC which contains the address of 'MOSymbol'.
1179 // If the symbol does not have the toc-data attribute, then we create the
1180 // TOC entry on AIX. If the toc-data attribute is used, the TOC entry
1181 // contains the data rather than the address of the MOSymbol.
1182 if (![](const MachineOperand &MO) {
1183 if (!MO.isGlobal())
1184 return false;
1185
1186 const GlobalVariable *GV = dyn_cast<GlobalVariable>(MO.getGlobal());
1187 if (!GV)
1188 return false;
1189 return GV->hasAttribute("toc-data");
1190 }(MO)) {
1191 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
1192 }
1193
1195 MOSymbol, MCSymbolRefExpr::VK_PPC_U, OutContext);
1196 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
1197 EmitToStreamer(*OutStreamer, TmpInst);
1198 return;
1199 }
1200 case PPC::LWZtocL: {
1201 const MachineOperand &MO = MI->getOperand(1);
1202
1203 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1204 "Invalid operand for LWZtocL.");
1205 assert(IsAIX && !IsPPC64 &&
1206 getCodeModel(*Subtarget, TM, MO) == CodeModel::Large &&
1207 "This pseudo should only be selected for 32-bit large code model on"
1208 " AIX.");
1209
1210 // Transform %rd = LWZtocL @sym, %rs.
1211 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1212
1213 // Change the opcode to lwz.
1214 TmpInst.setOpcode(PPC::LWZ);
1215
1216 // Map the machine operand to its corresponding MCSymbol.
1217 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1218
1219 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1220
1221 // Always use TOC on AIX. Map the global address operand to be a reference
1222 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to
1223 // reference the storage allocated in the TOC which contains the address of
1224 // 'MOSymbol'.
1225 MCSymbol *TOCEntry =
1226 lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
1227 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry,
1229 OutContext);
1230 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1231 EmitToStreamer(*OutStreamer, TmpInst);
1232 return;
1233 }
1234 case PPC::ADDIStocHA8: {
1235 // Transform %xd = ADDIStocHA8 %x2, @sym
1236 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1237
1238 // Change the opcode to ADDIS8. If the global address is the address of
1239 // an external symbol, is a jump table address, is a block address, or is a
1240 // constant pool index with large code model enabled, then generate a TOC
1241 // entry and reference that. Otherwise, reference the symbol directly.
1242 TmpInst.setOpcode(PPC::ADDIS8);
1243
1244 const MachineOperand &MO = MI->getOperand(2);
1245 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1246 "Invalid operand for ADDIStocHA8!");
1247
1248 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1249
1250 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1251
1252 const bool GlobalToc =
1253 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal());
1254
1255 const CodeModel::Model CM =
1256 IsAIX ? getCodeModel(*Subtarget, TM, MO) : TM.getCodeModel();
1257
1258 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
1259 (MO.isCPI() && CM == CodeModel::Large))
1260 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
1261
1263
1264 const MCExpr *Exp =
1265 MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
1266
1267 if (!MO.isJTI() && MO.getOffset())
1270 OutContext),
1271 OutContext);
1272
1273 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
1274 EmitToStreamer(*OutStreamer, TmpInst);
1275 return;
1276 }
1277 case PPC::LDtocL: {
1278 // Transform %xd = LDtocL @sym, %xs
1279 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1280
1281 // Change the opcode to LD. If the global address is the address of
1282 // an external symbol, is a jump table address, is a block address, or is
1283 // a constant pool index with large code model enabled, then generate a
1284 // TOC entry and reference that. Otherwise, reference the symbol directly.
1285 TmpInst.setOpcode(PPC::LD);
1286
1287 const MachineOperand &MO = MI->getOperand(1);
1288 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
1289 MO.isBlockAddress()) &&
1290 "Invalid operand for LDtocL!");
1291
1293 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1294 "LDtocL used on symbol that could be accessed directly is "
1295 "invalid. Must match ADDIStocHA8."));
1296
1297 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1298
1299 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
1300 CodeModel::Model CM =
1301 IsAIX ? getCodeModel(*Subtarget, TM, MO) : TM.getCodeModel();
1302 if (!MO.isCPI() || CM == CodeModel::Large)
1303 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
1304
1306 const MCExpr *Exp =
1307 MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
1308 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1309 EmitToStreamer(*OutStreamer, TmpInst);
1310 return;
1311 }
1312 case PPC::ADDItocL:
1313 case PPC::ADDItocL8: {
1314 // Transform %xd = ADDItocL %xs, @sym
1315 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1316
1317 unsigned Op = MI->getOpcode();
1318
1319 // Change the opcode to load address for toc-data.
1320 // ADDItocL is only used for 32-bit toc-data on AIX and will always use LA.
1321 TmpInst.setOpcode(Op == PPC::ADDItocL8 ? (IsAIX ? PPC::LA8 : PPC::ADDI8)
1322 : PPC::LA);
1323
1324 const MachineOperand &MO = MI->getOperand(2);
1325 assert((Op == PPC::ADDItocL8)
1326 ? (MO.isGlobal() || MO.isCPI())
1327 : MO.isGlobal() && "Invalid operand for ADDItocL8.");
1328 assert(!(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1329 "Interposable definitions must use indirect accesses.");
1330
1331 // Map the operand to its corresponding MCSymbol.
1332 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
1333
1335 MOSymbol,
1337 OutContext);
1338
1339 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
1340 EmitToStreamer(*OutStreamer, TmpInst);
1341 return;
1342 }
1343 case PPC::ADDISgotTprelHA: {
1344 // Transform: %xd = ADDISgotTprelHA %x2, @sym
1345 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
1346 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1347 const MachineOperand &MO = MI->getOperand(2);
1348 const GlobalValue *GValue = MO.getGlobal();
1349 MCSymbol *MOSymbol = getSymbol(GValue);
1350 const MCExpr *SymGotTprel =
1352 OutContext);
1353 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1354 .addReg(MI->getOperand(0).getReg())
1355 .addReg(MI->getOperand(1).getReg())
1356 .addExpr(SymGotTprel));
1357 return;
1358 }
1359 case PPC::LDgotTprelL:
1360 case PPC::LDgotTprelL32: {
1361 // Transform %xd = LDgotTprelL @sym, %xs
1362 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1363
1364 // Change the opcode to LD.
1365 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ);
1366 const MachineOperand &MO = MI->getOperand(1);
1367 const GlobalValue *GValue = MO.getGlobal();
1368 MCSymbol *MOSymbol = getSymbol(GValue);
1370 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO
1372 OutContext);
1373 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
1374 EmitToStreamer(*OutStreamer, TmpInst);
1375 return;
1376 }
1377
1378 case PPC::PPC32PICGOT: {
1379 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
1380 MCSymbol *GOTRef = OutContext.createTempSymbol();
1381 MCSymbol *NextInstr = OutContext.createTempSymbol();
1382
1383 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
1384 // FIXME: We would like an efficient form for this, so we don't have to do
1385 // a lot of extra uniquing.
1386 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));
1387 const MCExpr *OffsExpr =
1388 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),
1389 MCSymbolRefExpr::create(GOTRef, OutContext),
1390 OutContext);
1391 OutStreamer->emitLabel(GOTRef);
1392 OutStreamer->emitValue(OffsExpr, 4);
1393 OutStreamer->emitLabel(NextInstr);
1394 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR)
1395 .addReg(MI->getOperand(0).getReg()));
1396 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ)
1397 .addReg(MI->getOperand(1).getReg())
1398 .addImm(0)
1399 .addReg(MI->getOperand(0).getReg()));
1400 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
1401 .addReg(MI->getOperand(0).getReg())
1402 .addReg(MI->getOperand(1).getReg())
1403 .addReg(MI->getOperand(0).getReg()));
1404 return;
1405 }
1406 case PPC::PPC32GOT: {
1407 MCSymbol *GOTSymbol =
1408 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
1409 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
1410 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
1411 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
1412 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
1413 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
1414 .addReg(MI->getOperand(0).getReg())
1415 .addExpr(SymGotTlsL));
1416 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1417 .addReg(MI->getOperand(0).getReg())
1418 .addReg(MI->getOperand(0).getReg())
1419 .addExpr(SymGotTlsHA));
1420 return;
1421 }
1422 case PPC::ADDIStlsgdHA: {
1423 // Transform: %xd = ADDIStlsgdHA %x2, @sym
1424 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
1425 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1426 const MachineOperand &MO = MI->getOperand(2);
1427 const GlobalValue *GValue = MO.getGlobal();
1428 MCSymbol *MOSymbol = getSymbol(GValue);
1429 const MCExpr *SymGotTlsGD =
1431 OutContext);
1432 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1433 .addReg(MI->getOperand(0).getReg())
1434 .addReg(MI->getOperand(1).getReg())
1435 .addExpr(SymGotTlsGD));
1436 return;
1437 }
1438 case PPC::ADDItlsgdL:
1439 // Transform: %xd = ADDItlsgdL %xs, @sym
1440 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l
1441 case PPC::ADDItlsgdL32: {
1442 // Transform: %rd = ADDItlsgdL32 %rs, @sym
1443 // Into: %rd = ADDI %rs, sym@got@tlsgd
1444 const MachineOperand &MO = MI->getOperand(2);
1445 const GlobalValue *GValue = MO.getGlobal();
1446 MCSymbol *MOSymbol = getSymbol(GValue);
1447 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create(
1448 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
1450 OutContext);
1451 EmitToStreamer(*OutStreamer,
1452 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1453 .addReg(MI->getOperand(0).getReg())
1454 .addReg(MI->getOperand(1).getReg())
1455 .addExpr(SymGotTlsGD));
1456 return;
1457 }
1458 case PPC::GETtlsMOD32AIX:
1459 case PPC::GETtlsMOD64AIX:
1460 // Transform: %r3 = GETtlsMODNNAIX %r3 (for NN == 32/64).
1461 // Into: BLA .__tls_get_mod()
1462 // Input parameter is a module handle (_$TLSML[TC]@ml) for all variables.
1463 case PPC::GETtlsADDR:
1464 // Transform: %x3 = GETtlsADDR %x3, @sym
1465 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
1466 case PPC::GETtlsADDRPCREL:
1467 case PPC::GETtlsADDR32AIX:
1468 case PPC::GETtlsADDR64AIX:
1469 // Transform: %r3 = GETtlsADDRNNAIX %r3, %r4 (for NN == 32/64).
1470 // Into: BLA .__tls_get_addr()
1471 // Unlike on Linux, there is no symbol or relocation needed for this call.
1472 case PPC::GETtlsADDR32: {
1473 // Transform: %r3 = GETtlsADDR32 %r3, @sym
1474 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
1475 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
1476 return;
1477 }
1478 case PPC::GETtlsTpointer32AIX: {
1479 // Transform: %r3 = GETtlsTpointer32AIX
1480 // Into: BLA .__get_tpointer()
1481 EmitAIXTlsCallHelper(MI);
1482 return;
1483 }
1484 case PPC::ADDIStlsldHA: {
1485 // Transform: %xd = ADDIStlsldHA %x2, @sym
1486 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha
1487 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1488 const MachineOperand &MO = MI->getOperand(2);
1489 const GlobalValue *GValue = MO.getGlobal();
1490 MCSymbol *MOSymbol = getSymbol(GValue);
1491 const MCExpr *SymGotTlsLD =
1493 OutContext);
1494 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1495 .addReg(MI->getOperand(0).getReg())
1496 .addReg(MI->getOperand(1).getReg())
1497 .addExpr(SymGotTlsLD));
1498 return;
1499 }
1500 case PPC::ADDItlsldL:
1501 // Transform: %xd = ADDItlsldL %xs, @sym
1502 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l
1503 case PPC::ADDItlsldL32: {
1504 // Transform: %rd = ADDItlsldL32 %rs, @sym
1505 // Into: %rd = ADDI %rs, sym@got@tlsld
1506 const MachineOperand &MO = MI->getOperand(2);
1507 const GlobalValue *GValue = MO.getGlobal();
1508 MCSymbol *MOSymbol = getSymbol(GValue);
1509 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create(
1510 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
1512 OutContext);
1513 EmitToStreamer(*OutStreamer,
1514 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1515 .addReg(MI->getOperand(0).getReg())
1516 .addReg(MI->getOperand(1).getReg())
1517 .addExpr(SymGotTlsLD));
1518 return;
1519 }
1520 case PPC::GETtlsldADDR:
1521 // Transform: %x3 = GETtlsldADDR %x3, @sym
1522 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
1523 case PPC::GETtlsldADDRPCREL:
1524 case PPC::GETtlsldADDR32: {
1525 // Transform: %r3 = GETtlsldADDR32 %r3, @sym
1526 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
1527 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
1528 return;
1529 }
1530 case PPC::ADDISdtprelHA:
1531 // Transform: %xd = ADDISdtprelHA %xs, @sym
1532 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha
1533 case PPC::ADDISdtprelHA32: {
1534 // Transform: %rd = ADDISdtprelHA32 %rs, @sym
1535 // Into: %rd = ADDIS %rs, sym@dtprel@ha
1536 const MachineOperand &MO = MI->getOperand(2);
1537 const GlobalValue *GValue = MO.getGlobal();
1538 MCSymbol *MOSymbol = getSymbol(GValue);
1539 const MCExpr *SymDtprel =
1541 OutContext);
1542 EmitToStreamer(
1543 *OutStreamer,
1544 MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS)
1545 .addReg(MI->getOperand(0).getReg())
1546 .addReg(MI->getOperand(1).getReg())
1547 .addExpr(SymDtprel));
1548 return;
1549 }
1550 case PPC::PADDIdtprel: {
1551 // Transform: %rd = PADDIdtprel %rs, @sym
1552 // Into: %rd = PADDI8 %rs, sym@dtprel
1553 const MachineOperand &MO = MI->getOperand(2);
1554 const GlobalValue *GValue = MO.getGlobal();
1555 MCSymbol *MOSymbol = getSymbol(GValue);
1556 const MCExpr *SymDtprel = MCSymbolRefExpr::create(
1557 MOSymbol, MCSymbolRefExpr::VK_DTPREL, OutContext);
1558 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::PADDI8)
1559 .addReg(MI->getOperand(0).getReg())
1560 .addReg(MI->getOperand(1).getReg())
1561 .addExpr(SymDtprel));
1562 return;
1563 }
1564
1565 case PPC::ADDIdtprelL:
1566 // Transform: %xd = ADDIdtprelL %xs, @sym
1567 // Into: %xd = ADDI8 %xs, sym@dtprel@l
1568 case PPC::ADDIdtprelL32: {
1569 // Transform: %rd = ADDIdtprelL32 %rs, @sym
1570 // Into: %rd = ADDI %rs, sym@dtprel@l
1571 const MachineOperand &MO = MI->getOperand(2);
1572 const GlobalValue *GValue = MO.getGlobal();
1573 MCSymbol *MOSymbol = getSymbol(GValue);
1574 const MCExpr *SymDtprel =
1576 OutContext);
1577 EmitToStreamer(*OutStreamer,
1578 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1579 .addReg(MI->getOperand(0).getReg())
1580 .addReg(MI->getOperand(1).getReg())
1581 .addExpr(SymDtprel));
1582 return;
1583 }
1584 case PPC::MFOCRF:
1585 case PPC::MFOCRF8:
1586 if (!Subtarget->hasMFOCRF()) {
1587 // Transform: %r3 = MFOCRF %cr7
1588 // Into: %r3 = MFCR ;; cr7
1589 unsigned NewOpcode =
1590 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1591 OutStreamer->AddComment(PPCInstPrinter::
1592 getRegisterName(MI->getOperand(1).getReg()));
1593 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1594 .addReg(MI->getOperand(0).getReg()));
1595 return;
1596 }
1597 break;
1598 case PPC::MTOCRF:
1599 case PPC::MTOCRF8:
1600 if (!Subtarget->hasMFOCRF()) {
1601 // Transform: %cr7 = MTOCRF %r3
1602 // Into: MTCRF mask, %r3 ;; cr7
1603 unsigned NewOpcode =
1604 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1605 unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1606 ->getEncodingValue(MI->getOperand(0).getReg());
1607 OutStreamer->AddComment(PPCInstPrinter::
1608 getRegisterName(MI->getOperand(0).getReg()));
1609 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1610 .addImm(Mask)
1611 .addReg(MI->getOperand(1).getReg()));
1612 return;
1613 }
1614 break;
1615 case PPC::LD:
1616 case PPC::STD:
1617 case PPC::LWA_32:
1618 case PPC::LWA: {
1619 // Verify alignment is legal, so we don't create relocations
1620 // that can't be supported.
1621 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1622 // For non-TOC-based local-exec TLS accesses with non-zero offsets, the
1623 // machine operand (which is a TargetGlobalTLSAddress) is expected to be
1624 // the same operand for both loads and stores.
1625 for (const MachineOperand &TempMO : MI->operands()) {
1626 if (((TempMO.getTargetFlags() == PPCII::MO_TPREL_FLAG ||
1627 TempMO.getTargetFlags() == PPCII::MO_TLSLD_FLAG)) &&
1628 TempMO.getOperandNo() == 1)
1629 OpNum = 1;
1630 }
1631 const MachineOperand &MO = MI->getOperand(OpNum);
1632 if (MO.isGlobal()) {
1633 const DataLayout &DL = MO.getGlobal()->getDataLayout();
1634 if (MO.getGlobal()->getPointerAlignment(DL) < 4)
1635 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1636 }
1637 // As these load/stores share common code with the following load/stores,
1638 // fall through to the subsequent cases in order to either process the
1639 // non-TOC-based local-exec sequence or to process the instruction normally.
1640 [[fallthrough]];
1641 }
1642 case PPC::LBZ:
1643 case PPC::LBZ8:
1644 case PPC::LHA:
1645 case PPC::LHA8:
1646 case PPC::LHZ:
1647 case PPC::LHZ8:
1648 case PPC::LWZ:
1649 case PPC::LWZ8:
1650 case PPC::STB:
1651 case PPC::STB8:
1652 case PPC::STH:
1653 case PPC::STH8:
1654 case PPC::STW:
1655 case PPC::STW8:
1656 case PPC::LFS:
1657 case PPC::STFS:
1658 case PPC::LFD:
1659 case PPC::STFD:
1660 case PPC::ADDI8: {
1661 // A faster non-TOC-based local-[exec|dynamic] sequence is represented by
1662 // `addi` or a load/store instruction (that directly loads or stores off of
1663 // the thread pointer) with an immediate operand having the
1664 // [MO_TPREL_FLAG|MO_TLSLD_FLAG]. Such instructions do not otherwise arise.
1665 if (!HasAIXSmallLocalTLS)
1666 break;
1667 bool IsMIADDI8 = MI->getOpcode() == PPC::ADDI8;
1668 unsigned OpNum = IsMIADDI8 ? 2 : 1;
1669 const MachineOperand &MO = MI->getOperand(OpNum);
1670 unsigned Flag = MO.getTargetFlags();
1671 if (Flag == PPCII::MO_TPREL_FLAG ||
1674 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1675
1676 const MCExpr *Expr = getAdjustedFasterLocalExpr(MO, MO.getOffset());
1677 if (Expr)
1678 TmpInst.getOperand(OpNum) = MCOperand::createExpr(Expr);
1679
1680 // Change the opcode to load address if the original opcode is an `addi`.
1681 if (IsMIADDI8)
1682 TmpInst.setOpcode(PPC::LA8);
1683
1684 EmitToStreamer(*OutStreamer, TmpInst);
1685 return;
1686 }
1687 // Now process the instruction normally.
1688 break;
1689 }
1690 case PPC::PseudoEIEIO: {
1691 EmitToStreamer(
1692 *OutStreamer,
1693 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1694 EmitToStreamer(
1695 *OutStreamer,
1696 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1697 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::EnforceIEIO));
1698 return;
1699 }
1700 }
1701
1702 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1703 EmitToStreamer(*OutStreamer, TmpInst);
1704}
1705
1706// For non-TOC-based local-[exec|dynamic] variables that have a non-zero offset,
1707// we need to create a new MCExpr that adds the non-zero offset to the address
1708// of the local-[exec|dynamic] variable that will be used in either an addi,
1709// load or store. However, the final displacement for these instructions must be
1710// between [-32768, 32768), so if the TLS address + its non-zero offset is
1711// greater than 32KB, a new MCExpr is produced to accommodate this situation.
1712const MCExpr *
1713PPCAsmPrinter::getAdjustedFasterLocalExpr(const MachineOperand &MO,
1714 int64_t Offset) {
1715 // Non-zero offsets (for loads, stores or `addi`) require additional handling.
1716 // When the offset is zero, there is no need to create an adjusted MCExpr.
1717 if (!Offset)
1718 return nullptr;
1719
1720 assert(MO.isGlobal() && "Only expecting a global MachineOperand here!");
1721 const GlobalValue *GValue = MO.getGlobal();
1722 TLSModel::Model Model = TM.getTLSModel(GValue);
1723 assert((Model == TLSModel::LocalExec || Model == TLSModel::LocalDynamic) &&
1724 "Only local-[exec|dynamic] accesses are handled!");
1725
1726 bool IsGlobalADeclaration = GValue->isDeclarationForLinker();
1727 // Find the GlobalVariable that corresponds to the particular TLS variable
1728 // in the TLS variable-to-address mapping. All TLS variables should exist
1729 // within this map, with the exception of TLS variables marked as extern.
1730 const auto TLSVarsMapEntryIter = TLSVarsToAddressMapping.find(GValue);
1731 if (TLSVarsMapEntryIter == TLSVarsToAddressMapping.end())
1732 assert(IsGlobalADeclaration &&
1733 "Only expecting to find extern TLS variables not present in the TLS "
1734 "variable-to-address map!");
1735
1736 unsigned TLSVarAddress =
1737 IsGlobalADeclaration ? 0 : TLSVarsMapEntryIter->second;
1738 ptrdiff_t FinalAddress = (TLSVarAddress + Offset);
1739 // If the address of the TLS variable + the offset is less than 32KB,
1740 // or if the TLS variable is extern, we simply produce an MCExpr to add the
1741 // non-zero offset to the TLS variable address.
1742 // For when TLS variables are extern, this is safe to do because we can
1743 // assume that the address of extern TLS variables are zero.
1744 const MCExpr *Expr = MCSymbolRefExpr::create(
1745 getSymbol(GValue),
1748 OutContext);
1750 Expr, MCConstantExpr::create(Offset, OutContext), OutContext);
1751 if (FinalAddress >= 32768) {
1752 // Handle the written offset for cases where:
1753 // TLS variable address + Offset > 32KB.
1754
1755 // The assembly that is printed will look like:
1756 // TLSVar@le + Offset - Delta
1757 // where Delta is a multiple of 64KB: ((FinalAddress + 32768) & ~0xFFFF).
1758 ptrdiff_t Delta = ((FinalAddress + 32768) & ~0xFFFF);
1759 // Check that the total instruction displacement fits within [-32768,32768).
1760 [[maybe_unused]] ptrdiff_t InstDisp = TLSVarAddress + Offset - Delta;
1761 assert(
1762 ((InstDisp < 32768) && (InstDisp >= -32768)) &&
1763 "Expecting the instruction displacement for local-[exec|dynamic] TLS "
1764 "variables to be between [-32768, 32768)!");
1766 Expr, MCConstantExpr::create(-Delta, OutContext), OutContext);
1767 }
1768
1769 return Expr;
1770}
1771
1772void PPCLinuxAsmPrinter::emitGNUAttributes(Module &M) {
1773 // Emit float ABI into GNU attribute
1774 Metadata *MD = M.getModuleFlag("float-abi");
1775 MDString *FloatABI = dyn_cast_or_null<MDString>(MD);
1776 if (!FloatABI)
1777 return;
1778 StringRef flt = FloatABI->getString();
1779 // TODO: Support emitting soft-fp and hard double/single attributes.
1780 if (flt == "doubledouble")
1781 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,
1782 Val_GNU_Power_ABI_HardFloat_DP |
1783 Val_GNU_Power_ABI_LDBL_IBM128);
1784 else if (flt == "ieeequad")
1785 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,
1786 Val_GNU_Power_ABI_HardFloat_DP |
1787 Val_GNU_Power_ABI_LDBL_IEEE128);
1788 else if (flt == "ieeedouble")
1789 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,
1790 Val_GNU_Power_ABI_HardFloat_DP |
1791 Val_GNU_Power_ABI_LDBL_64);
1792}
1793
1794void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
1795 if (!Subtarget->isPPC64())
1796 return PPCAsmPrinter::emitInstruction(MI);
1797
1798 switch (MI->getOpcode()) {
1799 default:
1800 break;
1801 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
1802 // .begin:
1803 // b .end # lis 0, FuncId[16..32]
1804 // nop # li 0, FuncId[0..15]
1805 // std 0, -8(1)
1806 // mflr 0
1807 // bl __xray_FunctionEntry
1808 // mtlr 0
1809 // .end:
1810 //
1811 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1812 // of instructions change.
1813 // XRAY is only supported on PPC Linux little endian.
1814 if (!MAI->isLittleEndian())
1815 break;
1816 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1817 MCSymbol *EndOfSled = OutContext.createTempSymbol();
1818 OutStreamer->emitLabel(BeginOfSled);
1819 EmitToStreamer(*OutStreamer,
1820 MCInstBuilder(PPC::B).addExpr(
1821 MCSymbolRefExpr::create(EndOfSled, OutContext)));
1822 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1823 EmitToStreamer(
1824 *OutStreamer,
1825 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1826 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1827 EmitToStreamer(*OutStreamer,
1828 MCInstBuilder(PPC::BL8_NOP)
1829 .addExpr(MCSymbolRefExpr::create(
1830 OutContext.getOrCreateSymbol("__xray_FunctionEntry"),
1831 OutContext)));
1832 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1833 OutStreamer->emitLabel(EndOfSled);
1834 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER, 2);
1835 break;
1836 }
1837 case TargetOpcode::PATCHABLE_RET: {
1838 unsigned RetOpcode = MI->getOperand(0).getImm();
1839 MCInst RetInst;
1840 RetInst.setOpcode(RetOpcode);
1841 for (const auto &MO : llvm::drop_begin(MI->operands())) {
1842 MCOperand MCOp;
1843 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this))
1844 RetInst.addOperand(MCOp);
1845 }
1846
1847 bool IsConditional;
1848 if (RetOpcode == PPC::BCCLR) {
1849 IsConditional = true;
1850 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||
1851 RetOpcode == PPC::TCRETURNai8) {
1852 break;
1853 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {
1854 IsConditional = false;
1855 } else {
1856 EmitToStreamer(*OutStreamer, RetInst);
1857 return;
1858 }
1859
1860 MCSymbol *FallthroughLabel;
1861 if (IsConditional) {
1862 // Before:
1863 // bgtlr cr0
1864 //
1865 // After:
1866 // ble cr0, .end
1867 // .p2align 3
1868 // .begin:
1869 // blr # lis 0, FuncId[16..32]
1870 // nop # li 0, FuncId[0..15]
1871 // std 0, -8(1)
1872 // mflr 0
1873 // bl __xray_FunctionExit
1874 // mtlr 0
1875 // blr
1876 // .end:
1877 //
1878 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1879 // of instructions change.
1880 FallthroughLabel = OutContext.createTempSymbol();
1881 EmitToStreamer(
1882 *OutStreamer,
1883 MCInstBuilder(PPC::BCC)
1884 .addImm(PPC::InvertPredicate(
1885 static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))
1886 .addReg(MI->getOperand(2).getReg())
1887 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext)));
1888 RetInst = MCInst();
1889 RetInst.setOpcode(PPC::BLR8);
1890 }
1891 // .p2align 3
1892 // .begin:
1893 // b(lr)? # lis 0, FuncId[16..32]
1894 // nop # li 0, FuncId[0..15]
1895 // std 0, -8(1)
1896 // mflr 0
1897 // bl __xray_FunctionExit
1898 // mtlr 0
1899 // b(lr)?
1900 //
1901 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1902 // of instructions change.
1903 OutStreamer->emitCodeAlignment(Align(8), &getSubtargetInfo());
1904 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1905 OutStreamer->emitLabel(BeginOfSled);
1906 EmitToStreamer(*OutStreamer, RetInst);
1907 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1908 EmitToStreamer(
1909 *OutStreamer,
1910 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1911 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1912 EmitToStreamer(*OutStreamer,
1913 MCInstBuilder(PPC::BL8_NOP)
1914 .addExpr(MCSymbolRefExpr::create(
1915 OutContext.getOrCreateSymbol("__xray_FunctionExit"),
1916 OutContext)));
1917 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1918 EmitToStreamer(*OutStreamer, RetInst);
1919 if (IsConditional)
1920 OutStreamer->emitLabel(FallthroughLabel);
1921 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT, 2);
1922 return;
1923 }
1924 case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
1925 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
1926 case TargetOpcode::PATCHABLE_TAIL_CALL:
1927 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
1928 // normal function exit from a tail exit.
1929 llvm_unreachable("Tail call is handled in the normal case. See comments "
1930 "around this assert.");
1931 }
1932 return PPCAsmPrinter::emitInstruction(MI);
1933}
1934
1935void PPCLinuxAsmPrinter::emitStartOfAsmFile(Module &M) {
1936 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1937 PPCTargetStreamer *TS =
1938 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1939 TS->emitAbiVersion(2);
1940 }
1941
1942 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1943 !isPositionIndependent())
1945
1946 if (M.getPICLevel() == PICLevel::SmallPIC)
1948
1949 OutStreamer->switchSection(OutContext.getELFSection(
1951
1952 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));
1953 MCSymbol *CurrentPos = OutContext.createTempSymbol();
1954
1955 OutStreamer->emitLabel(CurrentPos);
1956
1957 // The GOT pointer points to the middle of the GOT, in order to reference the
1958 // entire 64kB range. 0x8000 is the midpoint.
1959 const MCExpr *tocExpr =
1960 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),
1961 MCConstantExpr::create(0x8000, OutContext),
1962 OutContext);
1963
1964 OutStreamer->emitAssignment(TOCSym, tocExpr);
1965
1966 OutStreamer->switchSection(getObjFileLowering().getTextSection());
1967}
1968
1969void PPCLinuxAsmPrinter::emitFunctionEntryLabel() {
1970 // linux/ppc32 - Normal entry label.
1971 if (!Subtarget->isPPC64() &&
1972 (!isPositionIndependent() ||
1973 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
1975
1976 if (!Subtarget->isPPC64()) {
1977 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1978 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {
1979 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(*MF);
1980 MCSymbol *PICBase = MF->getPICBaseSymbol();
1981 OutStreamer->emitLabel(RelocSymbol);
1982
1983 const MCExpr *OffsExpr =
1985 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
1986 OutContext),
1987 MCSymbolRefExpr::create(PICBase, OutContext),
1988 OutContext);
1989 OutStreamer->emitValue(OffsExpr, 4);
1990 OutStreamer->emitLabel(CurrentFnSym);
1991 return;
1992 } else
1994 }
1995
1996 // ELFv2 ABI - Normal entry label.
1997 if (Subtarget->isELFv2ABI()) {
1998 // In the Large code model, we allow arbitrary displacements between
1999 // the text section and its associated TOC section. We place the
2000 // full 8-byte offset to the TOC in memory immediately preceding
2001 // the function global entry point.
2002 if (TM.getCodeModel() == CodeModel::Large
2003 && !MF->getRegInfo().use_empty(PPC::X2)) {
2004 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
2005
2006 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
2007 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(*MF);
2008 const MCExpr *TOCDeltaExpr =
2009 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
2010 MCSymbolRefExpr::create(GlobalEPSymbol,
2011 OutContext),
2012 OutContext);
2013
2014 OutStreamer->emitLabel(PPCFI->getTOCOffsetSymbol(*MF));
2015 OutStreamer->emitValue(TOCDeltaExpr, 8);
2016 }
2018 }
2019
2020 // Emit an official procedure descriptor.
2021 MCSectionSubPair Current = OutStreamer->getCurrentSection();
2022 MCSectionELF *Section = OutStreamer->getContext().getELFSection(
2024 OutStreamer->switchSection(Section);
2025 OutStreamer->emitLabel(CurrentFnSym);
2026 OutStreamer->emitValueToAlignment(Align(8));
2027 MCSymbol *Symbol1 = CurrentFnSymForSize;
2028 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
2029 // entry point.
2030 OutStreamer->emitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
2031 8 /*size*/);
2032 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));
2033 // Generates a R_PPC64_TOC relocation for TOC base insertion.
2034 OutStreamer->emitValue(
2036 8/*size*/);
2037 // Emit a null environment pointer.
2038 OutStreamer->emitIntValue(0, 8 /* size */);
2039 OutStreamer->switchSection(Current.first, Current.second);
2040}
2041
2042void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) {
2043 const DataLayout &DL = getDataLayout();
2044
2045 bool isPPC64 = DL.getPointerSizeInBits() == 64;
2046
2047 PPCTargetStreamer *TS =
2048 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2049
2050 // If we are using any values provided by Glibc at fixed addresses,
2051 // we need to ensure that the Glibc used at link time actually provides
2052 // those values. All versions of Glibc that do will define the symbol
2053 // named "__parse_hwcap_and_convert_at_platform".
2054 if (static_cast<const PPCTargetMachine &>(TM).hasGlibcHWCAPAccess())
2055 OutStreamer->emitSymbolValue(
2056 GetExternalSymbolSymbol("__parse_hwcap_and_convert_at_platform"),
2057 MAI->getCodePointerSize());
2058 emitGNUAttributes(M);
2059
2060 if (!TOC.empty()) {
2061 const char *Name = isPPC64 ? ".toc" : ".got2";
2062 MCSectionELF *Section = OutContext.getELFSection(
2064 OutStreamer->switchSection(Section);
2065 if (!isPPC64)
2066 OutStreamer->emitValueToAlignment(Align(4));
2067
2068 for (const auto &TOCMapPair : TOC) {
2069 const MCSymbol *const TOCEntryTarget = TOCMapPair.first.first;
2070 MCSymbol *const TOCEntryLabel = TOCMapPair.second;
2071
2072 OutStreamer->emitLabel(TOCEntryLabel);
2073 if (isPPC64)
2074 TS->emitTCEntry(*TOCEntryTarget, TOCMapPair.first.second);
2075 else
2076 OutStreamer->emitSymbolValue(TOCEntryTarget, 4);
2077 }
2078 }
2079
2080 PPCAsmPrinter::emitEndOfAsmFile(M);
2081}
2082
2083/// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
2084void PPCLinuxAsmPrinter::emitFunctionBodyStart() {
2085 // In the ELFv2 ABI, in functions that use the TOC register, we need to
2086 // provide two entry points. The ABI guarantees that when calling the
2087 // local entry point, r2 is set up by the caller to contain the TOC base
2088 // for this function, and when calling the global entry point, r12 is set
2089 // up by the caller to hold the address of the global entry point. We
2090 // thus emit a prefix sequence along the following lines:
2091 //
2092 // func:
2093 // .Lfunc_gepNN:
2094 // # global entry point
2095 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
2096 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
2097 // .Lfunc_lepNN:
2098 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
2099 // # local entry point, followed by function body
2100 //
2101 // For the Large code model, we create
2102 //
2103 // .Lfunc_tocNN:
2104 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
2105 // func:
2106 // .Lfunc_gepNN:
2107 // # global entry point
2108 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
2109 // add r2,r2,r12
2110 // .Lfunc_lepNN:
2111 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
2112 // # local entry point, followed by function body
2113 //
2114 // This ensures we have r2 set up correctly while executing the function
2115 // body, no matter which entry point is called.
2116 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
2117 const bool UsesX2OrR2 = !MF->getRegInfo().use_empty(PPC::X2) ||
2118 !MF->getRegInfo().use_empty(PPC::R2);
2119 const bool PCrelGEPRequired = Subtarget->isUsingPCRelativeCalls() &&
2120 UsesX2OrR2 && PPCFI->usesTOCBasePtr();
2121 const bool NonPCrelGEPRequired = !Subtarget->isUsingPCRelativeCalls() &&
2122 Subtarget->isELFv2ABI() && UsesX2OrR2;
2123
2124 // Only do all that if the function uses R2 as the TOC pointer
2125 // in the first place. We don't need the global entry point if the
2126 // function uses R2 as an allocatable register.
2127 if (NonPCrelGEPRequired || PCrelGEPRequired) {
2128 // Note: The logic here must be synchronized with the code in the
2129 // branch-selection pass which sets the offset of the first block in the
2130 // function. This matters because it affects the alignment.
2131 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(*MF);
2132 OutStreamer->emitLabel(GlobalEntryLabel);
2133 const MCSymbolRefExpr *GlobalEntryLabelExp =
2134 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);
2135
2136 if (TM.getCodeModel() != CodeModel::Large) {
2137 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
2138 const MCExpr *TOCDeltaExpr =
2139 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
2140 GlobalEntryLabelExp, OutContext);
2141
2142 const MCExpr *TOCDeltaHi = PPCMCExpr::createHa(TOCDeltaExpr, OutContext);
2143 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
2144 .addReg(PPC::X2)
2145 .addReg(PPC::X12)
2146 .addExpr(TOCDeltaHi));
2147
2148 const MCExpr *TOCDeltaLo = PPCMCExpr::createLo(TOCDeltaExpr, OutContext);
2149 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
2150 .addReg(PPC::X2)
2151 .addReg(PPC::X2)
2152 .addExpr(TOCDeltaLo));
2153 } else {
2154 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(*MF);
2155 const MCExpr *TOCOffsetDeltaExpr =
2156 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),
2157 GlobalEntryLabelExp, OutContext);
2158
2159 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
2160 .addReg(PPC::X2)
2161 .addExpr(TOCOffsetDeltaExpr)
2162 .addReg(PPC::X12));
2163 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8)
2164 .addReg(PPC::X2)
2165 .addReg(PPC::X2)
2166 .addReg(PPC::X12));
2167 }
2168
2169 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(*MF);
2170 OutStreamer->emitLabel(LocalEntryLabel);
2171 const MCSymbolRefExpr *LocalEntryLabelExp =
2172 MCSymbolRefExpr::create(LocalEntryLabel, OutContext);
2173 const MCExpr *LocalOffsetExp =
2174 MCBinaryExpr::createSub(LocalEntryLabelExp,
2175 GlobalEntryLabelExp, OutContext);
2176
2177 PPCTargetStreamer *TS =
2178 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2179 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
2180 } else if (Subtarget->isUsingPCRelativeCalls()) {
2181 // When generating the entry point for a function we have a few scenarios
2182 // based on whether or not that function uses R2 and whether or not that
2183 // function makes calls (or is a leaf function).
2184 // 1) A leaf function that does not use R2 (or treats it as callee-saved
2185 // and preserves it). In this case st_other=0 and both
2186 // the local and global entry points for the function are the same.
2187 // No special entry point code is required.
2188 // 2) A function uses the TOC pointer R2. This function may or may not have
2189 // calls. In this case st_other=[2,6] and the global and local entry
2190 // points are different. Code to correctly setup the TOC pointer in R2
2191 // is put between the global and local entry points. This case is
2192 // covered by the if statatement above.
2193 // 3) A function does not use the TOC pointer R2 but does have calls.
2194 // In this case st_other=1 since we do not know whether or not any
2195 // of the callees clobber R2. This case is dealt with in this else if
2196 // block. Tail calls are considered calls and the st_other should also
2197 // be set to 1 in that case as well.
2198 // 4) The function does not use the TOC pointer but R2 is used inside
2199 // the function. In this case st_other=1 once again.
2200 // 5) This function uses inline asm. We mark R2 as reserved if the function
2201 // has inline asm as we have to assume that it may be used.
2202 if (MF->getFrameInfo().hasCalls() || MF->getFrameInfo().hasTailCall() ||
2203 MF->hasInlineAsm() || (!PPCFI->usesTOCBasePtr() && UsesX2OrR2)) {
2204 PPCTargetStreamer *TS =
2205 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2206 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym),
2207 MCConstantExpr::create(1, OutContext));
2208 }
2209 }
2210}
2211
2212/// EmitFunctionBodyEnd - Print the traceback table before the .size
2213/// directive.
2214///
2215void PPCLinuxAsmPrinter::emitFunctionBodyEnd() {
2216 // Only the 64-bit target requires a traceback table. For now,
2217 // we only emit the word of zeroes that GDB requires to find
2218 // the end of the function, and zeroes for the eight-byte
2219 // mandatory fields.
2220 // FIXME: We should fill in the eight-byte mandatory fields as described in
2221 // the PPC64 ELF ABI (this is a low-priority item because GDB does not
2222 // currently make use of these fields).
2223 if (Subtarget->isPPC64()) {
2224 OutStreamer->emitIntValue(0, 4/*size*/);
2225 OutStreamer->emitIntValue(0, 8/*size*/);
2226 }
2227}
2228
2229void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
2230 MCSymbol *GVSym) const {
2231
2232 assert(MAI->hasVisibilityOnlyWithLinkage() &&
2233 "AIX's linkage directives take a visibility setting.");
2234
2235 MCSymbolAttr LinkageAttr = MCSA_Invalid;
2236 switch (GV->getLinkage()) {
2238 LinkageAttr = GV->isDeclaration() ? MCSA_Extern : MCSA_Global;
2239 break;
2245 LinkageAttr = MCSA_Weak;
2246 break;
2248 LinkageAttr = MCSA_Extern;
2249 break;
2251 return;
2254 "InternalLinkage should not have other visibility setting.");
2255 LinkageAttr = MCSA_LGlobal;
2256 break;
2258 llvm_unreachable("Should never emit this");
2260 llvm_unreachable("CommonLinkage of XCOFF should not come to this path");
2261 }
2262
2263 assert(LinkageAttr != MCSA_Invalid && "LinkageAttr should not MCSA_Invalid.");
2264
2265 MCSymbolAttr VisibilityAttr = MCSA_Invalid;
2266 if (!TM.getIgnoreXCOFFVisibility()) {
2269 "Cannot not be both dllexport and non-default visibility");
2270 switch (GV->getVisibility()) {
2271
2272 // TODO: "internal" Visibility needs to go here.
2274 if (GV->hasDLLExportStorageClass())
2275 VisibilityAttr = MAI->getExportedVisibilityAttr();
2276 break;
2278 VisibilityAttr = MAI->getHiddenVisibilityAttr();
2279 break;
2281 VisibilityAttr = MAI->getProtectedVisibilityAttr();
2282 break;
2283 }
2284 }
2285
2286 // Do not emit the _$TLSML symbol.
2287 if (GV->getThreadLocalMode() == GlobalVariable::LocalDynamicTLSModel &&
2288 GV->hasName() && GV->getName() == "_$TLSML")
2289 return;
2290
2291 OutStreamer->emitXCOFFSymbolLinkageWithVisibility(GVSym, LinkageAttr,
2292 VisibilityAttr);
2293}
2294
2295void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) {
2296 // Setup CurrentFnDescSym and its containing csect.
2297 MCSectionXCOFF *FnDescSec =
2298 cast<MCSectionXCOFF>(getObjFileLowering().getSectionForFunctionDescriptor(
2299 &MF.getFunction(), TM));
2300 FnDescSec->setAlignment(Align(Subtarget->isPPC64() ? 8 : 4));
2301
2302 CurrentFnDescSym = FnDescSec->getQualNameSymbol();
2303
2305}
2306
2307uint16_t PPCAIXAsmPrinter::getNumberOfVRSaved() {
2308 // Calculate the number of VRs be saved.
2309 // Vector registers 20 through 31 are marked as reserved and cannot be used
2310 // in the default ABI.
2311 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
2312 if (Subtarget.isAIXABI() && Subtarget.hasAltivec() &&
2313 TM.getAIXExtendedAltivecABI()) {
2314 const MachineRegisterInfo &MRI = MF->getRegInfo();
2315 for (unsigned Reg = PPC::V20; Reg <= PPC::V31; ++Reg)
2316 if (MRI.isPhysRegModified(Reg))
2317 // Number of VRs saved.
2318 return PPC::V31 - Reg + 1;
2319 }
2320 return 0;
2321}
2322
2323void PPCAIXAsmPrinter::emitFunctionBodyEnd() {
2324
2325 if (!TM.getXCOFFTracebackTable())
2326 return;
2327
2328 emitTracebackTable();
2329
2330 // If ShouldEmitEHBlock returns true, then the eh info table
2331 // will be emitted via `AIXException::endFunction`. Otherwise, we
2332 // need to emit a dumy eh info table when VRs are saved. We could not
2333 // consolidate these two places into one because there is no easy way
2334 // to access register information in `AIXException` class.
2336 (getNumberOfVRSaved() > 0)) {
2337 // Emit dummy EH Info Table.
2338 OutStreamer->switchSection(getObjFileLowering().getCompactUnwindSection());
2339 MCSymbol *EHInfoLabel =
2341 OutStreamer->emitLabel(EHInfoLabel);
2342
2343 // Version number.
2344 OutStreamer->emitInt32(0);
2345
2346 const DataLayout &DL = MMI->getModule()->getDataLayout();
2347 const unsigned PointerSize = DL.getPointerSize();
2348 // Add necessary paddings in 64 bit mode.
2349 OutStreamer->emitValueToAlignment(Align(PointerSize));
2350
2351 OutStreamer->emitIntValue(0, PointerSize);
2352 OutStreamer->emitIntValue(0, PointerSize);
2353 OutStreamer->switchSection(MF->getSection());
2354 }
2355}
2356
2357void PPCAIXAsmPrinter::emitTracebackTable() {
2358
2359 // Create a symbol for the end of function.
2360 MCSymbol *FuncEnd = createTempSymbol(MF->getName());
2361 OutStreamer->emitLabel(FuncEnd);
2362
2363 OutStreamer->AddComment("Traceback table begin");
2364 // Begin with a fullword of zero.
2365 OutStreamer->emitIntValueInHexWithPadding(0, 4 /*size*/);
2366
2367 SmallString<128> CommentString;
2368 raw_svector_ostream CommentOS(CommentString);
2369
2370 auto EmitComment = [&]() {
2371 OutStreamer->AddComment(CommentOS.str());
2372 CommentString.clear();
2373 };
2374
2375 auto EmitCommentAndValue = [&](uint64_t Value, int Size) {
2376 EmitComment();
2377 OutStreamer->emitIntValueInHexWithPadding(Value, Size);
2378 };
2379
2380 unsigned int Version = 0;
2381 CommentOS << "Version = " << Version;
2382 EmitCommentAndValue(Version, 1);
2383
2384 // There is a lack of information in the IR to assist with determining the
2385 // source language. AIX exception handling mechanism would only search for
2386 // personality routine and LSDA area when such language supports exception
2387 // handling. So to be conservatively correct and allow runtime to do its job,
2388 // we need to set it to C++ for now.
2389 TracebackTable::LanguageID LanguageIdentifier =
2391
2392 CommentOS << "Language = "
2393 << getNameForTracebackTableLanguageId(LanguageIdentifier);
2394 EmitCommentAndValue(LanguageIdentifier, 1);
2395
2396 // This is only populated for the third and fourth bytes.
2397 uint32_t FirstHalfOfMandatoryField = 0;
2398
2399 // Emit the 3rd byte of the mandatory field.
2400
2401 // We always set traceback offset bit to true.
2402 FirstHalfOfMandatoryField |= TracebackTable::HasTraceBackTableOffsetMask;
2403
2404 const PPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>();
2405 const MachineRegisterInfo &MRI = MF->getRegInfo();
2406
2407 // Check the function uses floating-point processor instructions or not
2408 for (unsigned Reg = PPC::F0; Reg <= PPC::F31; ++Reg) {
2409 if (MRI.isPhysRegUsed(Reg, /* SkipRegMaskTest */ true)) {
2410 FirstHalfOfMandatoryField |= TracebackTable::IsFloatingPointPresentMask;
2411 break;
2412 }
2413 }
2414
2415#define GENBOOLCOMMENT(Prefix, V, Field) \
2416 CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \
2417 << #Field
2418
2419#define GENVALUECOMMENT(PrefixAndName, V, Field) \
2420 CommentOS << (PrefixAndName) << " = " \
2421 << static_cast<unsigned>(((V) & (TracebackTable::Field##Mask)) >> \
2422 (TracebackTable::Field##Shift))
2423
2424 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsGlobaLinkage);
2425 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsOutOfLineEpilogOrPrologue);
2426 EmitComment();
2427
2428 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasTraceBackTableOffset);
2429 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsInternalProcedure);
2430 EmitComment();
2431
2432 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasControlledStorage);
2433 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsTOCless);
2434 EmitComment();
2435
2436 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsFloatingPointPresent);
2437 EmitComment();
2438 GENBOOLCOMMENT("", FirstHalfOfMandatoryField,
2439 IsFloatingPointOperationLogOrAbortEnabled);
2440 EmitComment();
2441
2442 OutStreamer->emitIntValueInHexWithPadding(
2443 (FirstHalfOfMandatoryField & 0x0000ff00) >> 8, 1);
2444
2445 // Set the 4th byte of the mandatory field.
2446 FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask;
2447
2448 const PPCRegisterInfo *RegInfo =
2449 static_cast<const PPCRegisterInfo *>(Subtarget->getRegisterInfo());
2450 Register FrameReg = RegInfo->getFrameRegister(*MF);
2451 if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31))
2452 FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask;
2453
2454 const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs();
2455 if (!MustSaveCRs.empty())
2456 FirstHalfOfMandatoryField |= TracebackTable::IsCRSavedMask;
2457
2458 if (FI->mustSaveLR())
2459 FirstHalfOfMandatoryField |= TracebackTable::IsLRSavedMask;
2460
2461 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsInterruptHandler);
2462 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsFunctionNamePresent);
2463 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsAllocaUsed);
2464 EmitComment();
2465 GENVALUECOMMENT("OnConditionDirective", FirstHalfOfMandatoryField,
2466 OnConditionDirective);
2467 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsCRSaved);
2468 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsLRSaved);
2469 EmitComment();
2470 OutStreamer->emitIntValueInHexWithPadding((FirstHalfOfMandatoryField & 0xff),
2471 1);
2472
2473 // Set the 5th byte of mandatory field.
2474 uint32_t SecondHalfOfMandatoryField = 0;
2475
2476 SecondHalfOfMandatoryField |= MF->getFrameInfo().getStackSize()
2478 : 0;
2479
2480 uint32_t FPRSaved = 0;
2481 for (unsigned Reg = PPC::F14; Reg <= PPC::F31; ++Reg) {
2482 if (MRI.isPhysRegModified(Reg)) {
2483 FPRSaved = PPC::F31 - Reg + 1;
2484 break;
2485 }
2486 }
2487 SecondHalfOfMandatoryField |= (FPRSaved << TracebackTable::FPRSavedShift) &
2489 GENBOOLCOMMENT("", SecondHalfOfMandatoryField, IsBackChainStored);
2490 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, IsFixup);
2491 GENVALUECOMMENT(", NumOfFPRsSaved", SecondHalfOfMandatoryField, FPRSaved);
2492 EmitComment();
2493 OutStreamer->emitIntValueInHexWithPadding(
2494 (SecondHalfOfMandatoryField & 0xff000000) >> 24, 1);
2495
2496 // Set the 6th byte of mandatory field.
2497
2498 // Check whether has Vector Instruction,We only treat instructions uses vector
2499 // register as vector instructions.
2500 bool HasVectorInst = false;
2501 for (unsigned Reg = PPC::V0; Reg <= PPC::V31; ++Reg)
2502 if (MRI.isPhysRegUsed(Reg, /* SkipRegMaskTest */ true)) {
2503 // Has VMX instruction.
2504 HasVectorInst = true;
2505 break;
2506 }
2507
2508 if (FI->hasVectorParms() || HasVectorInst)
2509 SecondHalfOfMandatoryField |= TracebackTable::HasVectorInfoMask;
2510
2511 uint16_t NumOfVRSaved = getNumberOfVRSaved();
2512 bool ShouldEmitEHBlock =
2514
2515 if (ShouldEmitEHBlock)
2516 SecondHalfOfMandatoryField |= TracebackTable::HasExtensionTableMask;
2517
2518 uint32_t GPRSaved = 0;
2519
2520 // X13 is reserved under 64-bit environment.
2521 unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13;
2522 unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31;
2523
2524 for (unsigned Reg = GPRBegin; Reg <= GPREnd; ++Reg) {
2525 if (MRI.isPhysRegModified(Reg)) {
2526 GPRSaved = GPREnd - Reg + 1;
2527 break;
2528 }
2529 }
2530
2531 SecondHalfOfMandatoryField |= (GPRSaved << TracebackTable::GPRSavedShift) &
2533
2534 GENBOOLCOMMENT("", SecondHalfOfMandatoryField, HasExtensionTable);
2535 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasVectorInfo);
2536 GENVALUECOMMENT(", NumOfGPRsSaved", SecondHalfOfMandatoryField, GPRSaved);
2537 EmitComment();
2538 OutStreamer->emitIntValueInHexWithPadding(
2539 (SecondHalfOfMandatoryField & 0x00ff0000) >> 16, 1);
2540
2541 // Set the 7th byte of mandatory field.
2542 uint32_t NumberOfFixedParms = FI->getFixedParmsNum();
2543 SecondHalfOfMandatoryField |=
2544 (NumberOfFixedParms << TracebackTable::NumberOfFixedParmsShift) &
2546 GENVALUECOMMENT("NumberOfFixedParms", SecondHalfOfMandatoryField,
2547 NumberOfFixedParms);
2548 EmitComment();
2549 OutStreamer->emitIntValueInHexWithPadding(
2550 (SecondHalfOfMandatoryField & 0x0000ff00) >> 8, 1);
2551
2552 // Set the 8th byte of mandatory field.
2553
2554 // Always set parameter on stack.
2555 SecondHalfOfMandatoryField |= TracebackTable::HasParmsOnStackMask;
2556
2557 uint32_t NumberOfFPParms = FI->getFloatingPointParmsNum();
2558 SecondHalfOfMandatoryField |=
2561
2562 GENVALUECOMMENT("NumberOfFPParms", SecondHalfOfMandatoryField,
2563 NumberOfFloatingPointParms);
2564 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasParmsOnStack);
2565 EmitComment();
2566 OutStreamer->emitIntValueInHexWithPadding(SecondHalfOfMandatoryField & 0xff,
2567 1);
2568
2569 // Generate the optional fields of traceback table.
2570
2571 // Parameter type.
2572 if (NumberOfFixedParms || NumberOfFPParms) {
2573 uint32_t ParmsTypeValue = FI->getParmsType();
2574
2575 Expected<SmallString<32>> ParmsType =
2576 FI->hasVectorParms()
2578 ParmsTypeValue, NumberOfFixedParms, NumberOfFPParms,
2579 FI->getVectorParmsNum())
2580 : XCOFF::parseParmsType(ParmsTypeValue, NumberOfFixedParms,
2581 NumberOfFPParms);
2582
2583 assert(ParmsType && toString(ParmsType.takeError()).c_str());
2584 if (ParmsType) {
2585 CommentOS << "Parameter type = " << ParmsType.get();
2586 EmitComment();
2587 }
2588 OutStreamer->emitIntValueInHexWithPadding(ParmsTypeValue,
2589 sizeof(ParmsTypeValue));
2590 }
2591 // Traceback table offset.
2592 OutStreamer->AddComment("Function size");
2593 if (FirstHalfOfMandatoryField & TracebackTable::HasTraceBackTableOffsetMask) {
2594 MCSymbol *FuncSectSym = getObjFileLowering().getFunctionEntryPointSymbol(
2595 &(MF->getFunction()), TM);
2596 OutStreamer->emitAbsoluteSymbolDiff(FuncEnd, FuncSectSym, 4);
2597 }
2598
2599 // Since we unset the Int_Handler.
2600 if (FirstHalfOfMandatoryField & TracebackTable::IsInterruptHandlerMask)
2601 report_fatal_error("Hand_Mask not implement yet");
2602
2603 if (FirstHalfOfMandatoryField & TracebackTable::HasControlledStorageMask)
2604 report_fatal_error("Ctl_Info not implement yet");
2605
2606 if (FirstHalfOfMandatoryField & TracebackTable::IsFunctionNamePresentMask) {
2607 StringRef Name = MF->getName().substr(0, INT16_MAX);
2608 int16_t NameLength = Name.size();
2609 CommentOS << "Function name len = "
2610 << static_cast<unsigned int>(NameLength);
2611 EmitCommentAndValue(NameLength, 2);
2612 OutStreamer->AddComment("Function Name");
2613 OutStreamer->emitBytes(Name);
2614 }
2615
2616 if (FirstHalfOfMandatoryField & TracebackTable::IsAllocaUsedMask) {
2617 uint8_t AllocReg = XCOFF::AllocRegNo;
2618 OutStreamer->AddComment("AllocaUsed");
2619 OutStreamer->emitIntValueInHex(AllocReg, sizeof(AllocReg));
2620 }
2621
2622 if (SecondHalfOfMandatoryField & TracebackTable::HasVectorInfoMask) {
2623 uint16_t VRData = 0;
2624 if (NumOfVRSaved) {
2625 // Number of VRs saved.
2626 VRData |= (NumOfVRSaved << TracebackTable::NumberOfVRSavedShift) &
2628 // This bit is supposed to set only when the special register
2629 // VRSAVE is saved on stack.
2630 // However, IBM XL compiler sets the bit when any vector registers
2631 // are saved on the stack. We will follow XL's behavior on AIX
2632 // so that we don't get surprise behavior change for C code.
2634 }
2635
2636 // Set has_varargs.
2637 if (FI->getVarArgsFrameIndex())
2639
2640 // Vector parameters number.
2641 unsigned VectorParmsNum = FI->getVectorParmsNum();
2642 VRData |= (VectorParmsNum << TracebackTable::NumberOfVectorParmsShift) &
2644
2645 if (HasVectorInst)
2647
2648 GENVALUECOMMENT("NumOfVRsSaved", VRData, NumberOfVRSaved);
2649 GENBOOLCOMMENT(", ", VRData, IsVRSavedOnStack);
2650 GENBOOLCOMMENT(", ", VRData, HasVarArgs);
2651 EmitComment();
2652 OutStreamer->emitIntValueInHexWithPadding((VRData & 0xff00) >> 8, 1);
2653
2654 GENVALUECOMMENT("NumOfVectorParams", VRData, NumberOfVectorParms);
2655 GENBOOLCOMMENT(", ", VRData, HasVMXInstruction);
2656 EmitComment();
2657 OutStreamer->emitIntValueInHexWithPadding(VRData & 0x00ff, 1);
2658
2659 uint32_t VecParmTypeValue = FI->getVecExtParmsType();
2660
2661 Expected<SmallString<32>> VecParmsType =
2662 XCOFF::parseVectorParmsType(VecParmTypeValue, VectorParmsNum);
2663 assert(VecParmsType && toString(VecParmsType.takeError()).c_str());
2664 if (VecParmsType) {
2665 CommentOS << "Vector Parameter type = " << VecParmsType.get();
2666 EmitComment();
2667 }
2668 OutStreamer->emitIntValueInHexWithPadding(VecParmTypeValue,
2669 sizeof(VecParmTypeValue));
2670 // Padding 2 bytes.
2671 CommentOS << "Padding";
2672 EmitCommentAndValue(0, 2);
2673 }
2674
2675 uint8_t ExtensionTableFlag = 0;
2676 if (SecondHalfOfMandatoryField & TracebackTable::HasExtensionTableMask) {
2677 if (ShouldEmitEHBlock)
2678 ExtensionTableFlag |= ExtendedTBTableFlag::TB_EH_INFO;
2681 ExtensionTableFlag |= ExtendedTBTableFlag::TB_SSP_CANARY;
2682
2683 CommentOS << "ExtensionTableFlag = "
2684 << getExtendedTBTableFlagString(ExtensionTableFlag);
2685 EmitCommentAndValue(ExtensionTableFlag, sizeof(ExtensionTableFlag));
2686 }
2687
2688 if (ExtensionTableFlag & ExtendedTBTableFlag::TB_EH_INFO) {
2689 auto &Ctx = OutStreamer->getContext();
2690 MCSymbol *EHInfoSym =
2692 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(EHInfoSym, TOCType_EHBlock);
2693 const MCSymbol *TOCBaseSym =
2694 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())
2695 ->getQualNameSymbol();
2696 const MCExpr *Exp =
2698 MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx);
2699
2700 const DataLayout &DL = getDataLayout();
2701 OutStreamer->emitValueToAlignment(Align(4));
2702 OutStreamer->AddComment("EHInfo Table");
2703 OutStreamer->emitValue(Exp, DL.getPointerSize());
2704 }
2705#undef GENBOOLCOMMENT
2706#undef GENVALUECOMMENT
2707}
2708
2710 return GV->hasAppendingLinkage() &&
2712 // TODO: Linker could still eliminate the GV if we just skip
2713 // handling llvm.used array. Skipping them for now until we or the
2714 // AIX OS team come up with a good solution.
2715 .Case("llvm.used", true)
2716 // It's correct to just skip llvm.compiler.used array here.
2717 .Case("llvm.compiler.used", true)
2718 .Default(false);
2719}
2720
2722 return StringSwitch<bool>(GV->getName())
2723 .Cases("llvm.global_ctors", "llvm.global_dtors", true)
2724 .Default(false);
2725}
2726
2727uint64_t PPCAIXAsmPrinter::getAliasOffset(const Constant *C) {
2728 if (auto *GA = dyn_cast<GlobalAlias>(C))
2729 return getAliasOffset(GA->getAliasee());
2730 if (auto *CE = dyn_cast<ConstantExpr>(C)) {
2731 const MCExpr *LowC = lowerConstant(CE);
2732 const MCBinaryExpr *CBE = dyn_cast<MCBinaryExpr>(LowC);
2733 if (!CBE)
2734 return 0;
2735 if (CBE->getOpcode() != MCBinaryExpr::Add)
2736 report_fatal_error("Only adding an offset is supported now.");
2737 auto *RHS = dyn_cast<MCConstantExpr>(CBE->getRHS());
2738 if (!RHS)
2739 report_fatal_error("Unable to get the offset of alias.");
2740 return RHS->getValue();
2741 }
2742 return 0;
2743}
2744
2745static void tocDataChecks(unsigned PointerSize, const GlobalVariable *GV) {
2746 // TODO: These asserts should be updated as more support for the toc data
2747 // transformation is added (struct support, etc.).
2748 assert(
2749 PointerSize >= GV->getAlign().valueOrOne().value() &&
2750 "GlobalVariables with an alignment requirement stricter than TOC entry "
2751 "size not supported by the toc data transformation.");
2752
2753 Type *GVType = GV->getValueType();
2754 assert(GVType->isSized() && "A GlobalVariable's size must be known to be "
2755 "supported by the toc data transformation.");
2756 if (GV->getDataLayout().getTypeSizeInBits(GVType) >
2757 PointerSize * 8)
2759 "A GlobalVariable with size larger than a TOC entry is not currently "
2760 "supported by the toc data transformation.");
2761 if (GV->hasPrivateLinkage())
2762 report_fatal_error("A GlobalVariable with private linkage is not "
2763 "currently supported by the toc data transformation.");
2764}
2765
2766void PPCAIXAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
2767 // Special LLVM global arrays have been handled at the initialization.
2769 return;
2770
2771 // If the Global Variable has the toc-data attribute, it needs to be emitted
2772 // when we emit the .toc section.
2773 if (GV->hasAttribute("toc-data")) {
2774 unsigned PointerSize = GV->getDataLayout().getPointerSize();
2775 tocDataChecks(PointerSize, GV);
2776 TOCDataGlobalVars.push_back(GV);
2777 return;
2778 }
2779
2780 emitGlobalVariableHelper(GV);
2781}
2782
2783void PPCAIXAsmPrinter::emitGlobalVariableHelper(const GlobalVariable *GV) {
2784 assert(!GV->getName().starts_with("llvm.") &&
2785 "Unhandled intrinsic global variable.");
2786
2787 if (GV->hasComdat())
2788 report_fatal_error("COMDAT not yet supported by AIX.");
2789
2790 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV));
2791
2792 if (GV->isDeclarationForLinker()) {
2793 emitLinkage(GV, GVSym);
2794 return;
2795 }
2796
2797 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM);
2798 if (!GVKind.isGlobalWriteableData() && !GVKind.isReadOnly() &&
2799 !GVKind.isThreadLocal()) // Checks for both ThreadData and ThreadBSS.
2800 report_fatal_error("Encountered a global variable kind that is "
2801 "not supported yet.");
2802
2803 // Print GV in verbose mode
2804 if (isVerbose()) {
2805 if (GV->hasInitializer()) {
2806 GV->printAsOperand(OutStreamer->getCommentOS(),
2807 /*PrintType=*/false, GV->getParent());
2808 OutStreamer->getCommentOS() << '\n';
2809 }
2810 }
2811
2812 MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(
2813 getObjFileLowering().SectionForGlobal(GV, GVKind, TM));
2814
2815 // Switch to the containing csect.
2816 OutStreamer->switchSection(Csect);
2817
2818 const DataLayout &DL = GV->getDataLayout();
2819
2820 // Handle common and zero-initialized local symbols.
2821 if (GV->hasCommonLinkage() || GVKind.isBSSLocal() ||
2822 GVKind.isThreadBSSLocal()) {
2823 Align Alignment = GV->getAlign().value_or(DL.getPreferredAlign(GV));
2824 uint64_t Size = DL.getTypeAllocSize(GV->getValueType());
2825 GVSym->setStorageClass(
2827
2828 if (GVKind.isBSSLocal() && Csect->getMappingClass() == XCOFF::XMC_TD) {
2829 OutStreamer->emitZeros(Size);
2830 } else if (GVKind.isBSSLocal() || GVKind.isThreadBSSLocal()) {
2831 assert(Csect->getMappingClass() != XCOFF::XMC_TD &&
2832 "BSS local toc-data already handled and TLS variables "
2833 "incompatible with XMC_TD");
2834 OutStreamer->emitXCOFFLocalCommonSymbol(
2835 OutContext.getOrCreateSymbol(GVSym->getSymbolTableName()), Size,
2836 GVSym, Alignment);
2837 } else {
2838 OutStreamer->emitCommonSymbol(GVSym, Size, Alignment);
2839 }
2840 return;
2841 }
2842
2843 MCSymbol *EmittedInitSym = GVSym;
2844
2845 // Emit linkage for the global variable and its aliases.
2846 emitLinkage(GV, EmittedInitSym);
2847 for (const GlobalAlias *GA : GOAliasMap[GV])
2848 emitLinkage(GA, getSymbol(GA));
2849
2850 emitAlignment(getGVAlignment(GV, DL), GV);
2851
2852 // When -fdata-sections is enabled, every GlobalVariable will
2853 // be put into its own csect; therefore, label is not necessary here.
2854 if (!TM.getDataSections() || GV->hasSection()) {
2855 if (Csect->getMappingClass() != XCOFF::XMC_TD)
2856 OutStreamer->emitLabel(EmittedInitSym);
2857 }
2858
2859 // No alias to emit.
2860 if (!GOAliasMap[GV].size()) {
2861 emitGlobalConstant(GV->getDataLayout(), GV->getInitializer());
2862 return;
2863 }
2864
2865 // Aliases with the same offset should be aligned. Record the list of aliases
2866 // associated with the offset.
2867 AliasMapTy AliasList;
2868 for (const GlobalAlias *GA : GOAliasMap[GV])
2869 AliasList[getAliasOffset(GA->getAliasee())].push_back(GA);
2870
2871 // Emit alias label and element value for global variable.
2872 emitGlobalConstant(GV->getDataLayout(), GV->getInitializer(),
2873 &AliasList);
2874}
2875
2876void PPCAIXAsmPrinter::emitFunctionDescriptor() {
2877 const DataLayout &DL = getDataLayout();
2878 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4;
2879
2880 MCSectionSubPair Current = OutStreamer->getCurrentSection();
2881 // Emit function descriptor.
2882 OutStreamer->switchSection(
2883 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getRepresentedCsect());
2884
2885 // Emit aliasing label for function descriptor csect.
2886 for (const GlobalAlias *Alias : GOAliasMap[&MF->getFunction()])
2887 OutStreamer->emitLabel(getSymbol(Alias));
2888
2889 // Emit function entry point address.
2890 OutStreamer->emitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext),
2891 PointerSize);
2892 // Emit TOC base address.
2893 const MCSymbol *TOCBaseSym =
2894 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())
2895 ->getQualNameSymbol();
2896 OutStreamer->emitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext),
2897 PointerSize);
2898 // Emit a null environment pointer.
2899 OutStreamer->emitIntValue(0, PointerSize);
2900
2901 OutStreamer->switchSection(Current.first, Current.second);
2902}
2903
2904void PPCAIXAsmPrinter::emitFunctionEntryLabel() {
2905 // For functions without user defined section, it's not necessary to emit the
2906 // label when we have individual function in its own csect.
2907 if (!TM.getFunctionSections() || MF->getFunction().hasSection())
2908 PPCAsmPrinter::emitFunctionEntryLabel();
2909
2910 // Emit aliasing label for function entry point label.
2911 for (const GlobalAlias *Alias : GOAliasMap[&MF->getFunction()])
2912 OutStreamer->emitLabel(
2913 getObjFileLowering().getFunctionEntryPointSymbol(Alias, TM));
2914}
2915
2916void PPCAIXAsmPrinter::emitPGORefs(Module &M) {
2917 if (!OutContext.hasXCOFFSection(
2918 "__llvm_prf_cnts",
2920 return;
2921
2922 // When inside a csect `foo`, a .ref directive referring to a csect `bar`
2923 // translates into a relocation entry from `foo` to` bar`. The referring
2924 // csect, `foo`, is identified by its address. If multiple csects have the
2925 // same address (because one or more of them are zero-length), the referring
2926 // csect cannot be determined. Hence, we don't generate the .ref directives
2927 // if `__llvm_prf_cnts` is an empty section.
2928 bool HasNonZeroLengthPrfCntsSection = false;
2929 const DataLayout &DL = M.getDataLayout();
2930 for (GlobalVariable &GV : M.globals())
2931 if (GV.hasSection() && GV.getSection() == "__llvm_prf_cnts" &&
2932 DL.getTypeAllocSize(GV.getValueType()) > 0) {
2933 HasNonZeroLengthPrfCntsSection = true;
2934 break;
2935 }
2936
2937 if (HasNonZeroLengthPrfCntsSection) {
2938 MCSection *CntsSection = OutContext.getXCOFFSection(
2939 "__llvm_prf_cnts", SectionKind::getData(),
2941 /*MultiSymbolsAllowed*/ true);
2942
2943 OutStreamer->switchSection(CntsSection);
2944 if (OutContext.hasXCOFFSection(
2945 "__llvm_prf_data",
2947 MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_data[RW]");
2948 OutStreamer->emitXCOFFRefDirective(S);
2949 }
2950 if (OutContext.hasXCOFFSection(
2951 "__llvm_prf_names",
2953 MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_names[RO]");
2954 OutStreamer->emitXCOFFRefDirective(S);
2955 }
2956 if (OutContext.hasXCOFFSection(
2957 "__llvm_prf_vnds",
2959 MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_vnds[RW]");
2960 OutStreamer->emitXCOFFRefDirective(S);
2961 }
2962 }
2963}
2964
2965void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
2966 // If there are no functions and there are no toc-data definitions in this
2967 // module, we will never need to reference the TOC base.
2968 if (M.empty() && TOCDataGlobalVars.empty())
2969 return;
2970
2971 emitPGORefs(M);
2972
2973 // Switch to section to emit TOC base.
2974 OutStreamer->switchSection(getObjFileLowering().getTOCBaseSection());
2975
2976 PPCTargetStreamer *TS =
2977 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2978
2979 for (auto &I : TOC) {
2980 MCSectionXCOFF *TCEntry;
2981 // Setup the csect for the current TC entry. If the variant kind is
2982 // VK_PPC_AIX_TLSGDM the entry represents the region handle, we create a
2983 // new symbol to prefix the name with a dot.
2984 // If TLS model opt is turned on, create a new symbol to prefix the name
2985 // with a dot.
2986 if (I.first.second == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM ||
2987 (Subtarget->hasAIXShLibTLSModelOpt() &&
2988 I.first.second == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD)) {
2990 StringRef Prefix = ".";
2991 Name += Prefix;
2992 Name += cast<MCSymbolXCOFF>(I.first.first)->getSymbolTableName();
2993 MCSymbol *S = OutContext.getOrCreateSymbol(Name);
2994 TCEntry = cast<MCSectionXCOFF>(
2995 getObjFileLowering().getSectionForTOCEntry(S, TM));
2996 } else {
2997 TCEntry = cast<MCSectionXCOFF>(
2998 getObjFileLowering().getSectionForTOCEntry(I.first.first, TM));
2999 }
3000 OutStreamer->switchSection(TCEntry);
3001
3002 OutStreamer->emitLabel(I.second);
3003 TS->emitTCEntry(*I.first.first, I.first.second);
3004 }
3005
3006 // Traverse the list of global variables twice, emitting all of the
3007 // non-common global variables before the common ones, as emitting a
3008 // .comm directive changes the scope from .toc to the common symbol.
3009 for (const auto *GV : TOCDataGlobalVars) {
3010 if (!GV->hasCommonLinkage())
3011 emitGlobalVariableHelper(GV);
3012 }
3013 for (const auto *GV : TOCDataGlobalVars) {
3014 if (GV->hasCommonLinkage())
3015 emitGlobalVariableHelper(GV);
3016 }
3017}
3018
3019bool PPCAIXAsmPrinter::doInitialization(Module &M) {
3020 const bool Result = PPCAsmPrinter::doInitialization(M);
3021
3022 auto setCsectAlignment = [this](const GlobalObject *GO) {
3023 // Declarations have 0 alignment which is set by default.
3024 if (GO->isDeclarationForLinker())
3025 return;
3026
3027 SectionKind GOKind = getObjFileLowering().getKindForGlobal(GO, TM);
3028 MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(
3029 getObjFileLowering().SectionForGlobal(GO, GOKind, TM));
3030
3031 Align GOAlign = getGVAlignment(GO, GO->getDataLayout());
3032 Csect->ensureMinAlignment(GOAlign);
3033 };
3034
3035 // For all TLS variables, calculate their corresponding addresses and store
3036 // them into TLSVarsToAddressMapping, which will be used to determine whether
3037 // or not local-exec TLS variables require special assembly printing.
3038 uint64_t TLSVarAddress = 0;
3039 auto DL = M.getDataLayout();
3040 for (const auto &G : M.globals()) {
3041 if (G.isThreadLocal() && !G.isDeclaration()) {
3042 TLSVarAddress = alignTo(TLSVarAddress, getGVAlignment(&G, DL));
3043 TLSVarsToAddressMapping[&G] = TLSVarAddress;
3044 TLSVarAddress += DL.getTypeAllocSize(G.getValueType());
3045 }
3046 }
3047
3048 // We need to know, up front, the alignment of csects for the assembly path,
3049 // because once a .csect directive gets emitted, we could not change the
3050 // alignment value on it.
3051 for (const auto &G : M.globals()) {
3053 continue;
3054
3056 // Generate a format indicator and a unique module id to be a part of
3057 // the sinit and sterm function names.
3058 if (FormatIndicatorAndUniqueModId.empty()) {
3059 std::string UniqueModuleId = getUniqueModuleId(&M);
3060 if (UniqueModuleId != "")
3061 // TODO: Use source file full path to generate the unique module id
3062 // and add a format indicator as a part of function name in case we
3063 // will support more than one format.
3064 FormatIndicatorAndUniqueModId = "clang_" + UniqueModuleId.substr(1);
3065 else {
3066 // Use threadId, Pid, and current time as the unique module id when we
3067 // cannot generate one based on a module's strong external symbols.
3068 auto CurTime =
3069 std::chrono::duration_cast<std::chrono::nanoseconds>(
3070 std::chrono::steady_clock::now().time_since_epoch())
3071 .count();
3072 FormatIndicatorAndUniqueModId =
3073 "clangPidTidTime_" + llvm::itostr(sys::Process::getProcessId()) +
3074 "_" + llvm::itostr(llvm::get_threadid()) + "_" +
3075 llvm::itostr(CurTime);
3076 }
3077 }
3078
3079 emitSpecialLLVMGlobal(&G);
3080 continue;
3081 }
3082
3083 setCsectAlignment(&G);
3084 std::optional<CodeModel::Model> OptionalCodeModel = G.getCodeModel();
3085 if (OptionalCodeModel)
3086 setOptionalCodeModel(cast<MCSymbolXCOFF>(getSymbol(&G)),
3087 *OptionalCodeModel);
3088 }
3089
3090 for (const auto &F : M)
3091 setCsectAlignment(&F);
3092
3093 // Construct an aliasing list for each GlobalObject.
3094 for (const auto &Alias : M.aliases()) {
3095 const GlobalObject *Aliasee = Alias.getAliaseeObject();
3096 if (!Aliasee)
3098 "alias without a base object is not yet supported on AIX");
3099
3100 if (Aliasee->hasCommonLinkage()) {
3101 report_fatal_error("Aliases to common variables are not allowed on AIX:"
3102 "\n\tAlias attribute for " +
3103 Alias.getGlobalIdentifier() +
3104 " is invalid because " + Aliasee->getName() +
3105 " is common.",
3106 false);
3107 }
3108
3109 const GlobalVariable *GVar =
3110 dyn_cast_or_null<GlobalVariable>(Alias.getAliaseeObject());
3111 if (GVar) {
3112 std::optional<CodeModel::Model> OptionalCodeModel = GVar->getCodeModel();
3113 if (OptionalCodeModel)
3114 setOptionalCodeModel(cast<MCSymbolXCOFF>(getSymbol(&Alias)),
3115 *OptionalCodeModel);
3116 }
3117
3118 GOAliasMap[Aliasee].push_back(&Alias);
3119 }
3120
3121 return Result;
3122}
3123
3124void PPCAIXAsmPrinter::emitInstruction(const MachineInstr *MI) {
3125 switch (MI->getOpcode()) {
3126 default:
3127 break;
3128 case PPC::TW:
3129 case PPC::TWI:
3130 case PPC::TD:
3131 case PPC::TDI: {
3132 if (MI->getNumOperands() < 5)
3133 break;
3134 const MachineOperand &LangMO = MI->getOperand(3);
3135 const MachineOperand &ReasonMO = MI->getOperand(4);
3136 if (!LangMO.isImm() || !ReasonMO.isImm())
3137 break;
3138 MCSymbol *TempSym = OutContext.createNamedTempSymbol();
3139 OutStreamer->emitLabel(TempSym);
3140 OutStreamer->emitXCOFFExceptDirective(CurrentFnSym, TempSym,
3141 LangMO.getImm(), ReasonMO.getImm(),
3142 Subtarget->isPPC64() ? MI->getMF()->getInstructionCount() * 8 :
3143 MI->getMF()->getInstructionCount() * 4,
3144 MMI->hasDebugInfo());
3145 break;
3146 }
3147 case PPC::GETtlsMOD32AIX:
3148 case PPC::GETtlsMOD64AIX:
3149 case PPC::GETtlsTpointer32AIX:
3150 case PPC::GETtlsADDR64AIX:
3151 case PPC::GETtlsADDR32AIX: {
3152 // A reference to .__tls_get_mod/.__tls_get_addr/.__get_tpointer is unknown
3153 // to the assembler so we need to emit an external symbol reference.
3154 MCSymbol *TlsGetAddr =
3155 createMCSymbolForTlsGetAddr(OutContext, MI->getOpcode());
3156 ExtSymSDNodeSymbols.insert(TlsGetAddr);
3157 break;
3158 }
3159 case PPC::BL8:
3160 case PPC::BL:
3161 case PPC::BL8_NOP:
3162 case PPC::BL_NOP: {
3163 const MachineOperand &MO = MI->getOperand(0);
3164 if (MO.isSymbol()) {
3165 MCSymbolXCOFF *S =
3166 cast<MCSymbolXCOFF>(OutContext.getOrCreateSymbol(MO.getSymbolName()));
3167 ExtSymSDNodeSymbols.insert(S);
3168 }
3169 } break;
3170 case PPC::BL_TLS:
3171 case PPC::BL8_TLS:
3172 case PPC::BL8_TLS_:
3173 case PPC::BL8_NOP_TLS:
3174 report_fatal_error("TLS call not yet implemented");
3175 case PPC::TAILB:
3176 case PPC::TAILB8:
3177 case PPC::TAILBA:
3178 case PPC::TAILBA8:
3179 case PPC::TAILBCTR:
3180 case PPC::TAILBCTR8:
3181 if (MI->getOperand(0).isSymbol())
3182 report_fatal_error("Tail call for extern symbol not yet supported.");
3183 break;
3184 case PPC::DST:
3185 case PPC::DST64:
3186 case PPC::DSTT:
3187 case PPC::DSTT64:
3188 case PPC::DSTST:
3189 case PPC::DSTST64:
3190 case PPC::DSTSTT:
3191 case PPC::DSTSTT64:
3192 EmitToStreamer(
3193 *OutStreamer,
3194 MCInstBuilder(PPC::ORI).addReg(PPC::R0).addReg(PPC::R0).addImm(0));
3195 return;
3196 }
3197 return PPCAsmPrinter::emitInstruction(MI);
3198}
3199
3200bool PPCAIXAsmPrinter::doFinalization(Module &M) {
3201 // Do streamer related finalization for DWARF.
3202 if (!MAI->usesDwarfFileAndLocDirectives() && MMI->hasDebugInfo())
3203 OutStreamer->doFinalizationAtSectionEnd(
3204 OutStreamer->getContext().getObjectFileInfo()->getTextSection());
3205
3206 for (MCSymbol *Sym : ExtSymSDNodeSymbols)
3207 OutStreamer->emitSymbolAttribute(Sym, MCSA_Extern);
3208 return PPCAsmPrinter::doFinalization(M);
3209}
3210
3211static unsigned mapToSinitPriority(int P) {
3212 if (P < 0 || P > 65535)
3213 report_fatal_error("invalid init priority");
3214
3215 if (P <= 20)
3216 return P;
3217
3218 if (P < 81)
3219 return 20 + (P - 20) * 16;
3220
3221 if (P <= 1124)
3222 return 1004 + (P - 81);
3223
3224 if (P < 64512)
3225 return 2047 + (P - 1124) * 33878;
3226
3227 return 2147482625u + (P - 64512);
3228}
3229
3230static std::string convertToSinitPriority(int Priority) {
3231 // This helper function converts clang init priority to values used in sinit
3232 // and sterm functions.
3233 //
3234 // The conversion strategies are:
3235 // We map the reserved clang/gnu priority range [0, 100] into the sinit/sterm
3236 // reserved priority range [0, 1023] by
3237 // - directly mapping the first 21 and the last 20 elements of the ranges
3238 // - linear interpolating the intermediate values with a step size of 16.
3239 //
3240 // We map the non reserved clang/gnu priority range of [101, 65535] into the
3241 // sinit/sterm priority range [1024, 2147483648] by:
3242 // - directly mapping the first and the last 1024 elements of the ranges
3243 // - linear interpolating the intermediate values with a step size of 33878.
3244 unsigned int P = mapToSinitPriority(Priority);
3245
3246 std::string PrioritySuffix;
3247 llvm::raw_string_ostream os(PrioritySuffix);
3248 os << llvm::format_hex_no_prefix(P, 8);
3249 os.flush();
3250 return PrioritySuffix;
3251}
3252
3253void PPCAIXAsmPrinter::emitXXStructorList(const DataLayout &DL,
3254 const Constant *List, bool IsCtor) {
3255 SmallVector<Structor, 8> Structors;
3256 preprocessXXStructorList(DL, List, Structors);
3257 if (Structors.empty())
3258 return;
3259
3260 unsigned Index = 0;
3261 for (Structor &S : Structors) {
3262 if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(S.Func))
3263 S.Func = CE->getOperand(0);
3264
3267 (IsCtor ? llvm::Twine("__sinit") : llvm::Twine("__sterm")) +
3268 llvm::Twine(convertToSinitPriority(S.Priority)) +
3269 llvm::Twine("_", FormatIndicatorAndUniqueModId) +
3270 llvm::Twine("_", llvm::utostr(Index++)),
3271 cast<Function>(S.Func));
3272 }
3273}
3274
3275void PPCAIXAsmPrinter::emitTTypeReference(const GlobalValue *GV,
3276 unsigned Encoding) {
3277 if (GV) {
3278 TOCEntryType GlobalType = TOCType_GlobalInternal;
3280 if (Linkage == GlobalValue::ExternalLinkage ||
3283 GlobalType = TOCType_GlobalExternal;
3284 MCSymbol *TypeInfoSym = TM.getSymbol(GV);
3285 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(TypeInfoSym, GlobalType);
3286 const MCSymbol *TOCBaseSym =
3287 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())
3288 ->getQualNameSymbol();
3289 auto &Ctx = OutStreamer->getContext();
3290 const MCExpr *Exp =
3292 MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx);
3293 OutStreamer->emitValue(Exp, GetSizeOfEncodedValue(Encoding));
3294 } else
3295 OutStreamer->emitIntValue(0, GetSizeOfEncodedValue(Encoding));
3296}
3297
3298// Return a pass that prints the PPC assembly code for a MachineFunction to the
3299// given output stream.
3300static AsmPrinter *
3302 std::unique_ptr<MCStreamer> &&Streamer) {
3303 if (tm.getTargetTriple().isOSAIX())
3304 return new PPCAIXAsmPrinter(tm, std::move(Streamer));
3305
3306 return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
3307}
3308
3309void PPCAIXAsmPrinter::emitModuleCommandLines(Module &M) {
3310 const NamedMDNode *NMD = M.getNamedMetadata("llvm.commandline");
3311 if (!NMD || !NMD->getNumOperands())
3312 return;
3313
3314 std::string S;
3315 raw_string_ostream RSOS(S);
3316 for (unsigned i = 0, e = NMD->getNumOperands(); i != e; ++i) {
3317 const MDNode *N = NMD->getOperand(i);
3318 assert(N->getNumOperands() == 1 &&
3319 "llvm.commandline metadata entry can have only one operand");
3320 const MDString *MDS = cast<MDString>(N->getOperand(0));
3321 // Add "@(#)" to support retrieving the command line information with the
3322 // AIX "what" command
3323 RSOS << "@(#)opt " << MDS->getString() << "\n";
3324 RSOS.write('\0');
3325 }
3326 OutStreamer->emitXCOFFCInfoSym(".GCC.command.line", RSOS.str());
3327}
3328
3329// Force static initialization.
3339}
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:135
#define LLVM_DEBUG(X)
Definition: Debug.h:101
std::string Name
uint64_t Size
Symbol * Sym
Definition: ELF_riscv.cpp:479
IRTranslator LLVM IR MI
#define RegName(no)
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
#define G(x, y, z)
Definition: MD5.cpp:56
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
Definition: MIParser.cpp:1414
This file implements a map that provides insertion order iteration.
Module.h This file contains the declarations for the Module class.
#define P(N)
static void collectTOCStats(PPCAsmPrinter::TOCEntryType Type)
static bool isSpecialLLVMGlobalArrayForStaticInit(const GlobalVariable *GV)
static bool isSpecialLLVMGlobalArrayToSkip(const GlobalVariable *GV)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter()
#define GENBOOLCOMMENT(Prefix, V, Field)
static MCSymbol * getMCSymbolForTOCPseudoMO(const MachineOperand &MO, AsmPrinter &AP)
Map a machine operand for a TOC pseudo-machine instruction to its corresponding MCSymbol.
static void setOptionalCodeModel(MCSymbolXCOFF *XSym, CodeModel::Model CM)
static AsmPrinter * createPPCAsmPrinterPass(TargetMachine &tm, std::unique_ptr< MCStreamer > &&Streamer)
static PPCAsmPrinter::TOCEntryType getTOCEntryTypeForMO(const MachineOperand &MO)
static CodeModel::Model getCodeModel(const PPCSubtarget &S, const TargetMachine &TM, const MachineOperand &MO)
static std::string convertToSinitPriority(int Priority)
static MCSymbol * createMCSymbolForTlsGetAddr(MCContext &Ctx, unsigned MIOpc)
This helper function creates the TlsGetAddr/TlsGetMod MCSymbol for AIX.
#define GENVALUECOMMENT(PrefixAndName, V, Field)
static unsigned mapToSinitPriority(int P)
static void tocDataChecks(unsigned PointerSize, const GlobalVariable *GV)
static cl::opt< bool > EnableSSPCanaryBitInTB("aix-ssp-tb-bit", cl::init(false), cl::desc("Enable Passing SSP Canary info in Trackback on AIX"), cl::Hidden)
if(VerifyEach)
const char LLVMTargetMachineRef TM
PassBuilder PB(Machine, PassOpts->PTO, std::nullopt, &PIC)
Provides a library for accessing information about this process and other processes on the operating ...
static SDValue lowerConstant(SDValue Op, SelectionDAG &DAG, const RISCVSubtarget &Subtarget)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
This file implements a set that has insertion order iteration characteristics.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition: Statistic.h:167
This file contains some functions that are useful when dealing with strings.
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
Definition: Value.cpp:469
Value * RHS
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:86
virtual void emitInstruction(const MachineInstr *)
Targets should implement this to emit instructions.
Definition: AsmPrinter.h:555
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:676
void emitXRayTable()
Emit a table with all XRay instrumentation points.
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS)
Print the MachineOperand as a symbol.
virtual void SetupMachineFunction(MachineFunction &MF)
This should be called when a new MachineFunction is being processed from runOnMachineFunction.
virtual void emitStartOfAsmFile(Module &)
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: AsmPrinter.h:531
MCSymbol * GetJTISymbol(unsigned JTID, bool isLinkerPrivate=false) const
Return the symbol for the specified jump table entry.
bool doInitialization(Module &M) override
Set up the AsmPrinter when we are working on a new module.
Definition: AsmPrinter.cpp:434
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:384
virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
virtual void emitFunctionEntryLabel()
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
A constant value that is initialized with an expression using other constant values.
Definition: Constants.h:1084
This is an important base class in LLVM.
Definition: Constant.h:42
This class represents an Operation in the Expression.
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:110
unsigned getPointerSize(unsigned AS=0) const
Layout pointer size in bytes, rounded up to a whole number of bytes.
Definition: DataLayout.cpp:750
TypeSize getTypeSizeInBits(Type *Ty) const
Size examples:
Definition: DataLayout.h:672
Tagged union holding either a T or a Error.
Definition: Error.h:481
Error takeError()
Take ownership of the stored error.
Definition: Error.h:608
reference get()
Returns a reference to the stored T value.
Definition: Error.h:578
static GlobalAlias * create(Type *Ty, unsigned AddressSpace, LinkageTypes Linkage, const Twine &Name, Constant *Aliasee, Module *Parent)
If a parent module is specified, the alias is automatically inserted into the end of the specified mo...
Definition: Globals.cpp:544
MaybeAlign getAlign() const
Returns the alignment of the given variable or function.
Definition: GlobalObject.h:80
bool hasComdat() const
Definition: GlobalObject.h:128
bool hasSection() const
Check if this global has a custom object file section.
Definition: GlobalObject.h:110
VisibilityTypes getVisibility() const
Definition: GlobalValue.h:248
bool isDeclaration() const
Return true if the primary definition of this global value is outside of the current translation unit...
Definition: Globals.cpp:290
LinkageTypes getLinkage() const
Definition: GlobalValue.h:546
bool hasDefaultVisibility() const
Definition: GlobalValue.h:249
bool hasPrivateLinkage() const
Definition: GlobalValue.h:527
ThreadLocalMode getThreadLocalMode() const
Definition: GlobalValue.h:271
bool hasDLLExportStorageClass() const
Definition: GlobalValue.h:281
bool isDeclarationForLinker() const
Definition: GlobalValue.h:618
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:656
const GlobalObject * getAliaseeObject() const
Definition: Globals.cpp:394
@ DefaultVisibility
The GV is visible.
Definition: GlobalValue.h:67
@ HiddenVisibility
The GV is hidden.
Definition: GlobalValue.h:68
@ ProtectedVisibility
The GV is protected.
Definition: GlobalValue.h:69
const DataLayout & getDataLayout() const
Get the data layout of the module this global belongs to.
Definition: Globals.cpp:124
bool hasCommonLinkage() const
Definition: GlobalValue.h:532
bool hasAppendingLinkage() const
Definition: GlobalValue.h:525
LinkageTypes
An enumeration for the kinds of linkage for global values.
Definition: GlobalValue.h:51
@ PrivateLinkage
Like Internal, but omit from symbol table.
Definition: GlobalValue.h:60
@ CommonLinkage
Tentative definitions.
Definition: GlobalValue.h:62
@ InternalLinkage
Rename collisions when linking (static functions).
Definition: GlobalValue.h:59
@ LinkOnceAnyLinkage
Keep one copy of function when linking (inline)
Definition: GlobalValue.h:54
@ WeakODRLinkage
Same, but only replaced by something equivalent.
Definition: GlobalValue.h:57
@ ExternalLinkage
Externally visible function.
Definition: GlobalValue.h:52
@ WeakAnyLinkage
Keep one copy of named function when linking (weak)
Definition: GlobalValue.h:56
@ AppendingLinkage
Special purpose, only applies to global arrays.
Definition: GlobalValue.h:58
@ AvailableExternallyLinkage
Available for inspection, not emission.
Definition: GlobalValue.h:53
@ ExternalWeakLinkage
ExternalWeak linkage description.
Definition: GlobalValue.h:61
@ LinkOnceODRLinkage
Same, but only replaced by something equivalent.
Definition: GlobalValue.h:55
Type * getValueType() const
Definition: GlobalValue.h:296
bool hasAttribute(Attribute::AttrKind Kind) const
Return true if the attribute exists.
bool hasInitializer() const
Definitions have initializers, declarations don't.
std::optional< CodeModel::Model > getCodeModel() const
Get the custom code model of this global if it has one.
Binary assembler expressions.
Definition: MCExpr.h:488
const MCExpr * getRHS() const
Get the right-hand side expression of the binary operator.
Definition: MCExpr.h:638
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:532
Opcode getOpcode() const
Get the kind of this binary expression.
Definition: MCExpr.h:632
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:617
@ Add
Addition.
Definition: MCExpr.h:491
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Definition: MCExpr.cpp:193
Context object for machine code objects.
Definition: MCContext.h:83
MCSectionXCOFF * getXCOFFSection(StringRef Section, SectionKind K, std::optional< XCOFF::CsectProperties > CsectProp=std::nullopt, bool MultiSymbolsAllowed=false, std::optional< XCOFF::DwarfSectionSubtypeFlags > DwarfSubtypeFlags=std::nullopt)
Definition: MCContext.cpp:800
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:34
MCInstBuilder & addReg(unsigned Reg)
Add a new register operand.
Definition: MCInstBuilder.h:37
MCInstBuilder & addImm(int64_t Val)
Add a new integer immediate operand.
Definition: MCInstBuilder.h:43
MCInstBuilder & addExpr(const MCExpr *Val)
Add a new MCExpr operand.
Definition: MCInstBuilder.h:61
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
void setOpcode(unsigned Op)
Definition: MCInst.h:197
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:206
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:162
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:69
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:27
XCOFF::StorageMappingClass getMappingClass() const
MCSymbolXCOFF * getQualNameSymbol() const
Instances of this class represent a uniqued identifier for a section in the current translation unit.
Definition: MCSection.h:36
void setAlignment(Align Value)
Definition: MCSection.h:145
void ensureMinAlignment(Align MinAlignment)
Makes sure that Alignment is at least MinAlignment.
Definition: MCSection.h:148
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:188
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:393
StringRef getSymbolTableName() const
Definition: MCSymbolXCOFF.h:68
void setPerSymbolCodeModel(MCSymbolXCOFF::CodeModel Model)
Definition: MCSymbolXCOFF.h:86
void setStorageClass(XCOFF::StorageClass SC)
Definition: MCSymbolXCOFF.h:42
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:58
Metadata node.
Definition: Metadata.h:1067
A single uniqued string.
Definition: Metadata.h:720
StringRef getString() const
Definition: Metadata.cpp:610
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
MCSection * getSection() const
Returns the Section this function belongs to.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Representation of each machine instruction.
Definition: MachineInstr.h:69
MachineOperand class - Representation of each machine instruction operand.
const GlobalValue * getGlobal() const
int64_t getImm() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
MachineBasicBlock * getMBB() const
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
const BlockAddress * getBlockAddress() const
unsigned getTargetFlags() const
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const char * getSymbolName() const
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
Register getReg() const
getReg - Returns the register number.
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_GlobalAddress
Address of a global value.
@ MO_BlockAddress
Address of a basic block.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_Register
Register operand.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
int64_t getOffset() const
Return the offset from the symbol in this operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:36
iterator end()
Definition: MapVector.h:71
iterator find(const KeyT &Key)
Definition: MapVector.h:167
Root of the metadata hierarchy.
Definition: Metadata.h:62
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
A tuple of MDNodes.
Definition: Metadata.h:1729
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1381
unsigned getNumOperands() const
Definition: Metadata.cpp:1377
uint64_t getTOCSaveOffset() const
getTOCSaveOffset - Return the previous frame offset to save the TOC register – 64-bit SVR4 ABI only.
PPCFunctionInfo - This class is derived from MachineFunction private PowerPC target-specific informat...
MCSymbol * getPICOffsetSymbol(MachineFunction &MF) const
const SmallVectorImpl< Register > & getMustSaveCRs() const
unsigned getFloatingPointParmsNum() const
MCSymbol * getGlobalEPSymbol(MachineFunction &MF) const
MCSymbol * getLocalEPSymbol(MachineFunction &MF) const
unsigned getVectorParmsNum() const
uint32_t getVecExtParmsType() const
MCSymbol * getTOCOffsetSymbol(MachineFunction &MF) const
unsigned getFixedParmsNum() const
static const char * getRegisterName(MCRegister Reg)
static bool hasTLSFlag(unsigned TF)
Definition: PPCInstrInfo.h:315
static const PPCMCExpr * createLo(const MCExpr *Expr, MCContext &Ctx)
Definition: PPCMCExpr.h:48
static const PPCMCExpr * createHa(const MCExpr *Expr, MCContext &Ctx)
Definition: PPCMCExpr.h:56
bool is32BitELFABI() const
Definition: PPCSubtarget.h:219
bool isAIXABI() const
Definition: PPCSubtarget.h:214
const PPCFrameLowering * getFrameLowering() const override
Definition: PPCSubtarget.h:142
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
bool isUsingPCRelativeCalls() const
CodeModel::Model getCodeModel(const TargetMachine &TM, const GlobalValue *GV) const
Calculates the effective code model for argument GV.
bool isELFv2ABI() const
const PPCRegisterInfo * getRegisterInfo() const override
Definition: PPCSubtarget.h:152
bool isGVIndirectSymbol(const GlobalValue *GV) const
True if the GV will be accessed via an indirect symbol.
Common code between 32-bit and 64-bit PowerPC targets.
bool hasGlibcHWCAPAccess() const
virtual void emitAbiVersion(int AbiVersion)
virtual void emitTCEntry(const MCSymbol &S, MCSymbolRefExpr::VariantKind Kind)
virtual void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset)
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
MI-level patchpoint operands.
Definition: StackMaps.h:76
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
SectionKind - This is a simple POD value that classifies the properties of a section.
Definition: SectionKind.h:22
bool isThreadBSSLocal() const
Definition: SectionKind.h:163
static SectionKind getText()
Definition: SectionKind.h:190
bool isBSSLocal() const
Definition: SectionKind.h:170
static SectionKind getData()
Definition: SectionKind.h:213
bool isThreadLocal() const
Definition: SectionKind.h:157
bool isReadOnly() const
Definition: SectionKind.h:131
bool isGlobalWriteableData() const
Definition: SectionKind.h:165
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:370
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
Definition: SmallString.h:26
bool empty() const
Definition: SmallVector.h:94
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
void recordPatchPoint(const MCSymbol &L, const MachineInstr &MI)
Generate a stackmap record for a patchpoint instruction.
Definition: StackMaps.cpp:548
void recordStackMap(const MCSymbol &L, const MachineInstr &MI)
Generate a stackmap record for a stackmap instruction.
Definition: StackMaps.cpp:538
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:556
bool starts_with(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:250
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:69
R Default(T Value)
Definition: StringSwitch.h:182
StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
Definition: StringSwitch.h:90
static bool ShouldSetSSPCanaryBitInTB(const MachineFunction *MF)
static MCSymbol * getEHInfoTableSymbol(const MachineFunction *MF)
static XCOFF::StorageClass getStorageClassForGlobal(const GlobalValue *GV)
static bool ShouldEmitEHBlock(const MachineFunction *MF)
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
const Triple & getTargetTriple() const
bool isOSAIX() const
Tests whether the OS is AIX.
Definition: Triple.h:712
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
bool isSized(SmallPtrSetImpl< Type * > *Visited=nullptr) const
Return true if it makes sense to take the size of this type.
Definition: Type.h:302
LLVM Value Representation.
Definition: Value.h:74
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:5022
Align getPointerAlignment(const DataLayout &DL) const
Returns an alignment of the pointer value.
Definition: Value.cpp:927
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:5105
bool hasName() const
Definition: Value.h:261
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:309
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:661
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:691
static Pid getProcessId()
Get the process's identifier.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:121
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
@ SHT_PROGBITS
Definition: ELF.h:1068
@ SHF_ALLOC
Definition: ELF.h:1165
@ SHF_WRITE
Definition: ELF.h:1162
const uint64_t Version
Definition: InstrProf.h:1107
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:148
@ MO_TLSLDM_FLAG
MO_TLSLDM_FLAG - on AIX the ML relocation type is only valid for a reference to a TOC symbol from the...
Definition: PPC.h:146
@ MO_TPREL_PCREL_FLAG
MO_TPREL_PCREL_FLAG = MO_PCREL_FLAG | MO_TPREL_FLAG.
Definition: PPC.h:197
@ MO_GOT_TPREL_PCREL_FLAG
MO_GOT_TPREL_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...
Definition: PPC.h:172
@ MO_TLSGDM_FLAG
MO_TLSGDM_FLAG - If this bit is set the symbol reference is relative to the region handle of TLS Gene...
Definition: PPC.h:154
@ MO_TLSLD_FLAG
MO_TLSLD_FLAG - If this bit is set the symbol reference is relative to TLS Local Dynamic model.
Definition: PPC.h:150
@ MO_TPREL_FLAG
MO_TPREL_FLAG - If this bit is set, the symbol reference is relative to the thread pointer and the sy...
Definition: PPC.h:140
@ MO_GOT_TLSLD_PCREL_FLAG
MO_GOT_TLSLD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...
Definition: PPC.h:166
@ MO_TLSGD_FLAG
MO_TLSGD_FLAG - If this bit is set the symbol reference is relative to TLS General Dynamic model for ...
Definition: PPC.h:135
@ MO_GOT_TLSGD_PCREL_FLAG
MO_GOT_TLSGD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...
Definition: PPC.h:160
Predicate
Predicate - These are "(BI << 5) | BO" for various predicates.
Definition: PPCPredicates.h:26
const char * stripRegisterPrefix(const char *RegName)
stripRegisterPrefix - This method strips the character prefix from a register name so that only the n...
Predicate InvertPredicate(Predicate Opcode)
Invert the specified predicate. != -> ==, < -> >=.
static bool isVRRegister(unsigned Reg)
static bool isVFRegister(unsigned Reg)
@ CE
Windows NT (Windows on ARM)
Reg
All possible values of the reg field in the ModR/M byte.
void emitInstruction(MCObjectStreamer &, const MCInst &Inst, const MCSubtargetInfo &STI)
SmallString< 32 > getExtendedTBTableFlagString(uint8_t Flag)
Definition: XCOFF.cpp:162
Expected< SmallString< 32 > > parseParmsTypeWithVecInfo(uint32_t Value, unsigned FixedParmsNum, unsigned FloatingParmsNum, unsigned VectorParmsNum)
Definition: XCOFF.cpp:188
Expected< SmallString< 32 > > parseParmsType(uint32_t Value, unsigned FixedParmsNum, unsigned FloatingParmsNum)
Definition: XCOFF.cpp:110
Expected< SmallString< 32 > > parseVectorParmsType(uint32_t Value, unsigned ParmsNum)
Definition: XCOFF.cpp:240
@ XMC_RW
Read Write Data.
Definition: XCOFF.h:117
@ XMC_RO
Read Only Constant.
Definition: XCOFF.h:106
@ XMC_TD
Scalar data item in the TOC.
Definition: XCOFF.h:120
@ XMC_PR
Program Code.
Definition: XCOFF.h:105
StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId)
Definition: XCOFF.cpp:87
constexpr uint8_t AllocRegNo
Definition: XCOFF.h:44
@ XTY_SD
Csect definition for initialized storage.
Definition: XCOFF.h:242
@ XTY_ER
External reference.
Definition: XCOFF.h:241
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
unsigned combineHashValue(unsigned a, unsigned b)
Simplistic combination of 32-bit hash values into 32-bit hash values.
Definition: DenseMapInfo.h:39
std::optional< const char * > toString(const std::optional< DWARFFormValue > &V)
Take an optional DWARFFormValue and try to extract a string value from it.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
Definition: STLExtras.h:329
@ Offset
Definition: DWP.cpp:480
Target & getThePPC64LETarget()
auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)
Get the size of a range.
Definition: STLExtras.h:1680
bool LowerPPCMachineOperandToMCOperand(const MachineOperand &MO, MCOperand &OutMO, AsmPrinter &AP)
Target & getThePPC32Target()
std::string getUniqueModuleId(Module *M)
Produce a unique identifier for this module by taking the MD5 sum of the names of the module's strong...
std::pair< MCSection *, uint32_t > MCSectionSubPair
Definition: MCStreamer.h:67
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:167
FormattedNumber format_hex_no_prefix(uint64_t N, unsigned Width, bool Upper=false)
format_hex_no_prefix - Output N as a fixed width hexadecimal.
Definition: Format.h:200
Target & getThePPC64Target()
uint64_t get_threadid()
Return the current thread id, as used in various OS system calls.
Definition: Threading.cpp:33
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:155
Target & getThePPC32LETarget()
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1849
MCSymbolAttr
Definition: MCDirectives.h:18
@ MCSA_Weak
.weak
Definition: MCDirectives.h:45
@ MCSA_Global
.type _foo, @gnu_unique_object
Definition: MCDirectives.h:30
@ MCSA_Extern
.extern (XCOFF)
Definition: MCDirectives.h:32
@ MCSA_LGlobal
.lglobl (XCOFF)
Definition: MCDirectives.h:31
@ MCSA_Invalid
Not a valid directive.
Definition: MCDirectives.h:19
Implement std::hash so that hash_code can be used in STL containers.
Definition: BitVector.h:858
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > TOCKey
An information struct used to provide DenseMap with the various necessary components for a given valu...
Definition: DenseMapInfo.h:52
Align valueOrOne() const
For convenience, returns a valid alignment or 1 if undefined.
Definition: Alignment.h:141
static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn)
RegisterAsmPrinter - Register an AsmPrinter implementation for the given target.
static constexpr uint32_t FPRSavedMask
Definition: XCOFF.h:412
static constexpr uint16_t NumberOfVRSavedMask
Definition: XCOFF.h:442
static constexpr uint8_t NumberOfFloatingPointParmsShift
Definition: XCOFF.h:428
static constexpr uint32_t NumberOfFixedParmsMask
Definition: XCOFF.h:422
static constexpr uint16_t HasVMXInstructionMask
Definition: XCOFF.h:448
static constexpr uint32_t IsLRSavedMask
Definition: XCOFF.h:406
static constexpr uint16_t HasVarArgsMask
Definition: XCOFF.h:444
static constexpr uint32_t IsAllocaUsedMask
Definition: XCOFF.h:403
static constexpr uint16_t IsVRSavedOnStackMask
Definition: XCOFF.h:443
static constexpr uint16_t NumberOfVectorParmsMask
Definition: XCOFF.h:447
static constexpr uint32_t IsFloatingPointPresentMask
Definition: XCOFF.h:396
static constexpr uint32_t FPRSavedShift
Definition: XCOFF.h:413
static constexpr uint32_t NumberOfFloatingPointParmsMask
Definition: XCOFF.h:426
static constexpr uint32_t HasControlledStorageMask
Definition: XCOFF.h:394
static constexpr uint32_t HasExtensionTableMask
Definition: XCOFF.h:416
static constexpr uint32_t HasTraceBackTableOffsetMask
Definition: XCOFF.h:392
static constexpr uint32_t IsCRSavedMask
Definition: XCOFF.h:405
static constexpr uint8_t NumberOfFixedParmsShift
Definition: XCOFF.h:423
static constexpr uint32_t GPRSavedMask
Definition: XCOFF.h:418
static constexpr uint8_t NumberOfVectorParmsShift
Definition: XCOFF.h:449
static constexpr uint32_t HasParmsOnStackMask
Definition: XCOFF.h:427
static constexpr uint32_t IsFunctionNamePresentMask
Definition: XCOFF.h:402
static constexpr uint32_t IsBackChainStoredMask
Definition: XCOFF.h:410
static constexpr uint32_t IsInterruptHandlerMask
Definition: XCOFF.h:401
static constexpr uint32_t HasVectorInfoMask
Definition: XCOFF.h:417
static constexpr uint8_t NumberOfVRSavedShift
Definition: XCOFF.h:445
static constexpr uint32_t GPRSavedShift
Definition: XCOFF.h:419