LLVM  14.0.0git
MIParser.cpp
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1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the parsing of machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "MILexer.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/APSInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/None.h"
20 #include "llvm/ADT/Optional.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringMap.h"
23 #include "llvm/ADT/StringRef.h"
24 #include "llvm/ADT/StringSwitch.h"
25 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
44 #include "llvm/IR/BasicBlock.h"
45 #include "llvm/IR/Constants.h"
46 #include "llvm/IR/DataLayout.h"
48 #include "llvm/IR/DebugLoc.h"
49 #include "llvm/IR/Function.h"
50 #include "llvm/IR/InstrTypes.h"
51 #include "llvm/IR/Instructions.h"
52 #include "llvm/IR/Intrinsics.h"
53 #include "llvm/IR/Metadata.h"
54 #include "llvm/IR/Module.h"
56 #include "llvm/IR/Type.h"
57 #include "llvm/IR/Value.h"
59 #include "llvm/MC/LaneBitmask.h"
60 #include "llvm/MC/MCContext.h"
61 #include "llvm/MC/MCDwarf.h"
62 #include "llvm/MC/MCInstrDesc.h"
63 #include "llvm/MC/MCRegisterInfo.h"
66 #include "llvm/Support/Casting.h"
70 #include "llvm/Support/SMLoc.h"
71 #include "llvm/Support/SourceMgr.h"
75 #include <algorithm>
76 #include <cassert>
77 #include <cctype>
78 #include <cstddef>
79 #include <cstdint>
80 #include <limits>
81 #include <string>
82 #include <utility>
83 
84 using namespace llvm;
85 
87  const TargetSubtargetInfo &NewSubtarget) {
88 
89  // If the subtarget changed, over conservatively assume everything is invalid.
90  if (&Subtarget == &NewSubtarget)
91  return;
92 
93  Names2InstrOpCodes.clear();
94  Names2Regs.clear();
95  Names2RegMasks.clear();
96  Names2SubRegIndices.clear();
97  Names2TargetIndices.clear();
98  Names2DirectTargetFlags.clear();
99  Names2BitmaskTargetFlags.clear();
100  Names2MMOTargetFlags.clear();
101 
102  initNames2RegClasses();
103  initNames2RegBanks();
104 }
105 
106 void PerTargetMIParsingState::initNames2Regs() {
107  if (!Names2Regs.empty())
108  return;
109 
110  // The '%noreg' register is the register 0.
111  Names2Regs.insert(std::make_pair("noreg", 0));
112  const auto *TRI = Subtarget.getRegisterInfo();
113  assert(TRI && "Expected target register info");
114 
115  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
116  bool WasInserted =
117  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
118  .second;
119  (void)WasInserted;
120  assert(WasInserted && "Expected registers to be unique case-insensitively");
121  }
122 }
123 
125  Register &Reg) {
126  initNames2Regs();
127  auto RegInfo = Names2Regs.find(RegName);
128  if (RegInfo == Names2Regs.end())
129  return true;
130  Reg = RegInfo->getValue();
131  return false;
132 }
133 
134 void PerTargetMIParsingState::initNames2InstrOpCodes() {
135  if (!Names2InstrOpCodes.empty())
136  return;
137  const auto *TII = Subtarget.getInstrInfo();
138  assert(TII && "Expected target instruction info");
139  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
140  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
141 }
142 
144  unsigned &OpCode) {
145  initNames2InstrOpCodes();
146  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
147  if (InstrInfo == Names2InstrOpCodes.end())
148  return true;
149  OpCode = InstrInfo->getValue();
150  return false;
151 }
152 
153 void PerTargetMIParsingState::initNames2RegMasks() {
154  if (!Names2RegMasks.empty())
155  return;
156  const auto *TRI = Subtarget.getRegisterInfo();
157  assert(TRI && "Expected target register info");
159  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
160  assert(RegMasks.size() == RegMaskNames.size());
161  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
162  Names2RegMasks.insert(
163  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
164 }
165 
167  initNames2RegMasks();
168  auto RegMaskInfo = Names2RegMasks.find(Identifier);
169  if (RegMaskInfo == Names2RegMasks.end())
170  return nullptr;
171  return RegMaskInfo->getValue();
172 }
173 
174 void PerTargetMIParsingState::initNames2SubRegIndices() {
175  if (!Names2SubRegIndices.empty())
176  return;
177  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
178  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
179  Names2SubRegIndices.insert(
180  std::make_pair(TRI->getSubRegIndexName(I), I));
181 }
182 
184  initNames2SubRegIndices();
185  auto SubRegInfo = Names2SubRegIndices.find(Name);
186  if (SubRegInfo == Names2SubRegIndices.end())
187  return 0;
188  return SubRegInfo->getValue();
189 }
190 
191 void PerTargetMIParsingState::initNames2TargetIndices() {
192  if (!Names2TargetIndices.empty())
193  return;
194  const auto *TII = Subtarget.getInstrInfo();
195  assert(TII && "Expected target instruction info");
196  auto Indices = TII->getSerializableTargetIndices();
197  for (const auto &I : Indices)
198  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
199 }
200 
202  initNames2TargetIndices();
203  auto IndexInfo = Names2TargetIndices.find(Name);
204  if (IndexInfo == Names2TargetIndices.end())
205  return true;
206  Index = IndexInfo->second;
207  return false;
208 }
209 
210 void PerTargetMIParsingState::initNames2DirectTargetFlags() {
211  if (!Names2DirectTargetFlags.empty())
212  return;
213 
214  const auto *TII = Subtarget.getInstrInfo();
215  assert(TII && "Expected target instruction info");
217  for (const auto &I : Flags)
218  Names2DirectTargetFlags.insert(
219  std::make_pair(StringRef(I.second), I.first));
220 }
221 
223  unsigned &Flag) {
224  initNames2DirectTargetFlags();
225  auto FlagInfo = Names2DirectTargetFlags.find(Name);
226  if (FlagInfo == Names2DirectTargetFlags.end())
227  return true;
228  Flag = FlagInfo->second;
229  return false;
230 }
231 
232 void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
233  if (!Names2BitmaskTargetFlags.empty())
234  return;
235 
236  const auto *TII = Subtarget.getInstrInfo();
237  assert(TII && "Expected target instruction info");
239  for (const auto &I : Flags)
240  Names2BitmaskTargetFlags.insert(
241  std::make_pair(StringRef(I.second), I.first));
242 }
243 
245  unsigned &Flag) {
246  initNames2BitmaskTargetFlags();
247  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
248  if (FlagInfo == Names2BitmaskTargetFlags.end())
249  return true;
250  Flag = FlagInfo->second;
251  return false;
252 }
253 
254 void PerTargetMIParsingState::initNames2MMOTargetFlags() {
255  if (!Names2MMOTargetFlags.empty())
256  return;
257 
258  const auto *TII = Subtarget.getInstrInfo();
259  assert(TII && "Expected target instruction info");
260  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
261  for (const auto &I : Flags)
262  Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));
263 }
264 
267  initNames2MMOTargetFlags();
268  auto FlagInfo = Names2MMOTargetFlags.find(Name);
269  if (FlagInfo == Names2MMOTargetFlags.end())
270  return true;
271  Flag = FlagInfo->second;
272  return false;
273 }
274 
275 void PerTargetMIParsingState::initNames2RegClasses() {
276  if (!Names2RegClasses.empty())
277  return;
278 
279  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
280  for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
281  const auto *RC = TRI->getRegClass(I);
282  Names2RegClasses.insert(
283  std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
284  }
285 }
286 
287 void PerTargetMIParsingState::initNames2RegBanks() {
288  if (!Names2RegBanks.empty())
289  return;
290 
291  const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
292  // If the target does not support GlobalISel, we may not have a
293  // register bank info.
294  if (!RBI)
295  return;
296 
297  for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
298  const auto &RegBank = RBI->getRegBank(I);
299  Names2RegBanks.insert(
300  std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
301  }
302 }
303 
304 const TargetRegisterClass *
306  auto RegClassInfo = Names2RegClasses.find(Name);
307  if (RegClassInfo == Names2RegClasses.end())
308  return nullptr;
309  return RegClassInfo->getValue();
310 }
311 
313  auto RegBankInfo = Names2RegBanks.find(Name);
314  if (RegBankInfo == Names2RegBanks.end())
315  return nullptr;
316  return RegBankInfo->getValue();
317 }
318 
320  SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &T)
321  : MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {
322 }
323 
325  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
326  if (I.second) {
328  VRegInfo *Info = new (Allocator) VRegInfo;
330  I.first->second = Info;
331  }
332  return *I.first->second;
333 }
334 
336  assert(RegName != "" && "Expected named reg.");
337 
338  auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
339  if (I.second) {
340  VRegInfo *Info = new (Allocator) VRegInfo;
342  I.first->second = Info;
343  }
344  return *I.first->second;
345 }
346 
347 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
348  DenseMap<unsigned, const Value *> &Slots2Values) {
349  int Slot = MST.getLocalSlot(V);
350  if (Slot == -1)
351  return;
352  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
353 }
354 
355 /// Creates the mapping from slot numbers to function's unnamed IR values.
356 static void initSlots2Values(const Function &F,
357  DenseMap<unsigned, const Value *> &Slots2Values) {
358  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
359  MST.incorporateFunction(F);
360  for (const auto &Arg : F.args())
361  mapValueToSlot(&Arg, MST, Slots2Values);
362  for (const auto &BB : F) {
363  mapValueToSlot(&BB, MST, Slots2Values);
364  for (const auto &I : BB)
365  mapValueToSlot(&I, MST, Slots2Values);
366  }
367 }
368 
370  if (Slots2Values.empty())
372  return Slots2Values.lookup(Slot);
373 }
374 
375 namespace {
376 
377 /// A wrapper struct around the 'MachineOperand' struct that includes a source
378 /// range and other attributes.
379 struct ParsedMachineOperand {
380  MachineOperand Operand;
381  StringRef::iterator Begin;
383  Optional<unsigned> TiedDefIdx;
384 
385  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
386  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
387  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
388  if (TiedDefIdx)
389  assert(Operand.isReg() && Operand.isUse() &&
390  "Only used register operands can be tied");
391  }
392 };
393 
394 class MIParser {
395  MachineFunction &MF;
397  StringRef Source, CurrentSource;
398  SMRange SourceRange;
399  MIToken Token;
401  /// Maps from slot numbers to function's unnamed basic blocks.
402  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
403 
404 public:
406  StringRef Source);
408  StringRef Source, SMRange SourceRange);
409 
410  /// \p SkipChar gives the number of characters to skip before looking
411  /// for the next token.
412  void lex(unsigned SkipChar = 0);
413 
414  /// Report an error at the current location with the given message.
415  ///
416  /// This function always return true.
417  bool error(const Twine &Msg);
418 
419  /// Report an error at the given location with the given message.
420  ///
421  /// This function always return true.
422  bool error(StringRef::iterator Loc, const Twine &Msg);
423 
424  bool
425  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
426  bool parseBasicBlocks();
427  bool parse(MachineInstr *&MI);
428  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
429  bool parseStandaloneNamedRegister(Register &Reg);
430  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
431  bool parseStandaloneRegister(Register &Reg);
432  bool parseStandaloneStackObject(int &FI);
433  bool parseStandaloneMDNode(MDNode *&Node);
434  bool parseMachineMetadata();
435  bool parseMDTuple(MDNode *&MD, bool IsDistinct);
436  bool parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts);
437  bool parseMetadata(Metadata *&MD);
438 
439  bool
440  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
441  bool parseBasicBlock(MachineBasicBlock &MBB,
442  MachineBasicBlock *&AddFalthroughFrom);
443  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
444  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
445 
446  bool parseNamedRegister(Register &Reg);
447  bool parseVirtualRegister(VRegInfo *&Info);
448  bool parseNamedVirtualRegister(VRegInfo *&Info);
449  bool parseRegister(Register &Reg, VRegInfo *&VRegInfo);
450  bool parseRegisterFlag(unsigned &Flags);
451  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
452  bool parseSubRegisterIndex(unsigned &SubReg);
453  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
454  bool parseRegisterOperand(MachineOperand &Dest,
455  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
456  bool parseImmediateOperand(MachineOperand &Dest);
457  bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
458  const Constant *&C);
459  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
460  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
461  bool parseTypedImmediateOperand(MachineOperand &Dest);
462  bool parseFPImmediateOperand(MachineOperand &Dest);
464  bool parseMBBOperand(MachineOperand &Dest);
465  bool parseStackFrameIndex(int &FI);
466  bool parseStackObjectOperand(MachineOperand &Dest);
467  bool parseFixedStackFrameIndex(int &FI);
468  bool parseFixedStackObjectOperand(MachineOperand &Dest);
469  bool parseGlobalValue(GlobalValue *&GV);
470  bool parseGlobalAddressOperand(MachineOperand &Dest);
471  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
472  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
473  bool parseJumpTableIndexOperand(MachineOperand &Dest);
474  bool parseExternalSymbolOperand(MachineOperand &Dest);
475  bool parseMCSymbolOperand(MachineOperand &Dest);
476  bool parseMDNode(MDNode *&Node);
477  bool parseDIExpression(MDNode *&Expr);
478  bool parseDILocation(MDNode *&Expr);
479  bool parseMetadataOperand(MachineOperand &Dest);
480  bool parseCFIOffset(int &Offset);
481  bool parseCFIRegister(Register &Reg);
482  bool parseCFIAddressSpace(unsigned &AddressSpace);
483  bool parseCFIEscapeValues(std::string& Values);
484  bool parseCFIOperand(MachineOperand &Dest);
485  bool parseIRBlock(BasicBlock *&BB, const Function &F);
486  bool parseBlockAddressOperand(MachineOperand &Dest);
487  bool parseIntrinsicOperand(MachineOperand &Dest);
488  bool parsePredicateOperand(MachineOperand &Dest);
489  bool parseShuffleMaskOperand(MachineOperand &Dest);
490  bool parseTargetIndexOperand(MachineOperand &Dest);
491  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
492  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
493  bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
494  MachineOperand &Dest,
495  Optional<unsigned> &TiedDefIdx);
496  bool parseMachineOperandAndTargetFlags(const unsigned OpCode,
497  const unsigned OpIdx,
498  MachineOperand &Dest,
499  Optional<unsigned> &TiedDefIdx);
500  bool parseOffset(int64_t &Offset);
501  bool parseAlignment(uint64_t &Alignment);
502  bool parseAddrspace(unsigned &Addrspace);
503  bool parseSectionID(Optional<MBBSectionID> &SID);
504  bool parseOperandsOffset(MachineOperand &Op);
505  bool parseIRValue(const Value *&V);
506  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
507  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
508  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
509  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
510  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
511  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
512  bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
513  bool parseHeapAllocMarker(MDNode *&Node);
514 
515  bool parseTargetImmMnemonic(const unsigned OpCode, const unsigned OpIdx,
516  MachineOperand &Dest, const MIRFormatter &MF);
517 
518 private:
519  /// Convert the integer literal in the current token into an unsigned integer.
520  ///
521  /// Return true if an error occurred.
522  bool getUnsigned(unsigned &Result);
523 
524  /// Convert the integer literal in the current token into an uint64.
525  ///
526  /// Return true if an error occurred.
527  bool getUint64(uint64_t &Result);
528 
529  /// Convert the hexadecimal literal in the current token into an unsigned
530  /// APInt with a minimum bitwidth required to represent the value.
531  ///
532  /// Return true if the literal does not represent an integer value.
533  bool getHexUint(APInt &Result);
534 
535  /// If the current token is of the given kind, consume it and return false.
536  /// Otherwise report an error and return true.
537  bool expectAndConsume(MIToken::TokenKind TokenKind);
538 
539  /// If the current token is of the given kind, consume it and return true.
540  /// Otherwise return false.
541  bool consumeIfPresent(MIToken::TokenKind TokenKind);
542 
543  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
544 
545  bool assignRegisterTies(MachineInstr &MI,
547 
548  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
549  const MCInstrDesc &MCID);
550 
551  const BasicBlock *getIRBlock(unsigned Slot);
552  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
553 
554  /// Get or create an MCSymbol for a given name.
555  MCSymbol *getOrCreateMCSymbol(StringRef Name);
556 
557  /// parseStringConstant
558  /// ::= StringConstant
559  bool parseStringConstant(std::string &Result);
560 
561  /// Map the location in the MI string to the corresponding location specified
562  /// in `SourceRange`.
563  SMLoc mapSMLoc(StringRef::iterator Loc);
564 };
565 
566 } // end anonymous namespace
567 
568 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
570  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
571 {}
572 
573 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
574  StringRef Source, SMRange SourceRange)
575  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source),
576  SourceRange(SourceRange), PFS(PFS) {}
577 
578 void MIParser::lex(unsigned SkipChar) {
579  CurrentSource = lexMIToken(
580  CurrentSource.slice(SkipChar, StringRef::npos), Token,
581  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
582 }
583 
584 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
585 
586 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
587  const SourceMgr &SM = *PFS.SM;
588  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
589  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
590  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
591  // Create an ordinary diagnostic when the source manager's buffer is the
592  // source string.
594  return true;
595  }
596  // Create a diagnostic for a YAML string literal.
597  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
598  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
599  Source, None, None);
600  return true;
601 }
602 
603 SMLoc MIParser::mapSMLoc(StringRef::iterator Loc) {
604  assert(SourceRange.isValid() && "Invalid source range");
605  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
606  return SMLoc::getFromPointer(SourceRange.Start.getPointer() +
607  (Loc - Source.data()));
608 }
609 
610 typedef function_ref<bool(StringRef::iterator Loc, const Twine &)>
612 
613 static const char *toString(MIToken::TokenKind TokenKind) {
614  switch (TokenKind) {
615  case MIToken::comma:
616  return "','";
617  case MIToken::equal:
618  return "'='";
619  case MIToken::colon:
620  return "':'";
621  case MIToken::lparen:
622  return "'('";
623  case MIToken::rparen:
624  return "')'";
625  default:
626  return "<unknown token>";
627  }
628 }
629 
630 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
631  if (Token.isNot(TokenKind))
632  return error(Twine("expected ") + toString(TokenKind));
633  lex();
634  return false;
635 }
636 
637 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
638  if (Token.isNot(TokenKind))
639  return false;
640  lex();
641  return true;
642 }
643 
644 // Parse Machine Basic Block Section ID.
645 bool MIParser::parseSectionID(Optional<MBBSectionID> &SID) {
646  assert(Token.is(MIToken::kw_bbsections));
647  lex();
648  if (Token.is(MIToken::IntegerLiteral)) {
649  unsigned Value = 0;
650  if (getUnsigned(Value))
651  return error("Unknown Section ID");
652  SID = MBBSectionID{Value};
653  } else {
654  const StringRef &S = Token.stringValue();
655  if (S == "Exception")
657  else if (S == "Cold")
659  else
660  return error("Unknown Section ID");
661  }
662  lex();
663  return false;
664 }
665 
666 bool MIParser::parseBasicBlockDefinition(
669  unsigned ID = 0;
670  if (getUnsigned(ID))
671  return true;
672  auto Loc = Token.location();
673  auto Name = Token.stringValue();
674  lex();
675  bool HasAddressTaken = false;
676  bool IsLandingPad = false;
677  bool IsInlineAsmBrIndirectTarget = false;
678  bool IsEHFuncletEntry = false;
679  Optional<MBBSectionID> SectionID;
680  uint64_t Alignment = 0;
681  BasicBlock *BB = nullptr;
682  if (consumeIfPresent(MIToken::lparen)) {
683  do {
684  // TODO: Report an error when multiple same attributes are specified.
685  switch (Token.kind()) {
687  HasAddressTaken = true;
688  lex();
689  break;
691  IsLandingPad = true;
692  lex();
693  break;
695  IsInlineAsmBrIndirectTarget = true;
696  lex();
697  break;
699  IsEHFuncletEntry = true;
700  lex();
701  break;
702  case MIToken::kw_align:
703  if (parseAlignment(Alignment))
704  return true;
705  break;
706  case MIToken::IRBlock:
707  // TODO: Report an error when both name and ir block are specified.
708  if (parseIRBlock(BB, MF.getFunction()))
709  return true;
710  lex();
711  break;
713  if (parseSectionID(SectionID))
714  return true;
715  break;
716  default:
717  break;
718  }
719  } while (consumeIfPresent(MIToken::comma));
720  if (expectAndConsume(MIToken::rparen))
721  return true;
722  }
723  if (expectAndConsume(MIToken::colon))
724  return true;
725 
726  if (!Name.empty()) {
727  BB = dyn_cast_or_null<BasicBlock>(
728  MF.getFunction().getValueSymbolTable()->lookup(Name));
729  if (!BB)
730  return error(Loc, Twine("basic block '") + Name +
731  "' is not defined in the function '" +
732  MF.getName() + "'");
733  }
734  auto *MBB = MF.CreateMachineBasicBlock(BB);
735  MF.insert(MF.end(), MBB);
736  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
737  if (!WasInserted)
738  return error(Loc, Twine("redefinition of machine basic block with id #") +
739  Twine(ID));
740  if (Alignment)
741  MBB->setAlignment(Align(Alignment));
742  if (HasAddressTaken)
744  MBB->setIsEHPad(IsLandingPad);
745  MBB->setIsInlineAsmBrIndirectTarget(IsInlineAsmBrIndirectTarget);
746  MBB->setIsEHFuncletEntry(IsEHFuncletEntry);
747  if (SectionID.hasValue()) {
748  MBB->setSectionID(SectionID.getValue());
749  MF.setBBSectionsType(BasicBlockSection::List);
750  }
751  return false;
752 }
753 
754 bool MIParser::parseBasicBlockDefinitions(
756  lex();
757  // Skip until the first machine basic block.
758  while (Token.is(MIToken::Newline))
759  lex();
760  if (Token.isErrorOrEOF())
761  return Token.isError();
762  if (Token.isNot(MIToken::MachineBasicBlockLabel))
763  return error("expected a basic block definition before instructions");
764  unsigned BraceDepth = 0;
765  do {
766  if (parseBasicBlockDefinition(MBBSlots))
767  return true;
768  bool IsAfterNewline = false;
769  // Skip until the next machine basic block.
770  while (true) {
771  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
772  Token.isErrorOrEOF())
773  break;
774  else if (Token.is(MIToken::MachineBasicBlockLabel))
775  return error("basic block definition should be located at the start of "
776  "the line");
777  else if (consumeIfPresent(MIToken::Newline)) {
778  IsAfterNewline = true;
779  continue;
780  }
781  IsAfterNewline = false;
782  if (Token.is(MIToken::lbrace))
783  ++BraceDepth;
784  if (Token.is(MIToken::rbrace)) {
785  if (!BraceDepth)
786  return error("extraneous closing brace ('}')");
787  --BraceDepth;
788  }
789  lex();
790  }
791  // Verify that we closed all of the '{' at the end of a file or a block.
792  if (!Token.isError() && BraceDepth)
793  return error("expected '}'"); // FIXME: Report a note that shows '{'.
794  } while (!Token.isErrorOrEOF());
795  return Token.isError();
796 }
797 
798 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
799  assert(Token.is(MIToken::kw_liveins));
800  lex();
801  if (expectAndConsume(MIToken::colon))
802  return true;
803  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
804  return false;
805  do {
806  if (Token.isNot(MIToken::NamedRegister))
807  return error("expected a named register");
808  Register Reg;
809  if (parseNamedRegister(Reg))
810  return true;
811  lex();
813  if (consumeIfPresent(MIToken::colon)) {
814  // Parse lane mask.
815  if (Token.isNot(MIToken::IntegerLiteral) &&
816  Token.isNot(MIToken::HexLiteral))
817  return error("expected a lane mask");
818  static_assert(sizeof(LaneBitmask::Type) == sizeof(uint64_t),
819  "Use correct get-function for lane mask");
821  if (getUint64(V))
822  return error("invalid lane mask value");
823  Mask = LaneBitmask(V);
824  lex();
825  }
826  MBB.addLiveIn(Reg, Mask);
827  } while (consumeIfPresent(MIToken::comma));
828  return false;
829 }
830 
831 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
832  assert(Token.is(MIToken::kw_successors));
833  lex();
834  if (expectAndConsume(MIToken::colon))
835  return true;
836  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
837  return false;
838  do {
839  if (Token.isNot(MIToken::MachineBasicBlock))
840  return error("expected a machine basic block reference");
841  MachineBasicBlock *SuccMBB = nullptr;
842  if (parseMBBReference(SuccMBB))
843  return true;
844  lex();
845  unsigned Weight = 0;
846  if (consumeIfPresent(MIToken::lparen)) {
847  if (Token.isNot(MIToken::IntegerLiteral) &&
848  Token.isNot(MIToken::HexLiteral))
849  return error("expected an integer literal after '('");
850  if (getUnsigned(Weight))
851  return true;
852  lex();
853  if (expectAndConsume(MIToken::rparen))
854  return true;
855  }
856  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
857  } while (consumeIfPresent(MIToken::comma));
859  return false;
860 }
861 
862 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
863  MachineBasicBlock *&AddFalthroughFrom) {
864  // Skip the definition.
866  lex();
867  if (consumeIfPresent(MIToken::lparen)) {
868  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
869  lex();
870  consumeIfPresent(MIToken::rparen);
871  }
872  consumeIfPresent(MIToken::colon);
873 
874  // Parse the liveins and successors.
875  // N.B: Multiple lists of successors and liveins are allowed and they're
876  // merged into one.
877  // Example:
878  // liveins: %edi
879  // liveins: %esi
880  //
881  // is equivalent to
882  // liveins: %edi, %esi
883  bool ExplicitSuccessors = false;
884  while (true) {
885  if (Token.is(MIToken::kw_successors)) {
886  if (parseBasicBlockSuccessors(MBB))
887  return true;
888  ExplicitSuccessors = true;
889  } else if (Token.is(MIToken::kw_liveins)) {
890  if (parseBasicBlockLiveins(MBB))
891  return true;
892  } else if (consumeIfPresent(MIToken::Newline)) {
893  continue;
894  } else
895  break;
896  if (!Token.isNewlineOrEOF())
897  return error("expected line break at the end of a list");
898  lex();
899  }
900 
901  // Parse the instructions.
902  bool IsInBundle = false;
903  MachineInstr *PrevMI = nullptr;
904  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
905  !Token.is(MIToken::Eof)) {
906  if (consumeIfPresent(MIToken::Newline))
907  continue;
908  if (consumeIfPresent(MIToken::rbrace)) {
909  // The first parsing pass should verify that all closing '}' have an
910  // opening '{'.
911  assert(IsInBundle);
912  IsInBundle = false;
913  continue;
914  }
915  MachineInstr *MI = nullptr;
916  if (parse(MI))
917  return true;
918  MBB.insert(MBB.end(), MI);
919  if (IsInBundle) {
921  MI->setFlag(MachineInstr::BundledPred);
922  }
923  PrevMI = MI;
924  if (Token.is(MIToken::lbrace)) {
925  if (IsInBundle)
926  return error("nested instruction bundles are not allowed");
927  lex();
928  // This instruction is the start of the bundle.
929  MI->setFlag(MachineInstr::BundledSucc);
930  IsInBundle = true;
931  if (!Token.is(MIToken::Newline))
932  // The next instruction can be on the same line.
933  continue;
934  }
935  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
936  lex();
937  }
938 
939  // Construct successor list by searching for basic block machine operands.
940  if (!ExplicitSuccessors) {
942  bool IsFallthrough;
943  guessSuccessors(MBB, Successors, IsFallthrough);
944  for (MachineBasicBlock *Succ : Successors)
945  MBB.addSuccessor(Succ);
946 
947  if (IsFallthrough) {
948  AddFalthroughFrom = &MBB;
949  } else {
951  }
952  }
953 
954  return false;
955 }
956 
957 bool MIParser::parseBasicBlocks() {
958  lex();
959  // Skip until the first machine basic block.
960  while (Token.is(MIToken::Newline))
961  lex();
962  if (Token.isErrorOrEOF())
963  return Token.isError();
964  // The first parsing pass should have verified that this token is a MBB label
965  // in the 'parseBasicBlockDefinitions' method.
967  MachineBasicBlock *AddFalthroughFrom = nullptr;
968  do {
969  MachineBasicBlock *MBB = nullptr;
970  if (parseMBBReference(MBB))
971  return true;
972  if (AddFalthroughFrom) {
973  if (!AddFalthroughFrom->isSuccessor(MBB))
974  AddFalthroughFrom->addSuccessor(MBB);
975  AddFalthroughFrom->normalizeSuccProbs();
976  AddFalthroughFrom = nullptr;
977  }
978  if (parseBasicBlock(*MBB, AddFalthroughFrom))
979  return true;
980  // The method 'parseBasicBlock' should parse the whole block until the next
981  // block or the end of file.
982  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
983  } while (Token.isNot(MIToken::Eof));
984  return false;
985 }
986 
988  // Parse any register operands before '='
991  while (Token.isRegister() || Token.isRegisterFlag()) {
992  auto Loc = Token.location();
993  Optional<unsigned> TiedDefIdx;
994  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
995  return true;
996  Operands.push_back(
997  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
998  if (Token.isNot(MIToken::comma))
999  break;
1000  lex();
1001  }
1002  if (!Operands.empty() && expectAndConsume(MIToken::equal))
1003  return true;
1004 
1005  unsigned OpCode, Flags = 0;
1006  if (Token.isError() || parseInstruction(OpCode, Flags))
1007  return true;
1008 
1009  // Parse the remaining machine operands.
1010  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
1011  Token.isNot(MIToken::kw_post_instr_symbol) &&
1012  Token.isNot(MIToken::kw_heap_alloc_marker) &&
1013  Token.isNot(MIToken::kw_debug_location) &&
1014  Token.isNot(MIToken::kw_debug_instr_number) &&
1015  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
1016  auto Loc = Token.location();
1017  Optional<unsigned> TiedDefIdx;
1018  if (parseMachineOperandAndTargetFlags(OpCode, Operands.size(), MO, TiedDefIdx))
1019  return true;
1020  Operands.push_back(
1021  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1022  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
1023  Token.is(MIToken::lbrace))
1024  break;
1025  if (Token.isNot(MIToken::comma))
1026  return error("expected ',' before the next machine operand");
1027  lex();
1028  }
1029 
1030  MCSymbol *PreInstrSymbol = nullptr;
1031  if (Token.is(MIToken::kw_pre_instr_symbol))
1032  if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1033  return true;
1034  MCSymbol *PostInstrSymbol = nullptr;
1035  if (Token.is(MIToken::kw_post_instr_symbol))
1036  if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1037  return true;
1038  MDNode *HeapAllocMarker = nullptr;
1039  if (Token.is(MIToken::kw_heap_alloc_marker))
1040  if (parseHeapAllocMarker(HeapAllocMarker))
1041  return true;
1042 
1043  unsigned InstrNum = 0;
1044  if (Token.is(MIToken::kw_debug_instr_number)) {
1045  lex();
1046  if (Token.isNot(MIToken::IntegerLiteral))
1047  return error("expected an integer literal after 'debug-instr-number'");
1048  if (getUnsigned(InstrNum))
1049  return true;
1050  lex();
1051  // Lex past trailing comma if present.
1052  if (Token.is(MIToken::comma))
1053  lex();
1054  }
1055 
1056  DebugLoc DebugLocation;
1057  if (Token.is(MIToken::kw_debug_location)) {
1058  lex();
1059  MDNode *Node = nullptr;
1060  if (Token.is(MIToken::exclaim)) {
1061  if (parseMDNode(Node))
1062  return true;
1063  } else if (Token.is(MIToken::md_dilocation)) {
1064  if (parseDILocation(Node))
1065  return true;
1066  } else
1067  return error("expected a metadata node after 'debug-location'");
1068  if (!isa<DILocation>(Node))
1069  return error("referenced metadata is not a DILocation");
1070  DebugLocation = DebugLoc(Node);
1071  }
1072 
1073  // Parse the machine memory operands.
1075  if (Token.is(MIToken::coloncolon)) {
1076  lex();
1077  while (!Token.isNewlineOrEOF()) {
1078  MachineMemOperand *MemOp = nullptr;
1079  if (parseMachineMemoryOperand(MemOp))
1080  return true;
1081  MemOperands.push_back(MemOp);
1082  if (Token.isNewlineOrEOF())
1083  break;
1084  if (Token.isNot(MIToken::comma))
1085  return error("expected ',' before the next machine memory operand");
1086  lex();
1087  }
1088  }
1089 
1090  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1091  if (!MCID.isVariadic()) {
1092  // FIXME: Move the implicit operand verification to the machine verifier.
1093  if (verifyImplicitOperands(Operands, MCID))
1094  return true;
1095  }
1096 
1097  // TODO: Check for extraneous machine operands.
1098  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
1099  MI->setFlags(Flags);
1100  for (const auto &Operand : Operands)
1101  MI->addOperand(MF, Operand.Operand);
1102  if (assignRegisterTies(*MI, Operands))
1103  return true;
1104  if (PreInstrSymbol)
1105  MI->setPreInstrSymbol(MF, PreInstrSymbol);
1106  if (PostInstrSymbol)
1107  MI->setPostInstrSymbol(MF, PostInstrSymbol);
1108  if (HeapAllocMarker)
1109  MI->setHeapAllocMarker(MF, HeapAllocMarker);
1110  if (!MemOperands.empty())
1111  MI->setMemRefs(MF, MemOperands);
1112  if (InstrNum)
1113  MI->setDebugInstrNum(InstrNum);
1114  return false;
1115 }
1116 
1117 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
1118  lex();
1119  if (Token.isNot(MIToken::MachineBasicBlock))
1120  return error("expected a machine basic block reference");
1121  if (parseMBBReference(MBB))
1122  return true;
1123  lex();
1124  if (Token.isNot(MIToken::Eof))
1125  return error(
1126  "expected end of string after the machine basic block reference");
1127  return false;
1128 }
1129 
1130 bool MIParser::parseStandaloneNamedRegister(Register &Reg) {
1131  lex();
1132  if (Token.isNot(MIToken::NamedRegister))
1133  return error("expected a named register");
1134  if (parseNamedRegister(Reg))
1135  return true;
1136  lex();
1137  if (Token.isNot(MIToken::Eof))
1138  return error("expected end of string after the register reference");
1139  return false;
1140 }
1141 
1142 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
1143  lex();
1144  if (Token.isNot(MIToken::VirtualRegister))
1145  return error("expected a virtual register");
1146  if (parseVirtualRegister(Info))
1147  return true;
1148  lex();
1149  if (Token.isNot(MIToken::Eof))
1150  return error("expected end of string after the register reference");
1151  return false;
1152 }
1153 
1154 bool MIParser::parseStandaloneRegister(Register &Reg) {
1155  lex();
1156  if (Token.isNot(MIToken::NamedRegister) &&
1157  Token.isNot(MIToken::VirtualRegister))
1158  return error("expected either a named or virtual register");
1159 
1160  VRegInfo *Info;
1161  if (parseRegister(Reg, Info))
1162  return true;
1163 
1164  lex();
1165  if (Token.isNot(MIToken::Eof))
1166  return error("expected end of string after the register reference");
1167  return false;
1168 }
1169 
1170 bool MIParser::parseStandaloneStackObject(int &FI) {
1171  lex();
1172  if (Token.isNot(MIToken::StackObject))
1173  return error("expected a stack object");
1174  if (parseStackFrameIndex(FI))
1175  return true;
1176  if (Token.isNot(MIToken::Eof))
1177  return error("expected end of string after the stack object reference");
1178  return false;
1179 }
1180 
1181 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
1182  lex();
1183  if (Token.is(MIToken::exclaim)) {
1184  if (parseMDNode(Node))
1185  return true;
1186  } else if (Token.is(MIToken::md_diexpr)) {
1187  if (parseDIExpression(Node))
1188  return true;
1189  } else if (Token.is(MIToken::md_dilocation)) {
1190  if (parseDILocation(Node))
1191  return true;
1192  } else
1193  return error("expected a metadata node");
1194  if (Token.isNot(MIToken::Eof))
1195  return error("expected end of string after the metadata node");
1196  return false;
1197 }
1198 
1200  lex();
1201  if (Token.isNot(MIToken::exclaim))
1202  return error("expected a metadata node");
1203 
1204  lex();
1205  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1206  return error("expected metadata id after '!'");
1207  unsigned ID = 0;
1208  if (getUnsigned(ID))
1209  return true;
1210  lex();
1211  if (expectAndConsume(MIToken::equal))
1212  return true;
1213  bool IsDistinct = Token.is(MIToken::kw_distinct);
1214  if (IsDistinct)
1215  lex();
1216  if (Token.isNot(MIToken::exclaim))
1217  return error("expected a metadata node");
1218  lex();
1219 
1220  MDNode *MD;
1221  if (parseMDTuple(MD, IsDistinct))
1222  return true;
1223 
1224  auto FI = PFS.MachineForwardRefMDNodes.find(ID);
1225  if (FI != PFS.MachineForwardRefMDNodes.end()) {
1226  FI->second.first->replaceAllUsesWith(MD);
1227  PFS.MachineForwardRefMDNodes.erase(FI);
1228 
1229  assert(PFS.MachineMetadataNodes[ID] == MD && "Tracking VH didn't work");
1230  } else {
1231  if (PFS.MachineMetadataNodes.count(ID))
1232  return error("Metadata id is already used");
1233  PFS.MachineMetadataNodes[ID].reset(MD);
1234  }
1235 
1236  return false;
1237 }
1238 
1239 bool MIParser::parseMDTuple(MDNode *&MD, bool IsDistinct) {
1241  if (parseMDNodeVector(Elts))
1242  return true;
1243  MD = (IsDistinct ? MDTuple::getDistinct
1244  : MDTuple::get)(MF.getFunction().getContext(), Elts);
1245  return false;
1246 }
1247 
1248 bool MIParser::parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts) {
1249  if (Token.isNot(MIToken::lbrace))
1250  return error("expected '{' here");
1251  lex();
1252 
1253  if (Token.is(MIToken::rbrace)) {
1254  lex();
1255  return false;
1256  }
1257 
1258  do {
1259  Metadata *MD;
1260  if (parseMetadata(MD))
1261  return true;
1262 
1263  Elts.push_back(MD);
1264 
1265  if (Token.isNot(MIToken::comma))
1266  break;
1267  lex();
1268  } while (true);
1269 
1270  if (Token.isNot(MIToken::rbrace))
1271  return error("expected end of metadata node");
1272  lex();
1273 
1274  return false;
1275 }
1276 
1277 // ::= !42
1278 // ::= !"string"
1279 bool MIParser::parseMetadata(Metadata *&MD) {
1280  if (Token.isNot(MIToken::exclaim))
1281  return error("expected '!' here");
1282  lex();
1283 
1284  if (Token.is(MIToken::StringConstant)) {
1285  std::string Str;
1286  if (parseStringConstant(Str))
1287  return true;
1288  MD = MDString::get(MF.getFunction().getContext(), Str);
1289  return false;
1290  }
1291 
1292  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1293  return error("expected metadata id after '!'");
1294 
1295  SMLoc Loc = mapSMLoc(Token.location());
1296 
1297  unsigned ID = 0;
1298  if (getUnsigned(ID))
1299  return true;
1300  lex();
1301 
1302  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1303  if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
1304  MD = NodeInfo->second.get();
1305  return false;
1306  }
1307  // Check machine metadata.
1308  NodeInfo = PFS.MachineMetadataNodes.find(ID);
1309  if (NodeInfo != PFS.MachineMetadataNodes.end()) {
1310  MD = NodeInfo->second.get();
1311  return false;
1312  }
1313  // Forward reference.
1314  auto &FwdRef = PFS.MachineForwardRefMDNodes[ID];
1315  FwdRef = std::make_pair(
1316  MDTuple::getTemporary(MF.getFunction().getContext(), None), Loc);
1317  PFS.MachineMetadataNodes[ID].reset(FwdRef.first.get());
1318  MD = FwdRef.first.get();
1319 
1320  return false;
1321 }
1322 
1323 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
1324  assert(MO.isImplicit());
1325  return MO.isDef() ? "implicit-def" : "implicit";
1326 }
1327 
1328 static std::string getRegisterName(const TargetRegisterInfo *TRI,
1329  Register Reg) {
1330  assert(Register::isPhysicalRegister(Reg) && "expected phys reg");
1331  return StringRef(TRI->getName(Reg)).lower();
1332 }
1333 
1334 /// Return true if the parsed machine operands contain a given machine operand.
1335 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
1337  for (const auto &I : Operands) {
1338  if (ImplicitOperand.isIdenticalTo(I.Operand))
1339  return true;
1340  }
1341  return false;
1342 }
1343 
1344 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
1345  const MCInstrDesc &MCID) {
1346  if (MCID.isCall())
1347  // We can't verify call instructions as they can contain arbitrary implicit
1348  // register and register mask operands.
1349  return false;
1350 
1351  // Gather all the expected implicit operands.
1352  SmallVector<MachineOperand, 4> ImplicitOperands;
1353  if (MCID.ImplicitDefs)
1354  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
1355  ImplicitOperands.push_back(
1356  MachineOperand::CreateReg(*ImpDefs, true, true));
1357  if (MCID.ImplicitUses)
1358  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
1359  ImplicitOperands.push_back(
1360  MachineOperand::CreateReg(*ImpUses, false, true));
1361 
1362  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1363  assert(TRI && "Expected target register info");
1364  for (const auto &I : ImplicitOperands) {
1366  continue;
1367  return error(Operands.empty() ? Token.location() : Operands.back().End,
1368  Twine("missing implicit register operand '") +
1369  printImplicitRegisterFlag(I) + " $" +
1370  getRegisterName(TRI, I.getReg()) + "'");
1371  }
1372  return false;
1373 }
1374 
1375 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
1376  // Allow frame and fast math flags for OPCODE
1377  while (Token.is(MIToken::kw_frame_setup) ||
1378  Token.is(MIToken::kw_frame_destroy) ||
1379  Token.is(MIToken::kw_nnan) ||
1380  Token.is(MIToken::kw_ninf) ||
1381  Token.is(MIToken::kw_nsz) ||
1382  Token.is(MIToken::kw_arcp) ||
1383  Token.is(MIToken::kw_contract) ||
1384  Token.is(MIToken::kw_afn) ||
1385  Token.is(MIToken::kw_reassoc) ||
1386  Token.is(MIToken::kw_nuw) ||
1387  Token.is(MIToken::kw_nsw) ||
1388  Token.is(MIToken::kw_exact) ||
1389  Token.is(MIToken::kw_nofpexcept)) {
1390  // Mine frame and fast math flags
1391  if (Token.is(MIToken::kw_frame_setup))
1392  Flags |= MachineInstr::FrameSetup;
1393  if (Token.is(MIToken::kw_frame_destroy))
1394  Flags |= MachineInstr::FrameDestroy;
1395  if (Token.is(MIToken::kw_nnan))
1396  Flags |= MachineInstr::FmNoNans;
1397  if (Token.is(MIToken::kw_ninf))
1398  Flags |= MachineInstr::FmNoInfs;
1399  if (Token.is(MIToken::kw_nsz))
1400  Flags |= MachineInstr::FmNsz;
1401  if (Token.is(MIToken::kw_arcp))
1402  Flags |= MachineInstr::FmArcp;
1403  if (Token.is(MIToken::kw_contract))
1404  Flags |= MachineInstr::FmContract;
1405  if (Token.is(MIToken::kw_afn))
1406  Flags |= MachineInstr::FmAfn;
1407  if (Token.is(MIToken::kw_reassoc))
1408  Flags |= MachineInstr::FmReassoc;
1409  if (Token.is(MIToken::kw_nuw))
1410  Flags |= MachineInstr::NoUWrap;
1411  if (Token.is(MIToken::kw_nsw))
1412  Flags |= MachineInstr::NoSWrap;
1413  if (Token.is(MIToken::kw_exact))
1414  Flags |= MachineInstr::IsExact;
1415  if (Token.is(MIToken::kw_nofpexcept))
1416  Flags |= MachineInstr::NoFPExcept;
1417 
1418  lex();
1419  }
1420  if (Token.isNot(MIToken::Identifier))
1421  return error("expected a machine instruction");
1422  StringRef InstrName = Token.stringValue();
1423  if (PFS.Target.parseInstrName(InstrName, OpCode))
1424  return error(Twine("unknown machine instruction name '") + InstrName + "'");
1425  lex();
1426  return false;
1427 }
1428 
1429 bool MIParser::parseNamedRegister(Register &Reg) {
1430  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
1431  StringRef Name = Token.stringValue();
1432  if (PFS.Target.getRegisterByName(Name, Reg))
1433  return error(Twine("unknown register name '") + Name + "'");
1434  return false;
1435 }
1436 
1437 bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
1438  assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
1439  StringRef Name = Token.stringValue();
1440  // TODO: Check that the VReg name is not the same as a physical register name.
1441  // If it is, then print a warning (when warnings are implemented).
1442  Info = &PFS.getVRegInfoNamed(Name);
1443  return false;
1444 }
1445 
1446 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
1447  if (Token.is(MIToken::NamedVirtualRegister))
1448  return parseNamedVirtualRegister(Info);
1449  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
1450  unsigned ID;
1451  if (getUnsigned(ID))
1452  return true;
1453  Info = &PFS.getVRegInfo(ID);
1454  return false;
1455 }
1456 
1457 bool MIParser::parseRegister(Register &Reg, VRegInfo *&Info) {
1458  switch (Token.kind()) {
1459  case MIToken::underscore:
1460  Reg = 0;
1461  return false;
1463  return parseNamedRegister(Reg);
1466  if (parseVirtualRegister(Info))
1467  return true;
1468  Reg = Info->VReg;
1469  return false;
1470  // TODO: Parse other register kinds.
1471  default:
1472  llvm_unreachable("The current token should be a register");
1473  }
1474 }
1475 
1476 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
1477  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
1478  return error("expected '_', register class, or register bank name");
1479  StringRef::iterator Loc = Token.location();
1480  StringRef Name = Token.stringValue();
1481 
1482  // Was it a register class?
1483  const TargetRegisterClass *RC = PFS.Target.getRegClass(Name);
1484  if (RC) {
1485  lex();
1486 
1487  switch (RegInfo.Kind) {
1488  case VRegInfo::UNKNOWN:
1489  case VRegInfo::NORMAL:
1490  RegInfo.Kind = VRegInfo::NORMAL;
1491  if (RegInfo.Explicit && RegInfo.D.RC != RC) {
1492  const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
1493  return error(Loc, Twine("conflicting register classes, previously: ") +
1494  Twine(TRI.getRegClassName(RegInfo.D.RC)));
1495  }
1496  RegInfo.D.RC = RC;
1497  RegInfo.Explicit = true;
1498  return false;
1499 
1500  case VRegInfo::GENERIC:
1501  case VRegInfo::REGBANK:
1502  return error(Loc, "register class specification on generic register");
1503  }
1504  llvm_unreachable("Unexpected register kind");
1505  }
1506 
1507  // Should be a register bank or a generic register.
1508  const RegisterBank *RegBank = nullptr;
1509  if (Name != "_") {
1510  RegBank = PFS.Target.getRegBank(Name);
1511  if (!RegBank)
1512  return error(Loc, "expected '_', register class, or register bank name");
1513  }
1514 
1515  lex();
1516 
1517  switch (RegInfo.Kind) {
1518  case VRegInfo::UNKNOWN:
1519  case VRegInfo::GENERIC:
1520  case VRegInfo::REGBANK:
1521  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1522  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1523  return error(Loc, "conflicting generic register banks");
1524  RegInfo.D.RegBank = RegBank;
1525  RegInfo.Explicit = true;
1526  return false;
1527 
1528  case VRegInfo::NORMAL:
1529  return error(Loc, "register bank specification on normal register");
1530  }
1531  llvm_unreachable("Unexpected register kind");
1532 }
1533 
1534 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1535  const unsigned OldFlags = Flags;
1536  switch (Token.kind()) {
1537  case MIToken::kw_implicit:
1538  Flags |= RegState::Implicit;
1539  break;
1541  Flags |= RegState::ImplicitDefine;
1542  break;
1543  case MIToken::kw_def:
1544  Flags |= RegState::Define;
1545  break;
1546  case MIToken::kw_dead:
1547  Flags |= RegState::Dead;
1548  break;
1549  case MIToken::kw_killed:
1550  Flags |= RegState::Kill;
1551  break;
1552  case MIToken::kw_undef:
1553  Flags |= RegState::Undef;
1554  break;
1555  case MIToken::kw_internal:
1556  Flags |= RegState::InternalRead;
1557  break;
1559  Flags |= RegState::EarlyClobber;
1560  break;
1561  case MIToken::kw_debug_use:
1562  Flags |= RegState::Debug;
1563  break;
1564  case MIToken::kw_renamable:
1565  Flags |= RegState::Renamable;
1566  break;
1567  default:
1568  llvm_unreachable("The current token should be a register flag");
1569  }
1570  if (OldFlags == Flags)
1571  // We know that the same flag is specified more than once when the flags
1572  // weren't modified.
1573  return error("duplicate '" + Token.stringValue() + "' register flag");
1574  lex();
1575  return false;
1576 }
1577 
1578 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1579  assert(Token.is(MIToken::dot));
1580  lex();
1581  if (Token.isNot(MIToken::Identifier))
1582  return error("expected a subregister index after '.'");
1583  auto Name = Token.stringValue();
1584  SubReg = PFS.Target.getSubRegIndex(Name);
1585  if (!SubReg)
1586  return error(Twine("use of unknown subregister index '") + Name + "'");
1587  lex();
1588  return false;
1589 }
1590 
1591 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1592  if (!consumeIfPresent(MIToken::kw_tied_def))
1593  return true;
1594  if (Token.isNot(MIToken::IntegerLiteral))
1595  return error("expected an integer literal after 'tied-def'");
1596  if (getUnsigned(TiedDefIdx))
1597  return true;
1598  lex();
1599  if (expectAndConsume(MIToken::rparen))
1600  return true;
1601  return false;
1602 }
1603 
1604 bool MIParser::assignRegisterTies(MachineInstr &MI,
1606  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1607  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1608  if (!Operands[I].TiedDefIdx)
1609  continue;
1610  // The parser ensures that this operand is a register use, so we just have
1611  // to check the tied-def operand.
1612  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1613  if (DefIdx >= E)
1614  return error(Operands[I].Begin,
1615  Twine("use of invalid tied-def operand index '" +
1616  Twine(DefIdx) + "'; instruction has only ") +
1617  Twine(E) + " operands");
1618  const auto &DefOperand = Operands[DefIdx].Operand;
1619  if (!DefOperand.isReg() || !DefOperand.isDef())
1620  // FIXME: add note with the def operand.
1621  return error(Operands[I].Begin,
1622  Twine("use of invalid tied-def operand index '") +
1623  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1624  " isn't a defined register");
1625  // Check that the tied-def operand wasn't tied elsewhere.
1626  for (const auto &TiedPair : TiedRegisterPairs) {
1627  if (TiedPair.first == DefIdx)
1628  return error(Operands[I].Begin,
1629  Twine("the tied-def operand #") + Twine(DefIdx) +
1630  " is already tied with another register operand");
1631  }
1632  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1633  }
1634  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1635  // indices must be less than tied max.
1636  for (const auto &TiedPair : TiedRegisterPairs)
1637  MI.tieOperands(TiedPair.first, TiedPair.second);
1638  return false;
1639 }
1640 
1641 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1642  Optional<unsigned> &TiedDefIdx,
1643  bool IsDef) {
1644  unsigned Flags = IsDef ? RegState::Define : 0;
1645  while (Token.isRegisterFlag()) {
1646  if (parseRegisterFlag(Flags))
1647  return true;
1648  }
1649  if (!Token.isRegister())
1650  return error("expected a register after register flags");
1651  Register Reg;
1652  VRegInfo *RegInfo;
1653  if (parseRegister(Reg, RegInfo))
1654  return true;
1655  lex();
1656  unsigned SubReg = 0;
1657  if (Token.is(MIToken::dot)) {
1658  if (parseSubRegisterIndex(SubReg))
1659  return true;
1661  return error("subregister index expects a virtual register");
1662  }
1663  if (Token.is(MIToken::colon)) {
1665  return error("register class specification expects a virtual register");
1666  lex();
1667  if (parseRegisterClassOrBank(*RegInfo))
1668  return true;
1669  }
1670  MachineRegisterInfo &MRI = MF.getRegInfo();
1671  if ((Flags & RegState::Define) == 0) {
1672  if (consumeIfPresent(MIToken::lparen)) {
1673  unsigned Idx;
1674  if (!parseRegisterTiedDefIndex(Idx))
1675  TiedDefIdx = Idx;
1676  else {
1677  // Try a redundant low-level type.
1678  LLT Ty;
1679  if (parseLowLevelType(Token.location(), Ty))
1680  return error("expected tied-def or low-level type after '('");
1681 
1682  if (expectAndConsume(MIToken::rparen))
1683  return true;
1684 
1685  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1686  return error("inconsistent type for generic virtual register");
1687 
1688  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1689  MRI.setType(Reg, Ty);
1690  }
1691  }
1692  } else if (consumeIfPresent(MIToken::lparen)) {
1693  // Virtual registers may have a tpe with GlobalISel.
1695  return error("unexpected type on physical register");
1696 
1697  LLT Ty;
1698  if (parseLowLevelType(Token.location(), Ty))
1699  return true;
1700 
1701  if (expectAndConsume(MIToken::rparen))
1702  return true;
1703 
1704  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1705  return error("inconsistent type for generic virtual register");
1706 
1707  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1708  MRI.setType(Reg, Ty);
1709  } else if (Register::isVirtualRegister(Reg)) {
1710  // Generic virtual registers must have a type.
1711  // If we end up here this means the type hasn't been specified and
1712  // this is bad!
1713  if (RegInfo->Kind == VRegInfo::GENERIC ||
1714  RegInfo->Kind == VRegInfo::REGBANK)
1715  return error("generic virtual registers must have a type");
1716  }
1718  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1719  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1720  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1721  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1722 
1723  return false;
1724 }
1725 
1726 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1727  assert(Token.is(MIToken::IntegerLiteral));
1728  const APSInt &Int = Token.integerValue();
1729  if (Int.getMinSignedBits() > 64)
1730  return error("integer literal is too large to be an immediate operand");
1731  Dest = MachineOperand::CreateImm(Int.getExtValue());
1732  lex();
1733  return false;
1734 }
1735 
1736 bool MIParser::parseTargetImmMnemonic(const unsigned OpCode,
1737  const unsigned OpIdx,
1738  MachineOperand &Dest,
1739  const MIRFormatter &MF) {
1740  assert(Token.is(MIToken::dot));
1741  auto Loc = Token.location(); // record start position
1742  size_t Len = 1; // for "."
1743  lex();
1744 
1745  // Handle the case that mnemonic starts with number.
1746  if (Token.is(MIToken::IntegerLiteral)) {
1747  Len += Token.range().size();
1748  lex();
1749  }
1750 
1751  StringRef Src;
1752  if (Token.is(MIToken::comma))
1753  Src = StringRef(Loc, Len);
1754  else {
1755  assert(Token.is(MIToken::Identifier));
1756  Src = StringRef(Loc, Len + Token.stringValue().size());
1757  }
1758  int64_t Val;
1759  if (MF.parseImmMnemonic(OpCode, OpIdx, Src, Val,
1760  [this](StringRef::iterator Loc, const Twine &Msg)
1761  -> bool { return error(Loc, Msg); }))
1762  return true;
1763 
1764  Dest = MachineOperand::CreateImm(Val);
1765  if (!Token.is(MIToken::comma))
1766  lex();
1767  return false;
1768 }
1769 
1770 static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1771  PerFunctionMIParsingState &PFS, const Constant *&C,
1772  ErrorCallbackType ErrCB) {
1773  auto Source = StringValue.str(); // The source has to be null terminated.
1774  SMDiagnostic Err;
1776  &PFS.IRSlots);
1777  if (!C)
1778  return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
1779  return false;
1780 }
1781 
1783  const Constant *&C) {
1785  Loc, StringValue, PFS, C,
1786  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1787  return error(Loc, Msg);
1788  });
1789 }
1790 
1792  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1793  return true;
1794  lex();
1795  return false;
1796 }
1797 
1798 // See LLT implemntation for bit size limits.
1800  return Size != 0 && isUInt<16>(Size);
1801 }
1802 
1803 static bool verifyVectorElementCount(uint64_t NumElts) {
1804  return NumElts != 0 && isUInt<16>(NumElts);
1805 }
1806 
1807 static bool verifyAddrSpace(uint64_t AddrSpace) {
1808  return isUInt<24>(AddrSpace);
1809 }
1810 
1811 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1812  if (Token.range().front() == 's' || Token.range().front() == 'p') {
1813  StringRef SizeStr = Token.range().drop_front();
1814  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1815  return error("expected integers after 's'/'p' type character");
1816  }
1817 
1818  if (Token.range().front() == 's') {
1819  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1820  if (!verifyScalarSize(ScalarSize))
1821  return error("invalid size for scalar type");
1822 
1823  Ty = LLT::scalar(ScalarSize);
1824  lex();
1825  return false;
1826  } else if (Token.range().front() == 'p') {
1827  const DataLayout &DL = MF.getDataLayout();
1828  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1829  if (!verifyAddrSpace(AS))
1830  return error("invalid address space number");
1831 
1832  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1833  lex();
1834  return false;
1835  }
1836 
1837  // Now we're looking for a vector.
1838  if (Token.isNot(MIToken::less))
1839  return error(Loc,
1840  "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1841  lex();
1842 
1843  if (Token.isNot(MIToken::IntegerLiteral))
1844  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1845  uint64_t NumElements = Token.integerValue().getZExtValue();
1846  if (!verifyVectorElementCount(NumElements))
1847  return error("invalid number of vector elements");
1848 
1849  lex();
1850 
1851  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1852  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1853  lex();
1854 
1855  if (Token.range().front() != 's' && Token.range().front() != 'p')
1856  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1857  StringRef SizeStr = Token.range().drop_front();
1858  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1859  return error("expected integers after 's'/'p' type character");
1860 
1861  if (Token.range().front() == 's') {
1862  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1863  if (!verifyScalarSize(ScalarSize))
1864  return error("invalid size for scalar type");
1865  Ty = LLT::scalar(ScalarSize);
1866  } else if (Token.range().front() == 'p') {
1867  const DataLayout &DL = MF.getDataLayout();
1868  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1869  if (!verifyAddrSpace(AS))
1870  return error("invalid address space number");
1871 
1872  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1873  } else
1874  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1875  lex();
1876 
1877  if (Token.isNot(MIToken::greater))
1878  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1879  lex();
1880 
1881  Ty = LLT::fixed_vector(NumElements, Ty);
1882  return false;
1883 }
1884 
1885 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1886  assert(Token.is(MIToken::Identifier));
1887  StringRef TypeStr = Token.range();
1888  if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
1889  TypeStr.front() != 'p')
1890  return error(
1891  "a typed immediate operand should start with one of 'i', 's', or 'p'");
1892  StringRef SizeStr = Token.range().drop_front();
1893  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1894  return error("expected integers after 'i'/'s'/'p' type character");
1895 
1896  auto Loc = Token.location();
1897  lex();
1898  if (Token.isNot(MIToken::IntegerLiteral)) {
1899  if (Token.isNot(MIToken::Identifier) ||
1900  !(Token.range() == "true" || Token.range() == "false"))
1901  return error("expected an integer literal");
1902  }
1903  const Constant *C = nullptr;
1904  if (parseIRConstant(Loc, C))
1905  return true;
1906  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1907  return false;
1908 }
1909 
1910 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1911  auto Loc = Token.location();
1912  lex();
1913  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1914  Token.isNot(MIToken::HexLiteral))
1915  return error("expected a floating point literal");
1916  const Constant *C = nullptr;
1917  if (parseIRConstant(Loc, C))
1918  return true;
1919  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1920  return false;
1921 }
1922 
1923 static bool getHexUint(const MIToken &Token, APInt &Result) {
1924  assert(Token.is(MIToken::HexLiteral));
1925  StringRef S = Token.range();
1926  assert(S[0] == '0' && tolower(S[1]) == 'x');
1927  // This could be a floating point literal with a special prefix.
1928  if (!isxdigit(S[2]))
1929  return true;
1930  StringRef V = S.substr(2);
1931  APInt A(V.size()*4, V, 16);
1932 
1933  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
1934  // sure it isn't the case before constructing result.
1935  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
1936  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
1937  return false;
1938 }
1939 
1940 static bool getUnsigned(const MIToken &Token, unsigned &Result,
1941  ErrorCallbackType ErrCB) {
1942  if (Token.hasIntegerValue()) {
1944  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1945  if (Val64 == Limit)
1946  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
1947  Result = Val64;
1948  return false;
1949  }
1950  if (Token.is(MIToken::HexLiteral)) {
1951  APInt A;
1952  if (getHexUint(Token, A))
1953  return true;
1954  if (A.getBitWidth() > 32)
1955  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
1956  Result = A.getZExtValue();
1957  return false;
1958  }
1959  return true;
1960 }
1961 
1962 bool MIParser::getUnsigned(unsigned &Result) {
1964  Token, Result, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1965  return error(Loc, Msg);
1966  });
1967 }
1968 
1970  assert(Token.is(MIToken::MachineBasicBlock) ||
1972  unsigned Number;
1973  if (getUnsigned(Number))
1974  return true;
1975  auto MBBInfo = PFS.MBBSlots.find(Number);
1976  if (MBBInfo == PFS.MBBSlots.end())
1977  return error(Twine("use of undefined machine basic block #") +
1978  Twine(Number));
1979  MBB = MBBInfo->second;
1980  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
1981  // we drop the <irname> from the bb.<id>.<irname> format.
1982  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
1983  return error(Twine("the name of machine basic block #") + Twine(Number) +
1984  " isn't '" + Token.stringValue() + "'");
1985  return false;
1986 }
1987 
1988 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
1990  if (parseMBBReference(MBB))
1991  return true;
1993  lex();
1994  return false;
1995 }
1996 
1997 bool MIParser::parseStackFrameIndex(int &FI) {
1998  assert(Token.is(MIToken::StackObject));
1999  unsigned ID;
2000  if (getUnsigned(ID))
2001  return true;
2002  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
2003  if (ObjectInfo == PFS.StackObjectSlots.end())
2004  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
2005  "'");
2006  StringRef Name;
2007  if (const auto *Alloca =
2008  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2009  Name = Alloca->getName();
2010  if (!Token.stringValue().empty() && Token.stringValue() != Name)
2011  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
2012  "' isn't '" + Token.stringValue() + "'");
2013  lex();
2014  FI = ObjectInfo->second;
2015  return false;
2016 }
2017 
2018 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
2019  int FI;
2020  if (parseStackFrameIndex(FI))
2021  return true;
2022  Dest = MachineOperand::CreateFI(FI);
2023  return false;
2024 }
2025 
2026 bool MIParser::parseFixedStackFrameIndex(int &FI) {
2027  assert(Token.is(MIToken::FixedStackObject));
2028  unsigned ID;
2029  if (getUnsigned(ID))
2030  return true;
2031  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
2032  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
2033  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
2034  Twine(ID) + "'");
2035  lex();
2036  FI = ObjectInfo->second;
2037  return false;
2038 }
2039 
2040 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
2041  int FI;
2042  if (parseFixedStackFrameIndex(FI))
2043  return true;
2044  Dest = MachineOperand::CreateFI(FI);
2045  return false;
2046 }
2047 
2048 static bool parseGlobalValue(const MIToken &Token,
2050  ErrorCallbackType ErrCB) {
2051  switch (Token.kind()) {
2053  const Module *M = PFS.MF.getFunction().getParent();
2054  GV = M->getNamedValue(Token.stringValue());
2055  if (!GV)
2056  return ErrCB(Token.location(), Twine("use of undefined global value '") +
2057  Token.range() + "'");
2058  break;
2059  }
2060  case MIToken::GlobalValue: {
2061  unsigned GVIdx;
2062  if (getUnsigned(Token, GVIdx, ErrCB))
2063  return true;
2064  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
2065  return ErrCB(Token.location(), Twine("use of undefined global value '@") +
2066  Twine(GVIdx) + "'");
2067  GV = PFS.IRSlots.GlobalValues[GVIdx];
2068  break;
2069  }
2070  default:
2071  llvm_unreachable("The current token should be a global value");
2072  }
2073  return false;
2074 }
2075 
2078  Token, PFS, GV,
2079  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2080  return error(Loc, Msg);
2081  });
2082 }
2083 
2084 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
2085  GlobalValue *GV = nullptr;
2086  if (parseGlobalValue(GV))
2087  return true;
2088  lex();
2089  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
2090  if (parseOperandsOffset(Dest))
2091  return true;
2092  return false;
2093 }
2094 
2095 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
2096  assert(Token.is(MIToken::ConstantPoolItem));
2097  unsigned ID;
2098  if (getUnsigned(ID))
2099  return true;
2100  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
2101  if (ConstantInfo == PFS.ConstantPoolSlots.end())
2102  return error("use of undefined constant '%const." + Twine(ID) + "'");
2103  lex();
2104  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
2105  if (parseOperandsOffset(Dest))
2106  return true;
2107  return false;
2108 }
2109 
2110 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
2111  assert(Token.is(MIToken::JumpTableIndex));
2112  unsigned ID;
2113  if (getUnsigned(ID))
2114  return true;
2115  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
2116  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
2117  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
2118  lex();
2119  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
2120  return false;
2121 }
2122 
2123 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
2124  assert(Token.is(MIToken::ExternalSymbol));
2125  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
2126  lex();
2128  if (parseOperandsOffset(Dest))
2129  return true;
2130  return false;
2131 }
2132 
2133 bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
2134  assert(Token.is(MIToken::MCSymbol));
2135  MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
2136  lex();
2138  if (parseOperandsOffset(Dest))
2139  return true;
2140  return false;
2141 }
2142 
2143 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
2144  assert(Token.is(MIToken::SubRegisterIndex));
2145  StringRef Name = Token.stringValue();
2146  unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
2147  if (SubRegIndex == 0)
2148  return error(Twine("unknown subregister index '") + Name + "'");
2149  lex();
2150  Dest = MachineOperand::CreateImm(SubRegIndex);
2151  return false;
2152 }
2153 
2154 bool MIParser::parseMDNode(MDNode *&Node) {
2155  assert(Token.is(MIToken::exclaim));
2156 
2157  auto Loc = Token.location();
2158  lex();
2159  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2160  return error("expected metadata id after '!'");
2161  unsigned ID;
2162  if (getUnsigned(ID))
2163  return true;
2164  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
2165  if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
2166  NodeInfo = PFS.MachineMetadataNodes.find(ID);
2167  if (NodeInfo == PFS.MachineMetadataNodes.end())
2168  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
2169  }
2170  lex();
2171  Node = NodeInfo->second.get();
2172  return false;
2173 }
2174 
2175 bool MIParser::parseDIExpression(MDNode *&Expr) {
2176  assert(Token.is(MIToken::md_diexpr));
2177  lex();
2178 
2179  // FIXME: Share this parsing with the IL parser.
2180  SmallVector<uint64_t, 8> Elements;
2181 
2182  if (expectAndConsume(MIToken::lparen))
2183  return true;
2184 
2185  if (Token.isNot(MIToken::rparen)) {
2186  do {
2187  if (Token.is(MIToken::Identifier)) {
2188  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
2189  lex();
2190  Elements.push_back(Op);
2191  continue;
2192  }
2193  if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) {
2194  lex();
2195  Elements.push_back(Enc);
2196  continue;
2197  }
2198  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
2199  }
2200 
2201  if (Token.isNot(MIToken::IntegerLiteral) ||
2202  Token.integerValue().isSigned())
2203  return error("expected unsigned integer");
2204 
2205  auto &U = Token.integerValue();
2206  if (U.ugt(UINT64_MAX))
2207  return error("element too large, limit is " + Twine(UINT64_MAX));
2208  Elements.push_back(U.getZExtValue());
2209  lex();
2210 
2211  } while (consumeIfPresent(MIToken::comma));
2212  }
2213 
2214  if (expectAndConsume(MIToken::rparen))
2215  return true;
2216 
2217  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
2218  return false;
2219 }
2220 
2221 bool MIParser::parseDILocation(MDNode *&Loc) {
2222  assert(Token.is(MIToken::md_dilocation));
2223  lex();
2224 
2225  bool HaveLine = false;
2226  unsigned Line = 0;
2227  unsigned Column = 0;
2228  MDNode *Scope = nullptr;
2229  MDNode *InlinedAt = nullptr;
2230  bool ImplicitCode = false;
2231 
2232  if (expectAndConsume(MIToken::lparen))
2233  return true;
2234 
2235  if (Token.isNot(MIToken::rparen)) {
2236  do {
2237  if (Token.is(MIToken::Identifier)) {
2238  if (Token.stringValue() == "line") {
2239  lex();
2240  if (expectAndConsume(MIToken::colon))
2241  return true;
2242  if (Token.isNot(MIToken::IntegerLiteral) ||
2243  Token.integerValue().isSigned())
2244  return error("expected unsigned integer");
2245  Line = Token.integerValue().getZExtValue();
2246  HaveLine = true;
2247  lex();
2248  continue;
2249  }
2250  if (Token.stringValue() == "column") {
2251  lex();
2252  if (expectAndConsume(MIToken::colon))
2253  return true;
2254  if (Token.isNot(MIToken::IntegerLiteral) ||
2255  Token.integerValue().isSigned())
2256  return error("expected unsigned integer");
2257  Column = Token.integerValue().getZExtValue();
2258  lex();
2259  continue;
2260  }
2261  if (Token.stringValue() == "scope") {
2262  lex();
2263  if (expectAndConsume(MIToken::colon))
2264  return true;
2265  if (parseMDNode(Scope))
2266  return error("expected metadata node");
2267  if (!isa<DIScope>(Scope))
2268  return error("expected DIScope node");
2269  continue;
2270  }
2271  if (Token.stringValue() == "inlinedAt") {
2272  lex();
2273  if (expectAndConsume(MIToken::colon))
2274  return true;
2275  if (Token.is(MIToken::exclaim)) {
2276  if (parseMDNode(InlinedAt))
2277  return true;
2278  } else if (Token.is(MIToken::md_dilocation)) {
2279  if (parseDILocation(InlinedAt))
2280  return true;
2281  } else
2282  return error("expected metadata node");
2283  if (!isa<DILocation>(InlinedAt))
2284  return error("expected DILocation node");
2285  continue;
2286  }
2287  if (Token.stringValue() == "isImplicitCode") {
2288  lex();
2289  if (expectAndConsume(MIToken::colon))
2290  return true;
2291  if (!Token.is(MIToken::Identifier))
2292  return error("expected true/false");
2293  // As far as I can see, we don't have any existing need for parsing
2294  // true/false in MIR yet. Do it ad-hoc until there's something else
2295  // that needs it.
2296  if (Token.stringValue() == "true")
2297  ImplicitCode = true;
2298  else if (Token.stringValue() == "false")
2299  ImplicitCode = false;
2300  else
2301  return error("expected true/false");
2302  lex();
2303  continue;
2304  }
2305  }
2306  return error(Twine("invalid DILocation argument '") +
2307  Token.stringValue() + "'");
2308  } while (consumeIfPresent(MIToken::comma));
2309  }
2310 
2311  if (expectAndConsume(MIToken::rparen))
2312  return true;
2313 
2314  if (!HaveLine)
2315  return error("DILocation requires line number");
2316  if (!Scope)
2317  return error("DILocation requires a scope");
2318 
2319  Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
2320  InlinedAt, ImplicitCode);
2321  return false;
2322 }
2323 
2324 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
2325  MDNode *Node = nullptr;
2326  if (Token.is(MIToken::exclaim)) {
2327  if (parseMDNode(Node))
2328  return true;
2329  } else if (Token.is(MIToken::md_diexpr)) {
2330  if (parseDIExpression(Node))
2331  return true;
2332  }
2333  Dest = MachineOperand::CreateMetadata(Node);
2334  return false;
2335 }
2336 
2337 bool MIParser::parseCFIOffset(int &Offset) {
2338  if (Token.isNot(MIToken::IntegerLiteral))
2339  return error("expected a cfi offset");
2340  if (Token.integerValue().getMinSignedBits() > 32)
2341  return error("expected a 32 bit integer (the cfi offset is too large)");
2342  Offset = (int)Token.integerValue().getExtValue();
2343  lex();
2344  return false;
2345 }
2346 
2347 bool MIParser::parseCFIRegister(Register &Reg) {
2348  if (Token.isNot(MIToken::NamedRegister))
2349  return error("expected a cfi register");
2350  Register LLVMReg;
2351  if (parseNamedRegister(LLVMReg))
2352  return true;
2353  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2354  assert(TRI && "Expected target register info");
2355  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
2356  if (DwarfReg < 0)
2357  return error("invalid DWARF register");
2358  Reg = (unsigned)DwarfReg;
2359  lex();
2360  return false;
2361 }
2362 
2363 bool MIParser::parseCFIAddressSpace(unsigned &AddressSpace) {
2364  if (Token.isNot(MIToken::IntegerLiteral))
2365  return error("expected a cfi address space literal");
2366  if (Token.integerValue().isSigned())
2367  return error("expected an unsigned integer (cfi address space)");
2368  AddressSpace = Token.integerValue().getZExtValue();
2369  lex();
2370  return false;
2371 }
2372 
2373 bool MIParser::parseCFIEscapeValues(std::string &Values) {
2374  do {
2375  if (Token.isNot(MIToken::HexLiteral))
2376  return error("expected a hexadecimal literal");
2377  unsigned Value;
2378  if (getUnsigned(Value))
2379  return true;
2380  if (Value > UINT8_MAX)
2381  return error("expected a 8-bit integer (too large)");
2382  Values.push_back(static_cast<uint8_t>(Value));
2383  lex();
2384  } while (consumeIfPresent(MIToken::comma));
2385  return false;
2386 }
2387 
2388 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
2389  auto Kind = Token.kind();
2390  lex();
2391  int Offset;
2392  Register Reg;
2393  unsigned AddressSpace;
2394  unsigned CFIIndex;
2395  switch (Kind) {
2397  if (parseCFIRegister(Reg))
2398  return true;
2399  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
2400  break;
2402  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2403  parseCFIOffset(Offset))
2404  return true;
2405  CFIIndex =
2406  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
2407  break;
2409  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2410  parseCFIOffset(Offset))
2411  return true;
2412  CFIIndex = MF.addFrameInst(
2414  break;
2416  if (parseCFIRegister(Reg))
2417  return true;
2418  CFIIndex =
2419  MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
2420  break;
2422  if (parseCFIOffset(Offset))
2423  return true;
2424  CFIIndex =
2425  MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, Offset));
2426  break;
2428  if (parseCFIOffset(Offset))
2429  return true;
2430  CFIIndex = MF.addFrameInst(
2432  break;
2434  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2435  parseCFIOffset(Offset))
2436  return true;
2437  CFIIndex =
2438  MF.addFrameInst(MCCFIInstruction::cfiDefCfa(nullptr, Reg, Offset));
2439  break;
2441  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2442  parseCFIOffset(Offset) || expectAndConsume(MIToken::comma) ||
2443  parseCFIAddressSpace(AddressSpace))
2444  return true;
2445  CFIIndex = MF.addFrameInst(MCCFIInstruction::createLLVMDefAspaceCfa(
2446  nullptr, Reg, Offset, AddressSpace));
2447  break;
2449  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRememberState(nullptr));
2450  break;
2452  if (parseCFIRegister(Reg))
2453  return true;
2454  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
2455  break;
2457  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestoreState(nullptr));
2458  break;
2460  if (parseCFIRegister(Reg))
2461  return true;
2462  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
2463  break;
2464  case MIToken::kw_cfi_register: {
2465  Register Reg2;
2466  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2467  parseCFIRegister(Reg2))
2468  return true;
2469 
2470  CFIIndex =
2471  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
2472  break;
2473  }
2475  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
2476  break;
2478  CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
2479  break;
2480  case MIToken::kw_cfi_escape: {
2481  std::string Values;
2482  if (parseCFIEscapeValues(Values))
2483  return true;
2484  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
2485  break;
2486  }
2487  default:
2488  // TODO: Parse the other CFI operands.
2489  llvm_unreachable("The current token should be a cfi operand");
2490  }
2491  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
2492  return false;
2493 }
2494 
2495 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
2496  switch (Token.kind()) {
2497  case MIToken::NamedIRBlock: {
2498  BB = dyn_cast_or_null<BasicBlock>(
2499  F.getValueSymbolTable()->lookup(Token.stringValue()));
2500  if (!BB)
2501  return error(Twine("use of undefined IR block '") + Token.range() + "'");
2502  break;
2503  }
2504  case MIToken::IRBlock: {
2505  unsigned SlotNumber = 0;
2506  if (getUnsigned(SlotNumber))
2507  return true;
2508  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
2509  if (!BB)
2510  return error(Twine("use of undefined IR block '%ir-block.") +
2511  Twine(SlotNumber) + "'");
2512  break;
2513  }
2514  default:
2515  llvm_unreachable("The current token should be an IR block reference");
2516  }
2517  return false;
2518 }
2519 
2520 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
2521  assert(Token.is(MIToken::kw_blockaddress));
2522  lex();
2523  if (expectAndConsume(MIToken::lparen))
2524  return true;
2525  if (Token.isNot(MIToken::GlobalValue) &&
2526  Token.isNot(MIToken::NamedGlobalValue))
2527  return error("expected a global value");
2528  GlobalValue *GV = nullptr;
2529  if (parseGlobalValue(GV))
2530  return true;
2531  auto *F = dyn_cast<Function>(GV);
2532  if (!F)
2533  return error("expected an IR function reference");
2534  lex();
2535  if (expectAndConsume(MIToken::comma))
2536  return true;
2537  BasicBlock *BB = nullptr;
2538  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
2539  return error("expected an IR block reference");
2540  if (parseIRBlock(BB, *F))
2541  return true;
2542  lex();
2543  if (expectAndConsume(MIToken::rparen))
2544  return true;
2545  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
2546  if (parseOperandsOffset(Dest))
2547  return true;
2548  return false;
2549 }
2550 
2551 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
2552  assert(Token.is(MIToken::kw_intrinsic));
2553  lex();
2554  if (expectAndConsume(MIToken::lparen))
2555  return error("expected syntax intrinsic(@llvm.whatever)");
2556 
2557  if (Token.isNot(MIToken::NamedGlobalValue))
2558  return error("expected syntax intrinsic(@llvm.whatever)");
2559 
2560  std::string Name = std::string(Token.stringValue());
2561  lex();
2562 
2563  if (expectAndConsume(MIToken::rparen))
2564  return error("expected ')' to terminate intrinsic name");
2565 
2566  // Find out what intrinsic we're dealing with, first try the global namespace
2567  // and then the target's private intrinsics if that fails.
2568  const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo();
2570  if (ID == Intrinsic::not_intrinsic && TII)
2571  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
2572 
2574  return error("unknown intrinsic name");
2576 
2577  return false;
2578 }
2579 
2580 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
2581  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
2582  bool IsFloat = Token.is(MIToken::kw_floatpred);
2583  lex();
2584 
2585  if (expectAndConsume(MIToken::lparen))
2586  return error("expected syntax intpred(whatever) or floatpred(whatever");
2587 
2588  if (Token.isNot(MIToken::Identifier))
2589  return error("whatever");
2590 
2591  CmpInst::Predicate Pred;
2592  if (IsFloat) {
2593  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2594  .Case("false", CmpInst::FCMP_FALSE)
2595  .Case("oeq", CmpInst::FCMP_OEQ)
2596  .Case("ogt", CmpInst::FCMP_OGT)
2597  .Case("oge", CmpInst::FCMP_OGE)
2598  .Case("olt", CmpInst::FCMP_OLT)
2599  .Case("ole", CmpInst::FCMP_OLE)
2600  .Case("one", CmpInst::FCMP_ONE)
2601  .Case("ord", CmpInst::FCMP_ORD)
2602  .Case("uno", CmpInst::FCMP_UNO)
2603  .Case("ueq", CmpInst::FCMP_UEQ)
2604  .Case("ugt", CmpInst::FCMP_UGT)
2605  .Case("uge", CmpInst::FCMP_UGE)
2606  .Case("ult", CmpInst::FCMP_ULT)
2607  .Case("ule", CmpInst::FCMP_ULE)
2608  .Case("une", CmpInst::FCMP_UNE)
2609  .Case("true", CmpInst::FCMP_TRUE)
2611  if (!CmpInst::isFPPredicate(Pred))
2612  return error("invalid floating-point predicate");
2613  } else {
2614  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2615  .Case("eq", CmpInst::ICMP_EQ)
2616  .Case("ne", CmpInst::ICMP_NE)
2617  .Case("sgt", CmpInst::ICMP_SGT)
2618  .Case("sge", CmpInst::ICMP_SGE)
2619  .Case("slt", CmpInst::ICMP_SLT)
2620  .Case("sle", CmpInst::ICMP_SLE)
2621  .Case("ugt", CmpInst::ICMP_UGT)
2622  .Case("uge", CmpInst::ICMP_UGE)
2623  .Case("ult", CmpInst::ICMP_ULT)
2624  .Case("ule", CmpInst::ICMP_ULE)
2626  if (!CmpInst::isIntPredicate(Pred))
2627  return error("invalid integer predicate");
2628  }
2629 
2630  lex();
2631  Dest = MachineOperand::CreatePredicate(Pred);
2632  if (expectAndConsume(MIToken::rparen))
2633  return error("predicate should be terminated by ')'.");
2634 
2635  return false;
2636 }
2637 
2638 bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {
2639  assert(Token.is(MIToken::kw_shufflemask));
2640 
2641  lex();
2642  if (expectAndConsume(MIToken::lparen))
2643  return error("expected syntax shufflemask(<integer or undef>, ...)");
2644 
2645  SmallVector<int, 32> ShufMask;
2646  do {
2647  if (Token.is(MIToken::kw_undef)) {
2648  ShufMask.push_back(-1);
2649  } else if (Token.is(MIToken::IntegerLiteral)) {
2650  const APSInt &Int = Token.integerValue();
2651  ShufMask.push_back(Int.getExtValue());
2652  } else
2653  return error("expected integer constant");
2654 
2655  lex();
2656  } while (consumeIfPresent(MIToken::comma));
2657 
2658  if (expectAndConsume(MIToken::rparen))
2659  return error("shufflemask should be terminated by ')'.");
2660 
2661  ArrayRef<int> MaskAlloc = MF.allocateShuffleMask(ShufMask);
2662  Dest = MachineOperand::CreateShuffleMask(MaskAlloc);
2663  return false;
2664 }
2665 
2666 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
2667  assert(Token.is(MIToken::kw_target_index));
2668  lex();
2669  if (expectAndConsume(MIToken::lparen))
2670  return true;
2671  if (Token.isNot(MIToken::Identifier))
2672  return error("expected the name of the target index");
2673  int Index = 0;
2674  if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2675  return error("use of undefined target index '" + Token.stringValue() + "'");
2676  lex();
2677  if (expectAndConsume(MIToken::rparen))
2678  return true;
2679  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
2680  if (parseOperandsOffset(Dest))
2681  return true;
2682  return false;
2683 }
2684 
2685 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
2686  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2687  lex();
2688  if (expectAndConsume(MIToken::lparen))
2689  return true;
2690 
2691  uint32_t *Mask = MF.allocateRegMask();
2692  while (true) {
2693  if (Token.isNot(MIToken::NamedRegister))
2694  return error("expected a named register");
2695  Register Reg;
2696  if (parseNamedRegister(Reg))
2697  return true;
2698  lex();
2699  Mask[Reg / 32] |= 1U << (Reg % 32);
2700  // TODO: Report an error if the same register is used more than once.
2701  if (Token.isNot(MIToken::comma))
2702  break;
2703  lex();
2704  }
2705 
2706  if (expectAndConsume(MIToken::rparen))
2707  return true;
2709  return false;
2710 }
2711 
2712 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
2713  assert(Token.is(MIToken::kw_liveout));
2714  uint32_t *Mask = MF.allocateRegMask();
2715  lex();
2716  if (expectAndConsume(MIToken::lparen))
2717  return true;
2718  while (true) {
2719  if (Token.isNot(MIToken::NamedRegister))
2720  return error("expected a named register");
2721  Register Reg;
2722  if (parseNamedRegister(Reg))
2723  return true;
2724  lex();
2725  Mask[Reg / 32] |= 1U << (Reg % 32);
2726  // TODO: Report an error if the same register is used more than once.
2727  if (Token.isNot(MIToken::comma))
2728  break;
2729  lex();
2730  }
2731  if (expectAndConsume(MIToken::rparen))
2732  return true;
2734  return false;
2735 }
2736 
2737 bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
2738  MachineOperand &Dest,
2739  Optional<unsigned> &TiedDefIdx) {
2740  switch (Token.kind()) {
2741  case MIToken::kw_implicit:
2743  case MIToken::kw_def:
2744  case MIToken::kw_dead:
2745  case MIToken::kw_killed:
2746  case MIToken::kw_undef:
2747  case MIToken::kw_internal:
2749  case MIToken::kw_debug_use:
2750  case MIToken::kw_renamable:
2751  case MIToken::underscore:
2755  return parseRegisterOperand(Dest, TiedDefIdx);
2757  return parseImmediateOperand(Dest);
2758  case MIToken::kw_half:
2759  case MIToken::kw_float:
2760  case MIToken::kw_double:
2761  case MIToken::kw_x86_fp80:
2762  case MIToken::kw_fp128:
2763  case MIToken::kw_ppc_fp128:
2764  return parseFPImmediateOperand(Dest);
2766  return parseMBBOperand(Dest);
2767  case MIToken::StackObject:
2768  return parseStackObjectOperand(Dest);
2770  return parseFixedStackObjectOperand(Dest);
2771  case MIToken::GlobalValue:
2773  return parseGlobalAddressOperand(Dest);
2775  return parseConstantPoolIndexOperand(Dest);
2777  return parseJumpTableIndexOperand(Dest);
2779  return parseExternalSymbolOperand(Dest);
2780  case MIToken::MCSymbol:
2781  return parseMCSymbolOperand(Dest);
2783  return parseSubRegisterIndexOperand(Dest);
2784  case MIToken::md_diexpr:
2785  case MIToken::exclaim:
2786  return parseMetadataOperand(Dest);
2803  return parseCFIOperand(Dest);
2805  return parseBlockAddressOperand(Dest);
2806  case MIToken::kw_intrinsic:
2807  return parseIntrinsicOperand(Dest);
2809  return parseTargetIndexOperand(Dest);
2810  case MIToken::kw_liveout:
2811  return parseLiveoutRegisterMaskOperand(Dest);
2812  case MIToken::kw_floatpred:
2813  case MIToken::kw_intpred:
2814  return parsePredicateOperand(Dest);
2816  return parseShuffleMaskOperand(Dest);
2817  case MIToken::Error:
2818  return true;
2819  case MIToken::Identifier:
2820  if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2821  Dest = MachineOperand::CreateRegMask(RegMask);
2822  lex();
2823  break;
2824  } else if (Token.stringValue() == "CustomRegMask") {
2825  return parseCustomRegisterMaskOperand(Dest);
2826  } else
2827  return parseTypedImmediateOperand(Dest);
2828  case MIToken::dot: {
2829  const auto *TII = MF.getSubtarget().getInstrInfo();
2830  if (const auto *Formatter = TII->getMIRFormatter()) {
2831  return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
2832  }
2834  }
2835  default:
2836  // FIXME: Parse the MCSymbol machine operand.
2837  return error("expected a machine operand");
2838  }
2839  return false;
2840 }
2841 
2842 bool MIParser::parseMachineOperandAndTargetFlags(
2843  const unsigned OpCode, const unsigned OpIdx, MachineOperand &Dest,
2844  Optional<unsigned> &TiedDefIdx) {
2845  unsigned TF = 0;
2846  bool HasTargetFlags = false;
2847  if (Token.is(MIToken::kw_target_flags)) {
2848  HasTargetFlags = true;
2849  lex();
2850  if (expectAndConsume(MIToken::lparen))
2851  return true;
2852  if (Token.isNot(MIToken::Identifier))
2853  return error("expected the name of the target flag");
2854  if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2855  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2856  return error("use of undefined target flag '" + Token.stringValue() +
2857  "'");
2858  }
2859  lex();
2860  while (Token.is(MIToken::comma)) {
2861  lex();
2862  if (Token.isNot(MIToken::Identifier))
2863  return error("expected the name of the target flag");
2864  unsigned BitFlag = 0;
2865  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2866  return error("use of undefined target flag '" + Token.stringValue() +
2867  "'");
2868  // TODO: Report an error when using a duplicate bit target flag.
2869  TF |= BitFlag;
2870  lex();
2871  }
2872  if (expectAndConsume(MIToken::rparen))
2873  return true;
2874  }
2875  auto Loc = Token.location();
2876  if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
2877  return true;
2878  if (!HasTargetFlags)
2879  return false;
2880  if (Dest.isReg())
2881  return error(Loc, "register operands can't have target flags");
2882  Dest.setTargetFlags(TF);
2883  return false;
2884 }
2885 
2886 bool MIParser::parseOffset(int64_t &Offset) {
2887  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2888  return false;
2889  StringRef Sign = Token.range();
2890  bool IsNegative = Token.is(MIToken::minus);
2891  lex();
2892  if (Token.isNot(MIToken::IntegerLiteral))
2893  return error("expected an integer literal after '" + Sign + "'");
2894  if (Token.integerValue().getMinSignedBits() > 64)
2895  return error("expected 64-bit integer (too large)");
2896  Offset = Token.integerValue().getExtValue();
2897  if (IsNegative)
2898  Offset = -Offset;
2899  lex();
2900  return false;
2901 }
2902 
2903 bool MIParser::parseAlignment(uint64_t &Alignment) {
2904  assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
2905  lex();
2906  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2907  return error("expected an integer literal after 'align'");
2908  if (getUint64(Alignment))
2909  return true;
2910  lex();
2911 
2912  if (!isPowerOf2_64(Alignment))
2913  return error("expected a power-of-2 literal after 'align'");
2914 
2915  return false;
2916 }
2917 
2918 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2919  assert(Token.is(MIToken::kw_addrspace));
2920  lex();
2921  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2922  return error("expected an integer literal after 'addrspace'");
2923  if (getUnsigned(Addrspace))
2924  return true;
2925  lex();
2926  return false;
2927 }
2928 
2929 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2930  int64_t Offset = 0;
2931  if (parseOffset(Offset))
2932  return true;
2933  Op.setOffset(Offset);
2934  return false;
2935 }
2936 
2937 static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS,
2938  const Value *&V, ErrorCallbackType ErrCB) {
2939  switch (Token.kind()) {
2940  case MIToken::NamedIRValue: {
2941  V = PFS.MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
2942  break;
2943  }
2944  case MIToken::IRValue: {
2945  unsigned SlotNumber = 0;
2946  if (getUnsigned(Token, SlotNumber, ErrCB))
2947  return true;
2948  V = PFS.getIRValue(SlotNumber);
2949  break;
2950  }
2952  case MIToken::GlobalValue: {
2953  GlobalValue *GV = nullptr;
2954  if (parseGlobalValue(Token, PFS, GV, ErrCB))
2955  return true;
2956  V = GV;
2957  break;
2958  }
2959  case MIToken::QuotedIRValue: {
2960  const Constant *C = nullptr;
2961  if (parseIRConstant(Token.location(), Token.stringValue(), PFS, C, ErrCB))
2962  return true;
2963  V = C;
2964  break;
2965  }
2967  V = nullptr;
2968  return false;
2969  default:
2970  llvm_unreachable("The current token should be an IR block reference");
2971  }
2972  if (!V)
2973  return ErrCB(Token.location(), Twine("use of undefined IR value '") + Token.range() + "'");
2974  return false;
2975 }
2976 
2977 bool MIParser::parseIRValue(const Value *&V) {
2979  Token, PFS, V, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2980  return error(Loc, Msg);
2981  });
2982 }
2983 
2984 bool MIParser::getUint64(uint64_t &Result) {
2985  if (Token.hasIntegerValue()) {
2986  if (Token.integerValue().getActiveBits() > 64)
2987  return error("expected 64-bit integer (too large)");
2988  Result = Token.integerValue().getZExtValue();
2989  return false;
2990  }
2991  if (Token.is(MIToken::HexLiteral)) {
2992  APInt A;
2993  if (getHexUint(A))
2994  return true;
2995  if (A.getBitWidth() > 64)
2996  return error("expected 64-bit integer (too large)");
2997  Result = A.getZExtValue();
2998  return false;
2999  }
3000  return true;
3001 }
3002 
3003 bool MIParser::getHexUint(APInt &Result) {
3004  return ::getHexUint(Token, Result);
3005 }
3006 
3007 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
3008  const auto OldFlags = Flags;
3009  switch (Token.kind()) {
3010  case MIToken::kw_volatile:
3012  break;
3015  break;
3018  break;
3019  case MIToken::kw_invariant:
3021  break;
3022  case MIToken::StringConstant: {
3024  if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
3025  return error("use of undefined target MMO flag '" + Token.stringValue() +
3026  "'");
3027  Flags |= TF;
3028  break;
3029  }
3030  default:
3031  llvm_unreachable("The current token should be a memory operand flag");
3032  }
3033  if (OldFlags == Flags)
3034  // We know that the same flag is specified more than once when the flags
3035  // weren't modified.
3036  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
3037  lex();
3038  return false;
3039 }
3040 
3041 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
3042  switch (Token.kind()) {
3043  case MIToken::kw_stack:
3044  PSV = MF.getPSVManager().getStack();
3045  break;
3046  case MIToken::kw_got:
3047  PSV = MF.getPSVManager().getGOT();
3048  break;
3050  PSV = MF.getPSVManager().getJumpTable();
3051  break;
3053  PSV = MF.getPSVManager().getConstantPool();
3054  break;
3056  int FI;
3057  if (parseFixedStackFrameIndex(FI))
3058  return true;
3059  PSV = MF.getPSVManager().getFixedStack(FI);
3060  // The token was already consumed, so use return here instead of break.
3061  return false;
3062  }
3063  case MIToken::StackObject: {
3064  int FI;
3065  if (parseStackFrameIndex(FI))
3066  return true;
3067  PSV = MF.getPSVManager().getFixedStack(FI);
3068  // The token was already consumed, so use return here instead of break.
3069  return false;
3070  }
3072  lex();
3073  switch (Token.kind()) {
3074  case MIToken::GlobalValue:
3076  GlobalValue *GV = nullptr;
3077  if (parseGlobalValue(GV))
3078  return true;
3079  PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
3080  break;
3081  }
3083  PSV = MF.getPSVManager().getExternalSymbolCallEntry(
3084  MF.createExternalSymbolName(Token.stringValue()));
3085  break;
3086  default:
3087  return error(
3088  "expected a global value or an external symbol after 'call-entry'");
3089  }
3090  break;
3091  case MIToken::kw_custom: {
3092  lex();
3093  const auto *TII = MF.getSubtarget().getInstrInfo();
3094  if (const auto *Formatter = TII->getMIRFormatter()) {
3095  if (Formatter->parseCustomPseudoSourceValue(
3096  Token.stringValue(), MF, PFS, PSV,
3097  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
3098  return error(Loc, Msg);
3099  }))
3100  return true;
3101  } else
3102  return error("unable to parse target custom pseudo source value");
3103  break;
3104  }
3105  default:
3106  llvm_unreachable("The current token should be pseudo source value");
3107  }
3108  lex();
3109  return false;
3110 }
3111 
3112 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
3113  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
3114  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
3115  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
3116  Token.is(MIToken::kw_call_entry) || Token.is(MIToken::kw_custom)) {
3117  const PseudoSourceValue *PSV = nullptr;
3118  if (parseMemoryPseudoSourceValue(PSV))
3119  return true;
3120  int64_t Offset = 0;
3121  if (parseOffset(Offset))
3122  return true;
3123  Dest = MachinePointerInfo(PSV, Offset);
3124  return false;
3125  }
3126  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
3127  Token.isNot(MIToken::GlobalValue) &&
3128  Token.isNot(MIToken::NamedGlobalValue) &&
3129  Token.isNot(MIToken::QuotedIRValue) &&
3130  Token.isNot(MIToken::kw_unknown_address))
3131  return error("expected an IR value reference");
3132  const Value *V = nullptr;
3133  if (parseIRValue(V))
3134  return true;
3135  if (V && !V->getType()->isPointerTy())
3136  return error("expected a pointer IR value");
3137  lex();
3138  int64_t Offset = 0;
3139  if (parseOffset(Offset))
3140  return true;
3141  Dest = MachinePointerInfo(V, Offset);
3142  return false;
3143 }
3144 
3145 bool MIParser::parseOptionalScope(LLVMContext &Context,
3146  SyncScope::ID &SSID) {
3147  SSID = SyncScope::System;
3148  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
3149  lex();
3150  if (expectAndConsume(MIToken::lparen))
3151  return error("expected '(' in syncscope");
3152 
3153  std::string SSN;
3154  if (parseStringConstant(SSN))
3155  return true;
3156 
3157  SSID = Context.getOrInsertSyncScopeID(SSN);
3158  if (expectAndConsume(MIToken::rparen))
3159  return error("expected ')' in syncscope");
3160  }
3161 
3162  return false;
3163 }
3164 
3165 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
3166  Order = AtomicOrdering::NotAtomic;
3167  if (Token.isNot(MIToken::Identifier))
3168  return false;
3169 
3170  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
3171  .Case("unordered", AtomicOrdering::Unordered)
3172  .Case("monotonic", AtomicOrdering::Monotonic)
3173  .Case("acquire", AtomicOrdering::Acquire)
3174  .Case("release", AtomicOrdering::Release)
3178 
3179  if (Order != AtomicOrdering::NotAtomic) {
3180  lex();
3181  return false;
3182  }
3183 
3184  return error("expected an atomic scope, ordering or a size specification");
3185 }
3186 
3187 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
3188  if (expectAndConsume(MIToken::lparen))
3189  return true;
3191  while (Token.isMemoryOperandFlag()) {
3192  if (parseMemoryOperandFlag(Flags))
3193  return true;
3194  }
3195  if (Token.isNot(MIToken::Identifier) ||
3196  (Token.stringValue() != "load" && Token.stringValue() != "store"))
3197  return error("expected 'load' or 'store' memory operation");
3198  if (Token.stringValue() == "load")
3199  Flags |= MachineMemOperand::MOLoad;
3200  else
3201  Flags |= MachineMemOperand::MOStore;
3202  lex();
3203 
3204  // Optional 'store' for operands that both load and store.
3205  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
3206  Flags |= MachineMemOperand::MOStore;
3207  lex();
3208  }
3209 
3210  // Optional synchronization scope.
3211  SyncScope::ID SSID;
3212  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3213  return true;
3214 
3215  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
3216  AtomicOrdering Order, FailureOrder;
3217  if (parseOptionalAtomicOrdering(Order))
3218  return true;
3219 
3220  if (parseOptionalAtomicOrdering(FailureOrder))
3221  return true;
3222 
3223  LLT MemoryType;
3224  if (Token.isNot(MIToken::IntegerLiteral) &&
3225  Token.isNot(MIToken::kw_unknown_size) &&
3226  Token.isNot(MIToken::lparen))
3227  return error("expected memory LLT, the size integer literal or 'unknown-size' after "
3228  "memory operation");
3229 
3231  if (Token.is(MIToken::IntegerLiteral)) {
3232  if (getUint64(Size))
3233  return true;
3234 
3235  // Convert from bytes to bits for storage.
3236  MemoryType = LLT::scalar(8 * Size);
3237  lex();
3238  } else if (Token.is(MIToken::kw_unknown_size)) {
3240  lex();
3241  } else {
3242  if (expectAndConsume(MIToken::lparen))
3243  return true;
3244  if (parseLowLevelType(Token.location(), MemoryType))
3245  return true;
3246  if (expectAndConsume(MIToken::rparen))
3247  return true;
3248 
3249  Size = MemoryType.getSizeInBytes();
3250  }
3251 
3253  if (Token.is(MIToken::Identifier)) {
3254  const char *Word =
3255  ((Flags & MachineMemOperand::MOLoad) &&
3256  (Flags & MachineMemOperand::MOStore))
3257  ? "on"
3258  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
3259  if (Token.stringValue() != Word)
3260  return error(Twine("expected '") + Word + "'");
3261  lex();
3262 
3263  if (parseMachinePointerInfo(Ptr))
3264  return true;
3265  }
3266  uint64_t BaseAlignment =
3268  AAMDNodes AAInfo;
3269  MDNode *Range = nullptr;
3270  while (consumeIfPresent(MIToken::comma)) {
3271  switch (Token.kind()) {
3272  case MIToken::kw_align:
3273  // align is printed if it is different than size.
3274  if (parseAlignment(BaseAlignment))
3275  return true;
3276  break;
3277  case MIToken::kw_basealign:
3278  // basealign is printed if it is different than align.
3279  if (parseAlignment(BaseAlignment))
3280  return true;
3281  break;
3282  case MIToken::kw_addrspace:
3283  if (parseAddrspace(Ptr.AddrSpace))
3284  return true;
3285  break;
3286  case MIToken::md_tbaa:
3287  lex();
3288  if (parseMDNode(AAInfo.TBAA))
3289  return true;
3290  break;
3292  lex();
3293  if (parseMDNode(AAInfo.Scope))
3294  return true;
3295  break;
3296  case MIToken::md_noalias:
3297  lex();
3298  if (parseMDNode(AAInfo.NoAlias))
3299  return true;
3300  break;
3301  case MIToken::md_range:
3302  lex();
3303  if (parseMDNode(Range))
3304  return true;
3305  break;
3306  // TODO: Report an error on duplicate metadata nodes.
3307  default:
3308  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
3309  "'!noalias' or '!range'");
3310  }
3311  }
3312  if (expectAndConsume(MIToken::rparen))
3313  return true;
3314  Dest = MF.getMachineMemOperand(Ptr, Flags, MemoryType, Align(BaseAlignment),
3315  AAInfo, Range, SSID, Order, FailureOrder);
3316  return false;
3317 }
3318 
3319 bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
3320  assert((Token.is(MIToken::kw_pre_instr_symbol) ||
3321  Token.is(MIToken::kw_post_instr_symbol)) &&
3322  "Invalid token for a pre- post-instruction symbol!");
3323  lex();
3324  if (Token.isNot(MIToken::MCSymbol))
3325  return error("expected a symbol after 'pre-instr-symbol'");
3326  Symbol = getOrCreateMCSymbol(Token.stringValue());
3327  lex();
3328  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3329  Token.is(MIToken::lbrace))
3330  return false;
3331  if (Token.isNot(MIToken::comma))
3332  return error("expected ',' before the next machine operand");
3333  lex();
3334  return false;
3335 }
3336 
3337 bool MIParser::parseHeapAllocMarker(MDNode *&Node) {
3339  "Invalid token for a heap alloc marker!");
3340  lex();
3341  parseMDNode(Node);
3342  if (!Node)
3343  return error("expected a MDNode after 'heap-alloc-marker'");
3344  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3345  Token.is(MIToken::lbrace))
3346  return false;
3347  if (Token.isNot(MIToken::comma))
3348  return error("expected ',' before the next machine operand");
3349  lex();
3350  return false;
3351 }
3352 
3354  const Function &F,
3355  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3356  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
3357  MST.incorporateFunction(F);
3358  for (auto &BB : F) {
3359  if (BB.hasName())
3360  continue;
3361  int Slot = MST.getLocalSlot(&BB);
3362  if (Slot == -1)
3363  continue;
3364  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
3365  }
3366 }
3367 
3369  unsigned Slot,
3370  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3371  return Slots2BasicBlocks.lookup(Slot);
3372 }
3373 
3374 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
3375  if (Slots2BasicBlocks.empty())
3376  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
3377  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
3378 }
3379 
3380 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
3381  if (&F == &MF.getFunction())
3382  return getIRBlock(Slot);
3383  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
3384  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
3385  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
3386 }
3387 
3388 MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
3389  // FIXME: Currently we can't recognize temporary or local symbols and call all
3390  // of the appropriate forms to create them. However, this handles basic cases
3391  // well as most of the special aspects are recognized by a prefix on their
3392  // name, and the input names should already be unique. For test cases, keeping
3393  // the symbol name out of the symbol table isn't terribly important.
3394  return MF.getContext().getOrCreateSymbol(Name);
3395 }
3396 
3397 bool MIParser::parseStringConstant(std::string &Result) {
3398  if (Token.isNot(MIToken::StringConstant))
3399  return error("expected string constant");
3400  Result = std::string(Token.stringValue());
3401  lex();
3402  return false;
3403 }
3404 
3406  StringRef Src,
3407  SMDiagnostic &Error) {
3408  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
3409 }
3410 
3412  StringRef Src, SMDiagnostic &Error) {
3413  return MIParser(PFS, Error, Src).parseBasicBlocks();
3414 }
3415 
3418  SMDiagnostic &Error) {
3419  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
3420 }
3421 
3423  Register &Reg, StringRef Src,
3424  SMDiagnostic &Error) {
3425  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
3426 }
3427 
3429  Register &Reg, StringRef Src,
3430  SMDiagnostic &Error) {
3431  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
3432 }
3433 
3435  VRegInfo *&Info, StringRef Src,
3436  SMDiagnostic &Error) {
3437  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
3438 }
3439 
3441  int &FI, StringRef Src,
3442  SMDiagnostic &Error) {
3443  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
3444 }
3445 
3447  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
3448  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
3449 }
3450 
3452  SMRange SrcRange, SMDiagnostic &Error) {
3453  return MIParser(PFS, Error, Src, SrcRange).parseMachineMetadata();
3454 }
3455 
3457  PerFunctionMIParsingState &PFS, const Value *&V,
3458  ErrorCallbackType ErrorCallback) {
3459  MIToken Token;
3460  Src = lexMIToken(Src, Token, [&](StringRef::iterator Loc, const Twine &Msg) {
3461  ErrorCallback(Loc, Msg);
3462  });
3463  V = nullptr;
3464 
3465  return ::parseIRValue(Token, PFS, V, ErrorCallback);
3466 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:67
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm::MachineOperand::CreateCPI
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:828
MemoryBuffer.h
llvm::CmpInst::FCMP_ULE
@ FCMP_ULE
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:735
llvm::MachineOperand::CreateJTI
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Definition: MachineOperand.h:844
llvm::MIToken::kw_float
@ kw_float
Definition: MILexer.h:98
llvm::RegState::InternalRead
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
Definition: MachineInstrBuilder.h:59
llvm::AtomicOrdering::AcquireRelease
@ AcquireRelease
llvm::MIToken::NamedRegister
@ NamedRegister
Definition: MILexer.h:146
llvm::MIToken::kw_cfi_offset
@ kw_cfi_offset
Definition: MILexer.h:79
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
ErrorCallbackType
function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
Definition: MIParser.cpp:611
MachineInstr.h
llvm::ModuleSlotTracker::getLocalSlot
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:870
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MCRegisterInfo::getName
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
Definition: MCRegisterInfo.h:485
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::CmpInst::ICMP_EQ
@ ICMP_EQ
equal
Definition: InstrTypes.h:741
llvm::MachineRegisterInfo::createIncompleteVirtualRegister
Register createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
Definition: MachineRegisterInfo.cpp:146
Optional.h
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::MachineOperand::CreateReg
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition: MachineOperand.h:791
getIRBlockFromSlot
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3368
llvm::MIToken::kw_exact
@ kw_exact
Definition: MILexer.h:74
llvm::MIToken::kw_unknown_size
@ kw_unknown_size
Definition: MILexer.h:130
llvm::MIToken::colon
@ colon
Definition: MILexer.h:37
Metadata.h
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:720
llvm::RegState::Dead
@ Dead
Unused definition.
Definition: MachineInstrBuilder.h:50
llvm::MIToken::FixedStackObject
@ FixedStackObject
Definition: MILexer.h:151
llvm::MIToken::kw_nsz
@ kw_nsz
Definition: MILexer.h:67
llvm::Type::isPointerTy
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:217
llvm::MIToken::GlobalValue
@ GlobalValue
Definition: MILexer.h:153
llvm::MIToken::VirtualRegister
@ VirtualRegister
Definition: MILexer.h:162
AtomicOrdering.h
DebugInfoMetadata.h
MCInstrDesc.h
llvm::MIToken::kw_cfi_restore_state
@ kw_cfi_restore_state
Definition: MILexer.h:90
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
T
Parser.h
llvm::Function
Definition: Function.h:62
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::lookup
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
Definition: DenseMap.h:197
llvm::MIToken::md_noalias
@ md_noalias
Definition: MILexer.h:139
StringRef.h
llvm::MIToken::Error
@ Error
Definition: MILexer.h:30
llvm::MIToken::kw_call_entry
@ kw_call_entry
Definition: MILexer.h:114
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::StringSwitch::Default
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:181
llvm::VRegInfo::RegBank
const RegisterBank * RegBank
Definition: MIParser.h:44
llvm::RegState::Implicit
@ Implicit
Not emitted register (e.g. carry, or temporary result).
Definition: MachineInstrBuilder.h:46
llvm::PerTargetMIParsingState::getRegBank
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
Definition: MIParser.cpp:312
llvm::MIToken::kw_early_clobber
@ kw_early_clobber
Definition: MILexer.h:59
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:137
llvm::MIToken::integerValue
const APSInt & integerValue() const
Definition: MILexer.h:228
llvm::toString
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:1020
llvm::TargetRegisterInfo::getRegMaskNames
virtual ArrayRef< const char * > getRegMaskNames() const =0
llvm::StringRef::npos
static constexpr size_t npos
Definition: StringRef.h:60
llvm::PerTargetMIParsingState
Definition: MIParser.h:53
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::MIToken::kw_cfi_def_cfa
@ kw_cfi_def_cfa
Definition: MILexer.h:85
llvm::CmpInst::FCMP_ONE
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:728
mapValueToSlot
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
Definition: MIParser.cpp:347
llvm::VRegInfo::Kind
enum llvm::VRegInfo::uint8_t Kind
llvm::RegisterBankInfo::getRegBank
RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
Definition: RegisterBankInfo.h:432
ErrorHandling.h
llvm::MCRegisterInfo::getDwarfRegNum
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
Definition: MCRegisterInfo.cpp:68
llvm::PerFunctionMIParsingState::PerFunctionMIParsingState
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
Definition: MIParser.cpp:319
llvm::MCRegisterInfo::getNumRegs
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Definition: MCRegisterInfo.h:491
llvm::MIToken::kw_double
@ kw_double
Definition: MILexer.h:99
llvm::MachineMemOperand::MOInvariant
@ MOInvariant
The memory access always returns the same value (or traps).
Definition: MachineMemOperand.h:145
RegisterBankInfo.h
llvm::CmpInst::ICMP_NE
@ ICMP_NE
not equal
Definition: InstrTypes.h:742
llvm::AtomicOrdering::SequentiallyConsistent
@ SequentiallyConsistent
llvm::MIToken::kw_post_instr_symbol
@ kw_post_instr_symbol
Definition: MILexer.h:127
MachineBasicBlock.h
llvm::lltok::APSInt
@ APSInt
Definition: LLToken.h:496
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::MIToken::kw_afn
@ kw_afn
Definition: MILexer.h:70
llvm::MemOp
Definition: TargetLowering.h:112
APInt.h
llvm::MIToken::NamedGlobalValue
@ NamedGlobalValue
Definition: MILexer.h:152
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::CmpInst::ICMP_SGT
@ ICMP_SGT
signed greater than
Definition: InstrTypes.h:747
llvm::AAMDNodes
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:651
llvm::MCCFIInstruction::createRelOffset
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
Definition: MCDwarf.h:557
llvm::StringMap::end
iterator end()
Definition: StringMap.h:203
llvm::HexagonInstrInfo::getSerializableBitmaskMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
Definition: HexagonInstrInfo.cpp:2004
DenseMap.h
llvm::MachineOperand::CreateMetadata
static MachineOperand CreateMetadata(const MDNode *Meta)
Definition: MachineOperand.h:898
Module.h
llvm::parseMachineInstructions
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:3411
llvm::MachineOperand::CreateCFIIndex
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
Definition: MachineOperand.h:913
llvm::MIToken::kw_renamable
@ kw_renamable
Definition: MILexer.h:61
TargetInstrInfo.h
llvm::MachineInstr::FmAfn
@ FmAfn
Definition: MachineInstr.h:98
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:128
llvm::MIToken::underscore
@ underscore
Definition: MILexer.h:36
llvm::MIToken::kw_nofpexcept
@ kw_nofpexcept
Definition: MILexer.h:75
getHexUint
static bool getHexUint(const MIToken &Token, APInt &Result)
Definition: MIParser.cpp:1923
llvm::VRegInfo::REGBANK
@ REGBANK
Definition: MIParser.h:39
llvm::MachineMemOperand::MODereferenceable
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
Definition: MachineMemOperand.h:143
llvm::LLT::isValid
bool isValid() const
Definition: LowLevelTypeImpl.h:117
llvm::MIToken::kw_frame_destroy
@ kw_frame_destroy
Definition: MILexer.h:64
error
#define error(X)
Definition: SymbolRecordMapping.cpp:14
llvm::PerFunctionMIParsingState::VRegInfosNamed
StringMap< VRegInfo * > VRegInfosNamed
Definition: MIParser.h:174
llvm::HexagonInstrInfo::getSerializableDirectMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
Definition: HexagonInstrInfo.cpp:1985
llvm::MIToken::kw_inlineasm_br_indirect_target
@ kw_inlineasm_br_indirect_target
Definition: MILexer.h:119
llvm::Optional< unsigned >
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
printImplicitRegisterFlag
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:1323
llvm::MIToken::kw_ninf
@ kw_ninf
Definition: MILexer.h:66
llvm::CmpInst::ICMP_SLE
@ ICMP_SLE
signed less or equal
Definition: InstrTypes.h:750
llvm::MIToken::kw_addrspace
@ kw_addrspace
Definition: MILexer.h:109
llvm::PerFunctionMIParsingState::getVRegInfoNamed
VRegInfo & getVRegInfoNamed(StringRef RegName)
Definition: MIParser.cpp:335
llvm::Intrinsic::not_intrinsic
@ not_intrinsic
Definition: Intrinsics.h:45
llvm::MIToken::kw_cfi_register
@ kw_cfi_register
Definition: MILexer.h:87
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:856
llvm::PowerOf2Ceil
uint64_t PowerOf2Ceil(uint64_t A)
Returns the power of two which is greater than or equal to the given value.
Definition: MathExtras.h:702
llvm::StringMap::find
iterator find(StringRef Key)
Definition: StringMap.h:216
llvm::MBBSectionID
Definition: MachineBasicBlock.h:52
llvm::AAMDNodes::Scope
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:674
llvm::minidump::MemoryType
MemoryType
Definition: Minidump.h:98
llvm::PerTargetMIParsingState::getMMOTargetFlag
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.
Definition: MIParser.cpp:265
llvm::VRegInfo::RC
const TargetRegisterClass * RC
Definition: MIParser.h:43
llvm::CmpInst::FCMP_OGT
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:724
llvm::MCCFIInstruction::createSameValue
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:594
llvm::BitmaskEnumDetail::Mask
std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:44
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::BasicBlockSection::List
@ List
llvm::MIToken::range
StringRef range() const
Definition: MILexer.h:223
llvm::MCRegisterInfo::getNumSubRegIndices
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
Definition: MCRegisterInfo.h:498
llvm::MIToken::kw_internal
@ kw_internal
Definition: MILexer.h:58
llvm::MemoryBuffer
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:50
llvm::MIToken
A token produced by the machine instruction lexer.
Definition: MILexer.h:26
llvm::MCCFIInstruction::createLLVMDefAspaceCfa
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int Offset, unsigned AddressSpace)
.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...
Definition: MCDwarf.h:540
llvm::MDNode::get
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1233
F
#define F(x, y, z)
Definition: MD5.cpp:56
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:525
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:84
llvm::MachineOperand::CreateES
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
Definition: MachineOperand.h:858
llvm::AtomicOrdering::Monotonic
@ Monotonic
llvm::parseMachineBasicBlockDefinitions
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:3405
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::PerTargetMIParsingState::parseInstrName
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
Definition: MIParser.cpp:143
llvm::PerFunctionMIParsingState::Allocator
BumpPtrAllocator Allocator
Definition: MIParser.h:163
llvm::MIToken::kw_cfi_def_cfa_register
@ kw_cfi_def_cfa_register
Definition: MILexer.h:81
llvm::TargetIntrinsicInfo
TargetIntrinsicInfo - Interface to description of machine instruction set.
Definition: TargetIntrinsicInfo.h:29
llvm::MDTuple::getDistinct
static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a distinct node.
Definition: Metadata.h:1211
llvm::MIToken::kw_killed
@ kw_killed
Definition: MILexer.h:56
parseIRConstant
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1770
llvm::Optional::hasValue
constexpr bool hasValue() const
Definition: Optional.h:288
llvm::RegState::Debug
@ Debug
Register 'use' is for debugging purpose.
Definition: MachineInstrBuilder.h:56
llvm::MIToken::NamedIRValue
@ NamedIRValue
Definition: MILexer.h:167
llvm::MIToken::stringValue
StringRef stringValue() const
Return the token's string value.
Definition: MILexer.h:226
llvm::CmpInst::FCMP_ULT
@ FCMP_ULT
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:734
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::MIToken::kw_arcp
@ kw_arcp
Definition: MILexer.h:68
llvm::ConstantInfo
Definition: ConstantsContext.h:390
llvm::MIToken::kw_debug_use
@ kw_debug_use
Definition: MILexer.h:60
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:44
llvm::LLT::fixed_vector
static LLT fixed_vector(unsigned NumElements, unsigned ScalarSizeInBits)
Get a low-level fixed-width vector of some number of elements and element width.
Definition: LowLevelTypeImpl.h:75
llvm::MIToken::MachineBasicBlockLabel
@ MachineBasicBlockLabel
Definition: MILexer.h:148
llvm::MachineBasicBlock::setSectionID
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
Definition: MachineBasicBlock.h:583
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:206
llvm::MIToken::kw_cfi_llvm_def_aspace_cfa
@ kw_cfi_llvm_def_aspace_cfa
Definition: MILexer.h:86
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:751
verifyScalarSize
static bool verifyScalarSize(uint64_t Size)
Definition: MIParser.cpp:1799
llvm::MachineBasicBlock::setIsInlineAsmBrIndirectTarget
void setIsInlineAsmBrIndirectTarget(bool V=true)
Indicates if this is the indirect dest of an INLINEASM_BR.
Definition: MachineBasicBlock.h:599
llvm::all_of
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1551
verifyVectorElementCount
static bool verifyVectorElementCount(uint64_t NumElts)
Definition: MIParser.cpp:1803
verifyAddrSpace
static bool verifyAddrSpace(uint64_t AddrSpace)
Definition: MIParser.cpp:1807
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:640
llvm::MachineOperand::isImplicit
bool isImplicit() const
Definition: MachineOperand.h:380
llvm::MIToken::kw_cfi_remember_state
@ kw_cfi_remember_state
Definition: MILexer.h:88
llvm::parseStackObjectReference
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3440
llvm::parseMDNode
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3446
llvm::MIToken::kw_invariant
@ kw_invariant
Definition: MILexer.h:106
TargetMachine.h
llvm::RegisterBank
This class implements the register bank concept.
Definition: RegisterBank.h:28
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::CmpInst::isFPPredicate
bool isFPPredicate() const
Definition: InstrTypes.h:813
llvm::MIRFormatter::parseIRValue
static bool parseIRValue(StringRef Src, MachineFunction &MF, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrorCallback)
Helper functions to parse IR value from MIR serialization format which will be useful for target spec...
Definition: MIParser.cpp:3456
llvm::MachineRegisterInfo::setRegClassOrRegBank
void setRegClassOrRegBank(Register Reg, const RegClassOrRegBank &RCOrRB)
Definition: MachineRegisterInfo.h:678
llvm::MCInstrDesc::ImplicitUses
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:204
Constants.h
llvm::MachineRegisterInfo::setType
void setType(Register VReg, LLT Ty)
Set the low-level type of VReg to Ty.
Definition: MachineRegisterInfo.cpp:182
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:52
llvm::MIToken::kw_shufflemask
@ kw_shufflemask
Definition: MILexer.h:125
llvm::MemoryBuffer::getBufferEnd
const char * getBufferEnd() const
Definition: MemoryBuffer.h:66
llvm::MachineOperand::CreateImm
static MachineOperand CreateImm(int64_t Val)
Definition: MachineOperand.h:773
llvm::PerFunctionMIParsingState::IRSlots
const SlotMapping & IRSlots
Definition: MIParser.h:166
llvm::PerTargetMIParsingState::getTargetIndex
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
Definition: MIParser.cpp:201
llvm::MIRFormatter::parseImmMnemonic
virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, StringRef Src, int64_t &Imm, ErrorCallbackType ErrorCallback) const
Implement target specific parsing of immediate mnemonics.
Definition: MIRFormatter.h:47
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::isUse
bool isUse() const
Definition: MachineOperand.h:370
Intrinsics.h
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::CmpInst::ICMP_ULE
@ ICMP_ULE
unsigned less or equal
Definition: InstrTypes.h:746
llvm::ARM_PROC::A
@ A
Definition: ARMBaseInfo.h:34
Twine.h
InstrTypes.h
llvm::MIToken::equal
@ equal
Definition: MILexer.h:35
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::StringMap::insert
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
Definition: StringMap.h:274
MCContext.h
llvm::MachineBasicBlock::isSuccessor
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Definition: MachineBasicBlock.cpp:913
llvm::MIToken::kw_cfi_restore
@ kw_cfi_restore
Definition: MILexer.h:89
llvm::MIToken::kw_implicit
@ kw_implicit
Definition: MILexer.h:51
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::guessSuccessors
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:603
llvm::MIToken::FloatingPointLiteral
@ FloatingPointLiteral
Definition: MILexer.h:159
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::CmpInst::FCMP_UGE
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:733
llvm::MIToken::md_tbaa
@ md_tbaa
Definition: MILexer.h:137
llvm::SMDiagnostic
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:251
llvm::ms_demangle::QualifierMangleMode::Result
@ Result
llvm::MIToken::kw_x86_fp80
@ kw_x86_fp80
Definition: MILexer.h:100
llvm::StringRef::iterator
const char * iterator
Definition: StringRef.h:62
llvm::MCInstrDesc::getImplicitDefs
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
Definition: MCInstrDesc.h:581
UINT64_MAX
#define UINT64_MAX
Definition: DataTypes.h:77
llvm::APInt::getLimitedValue
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
Definition: APInt.h:456
llvm::MachineInstr::FmNoInfs
@ FmNoInfs
Definition: MachineInstr.h:90
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MIToken::kw_cfi_undefined
@ kw_cfi_undefined
Definition: MILexer.h:91
llvm::MIToken::kw_distinct
@ kw_distinct
Definition: MILexer.h:134
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:195
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:82
llvm::CmpInst::FCMP_UNO
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:730
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:146
SMLoc.h
llvm::MCCFIInstruction::createRestoreState
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:604
llvm::MIToken::kw_tied_def
@ kw_tied_def
Definition: MILexer.h:62
llvm::StringMap::clear
void clear()
Definition: StringMap.h:346
llvm::AtomicOrdering::Acquire
@ Acquire
llvm::MIToken::IRBlock
@ IRBlock
Definition: MILexer.h:166
llvm::APSInt
An arbitrary precision integer that knows its signedness.
Definition: APSInt.h:22
llvm::SourceMgr::getMainFileID
unsigned getMainFileID() const
Definition: SourceMgr.h:129
llvm::MachineOperand::CreateFI
static MachineOperand CreateFI(int Idx)
Definition: MachineOperand.h:823
llvm::MIToken::HexLiteral
@ HexLiteral
Definition: MILexer.h:160
llvm::MIToken::kw_cfi_escape
@ kw_cfi_escape
Definition: MILexer.h:84
llvm::CmpInst::FCMP_OEQ
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:723
llvm::MemoryLocation::UnknownSize
@ UnknownSize
Definition: MemoryLocation.h:214
DebugLoc.h
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::CmpInst::FCMP_OLT
@ FCMP_OLT
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:726
llvm::MachineOperand::setTargetFlags
void setTargetFlags(unsigned F)
Definition: MachineOperand.h:224
llvm::PseudoSourceValue
Special value supplied for machine level alias analysis.
Definition: PseudoSourceValue.h:35
StringMap.h
llvm::MIToken::kw_heap_alloc_marker
@ kw_heap_alloc_marker
Definition: MILexer.h:128
llvm::MachineInstr::NoSWrap
@ NoSWrap
Definition: MachineInstr.h:104
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::MCCFIInstruction::createEscape
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:610
llvm::Metadata
Root of the metadata hierarchy.
Definition: Metadata.h:62
llvm::PerTargetMIParsingState::getRegClass
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
Definition: MIParser.cpp:305
llvm::AddressSpace
AddressSpace
Definition: NVPTXBaseInfo.h:21
llvm::StringRef::str
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:245
getUnsigned
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1940
llvm::MachineInstr::FmNsz
@ FmNsz
Definition: MachineInstr.h:92
llvm::None
const NoneType None
Definition: None.h:23
parseMetadata
static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)
Parse Input that contains metadata.
Definition: SampleProfReader.cpp:106
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::MIToken::StringConstant
@ StringConstant
Definition: MILexer.h:171
llvm::MachineInstr::NoFPExcept
@ NoFPExcept
Definition: MachineInstr.h:108
llvm::LLVMContext::getOrInsertSyncScopeID
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.
Definition: LLVMContext.cpp:290
SourceMgr.h
Type.h
BranchProbability.h
llvm::RegState::EarlyClobber
@ EarlyClobber
Register definition happens before uses.
Definition: MachineInstrBuilder.h:54
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:518
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
LowLevelTypeImpl.h
llvm::MIToken::kw_liveout
@ kw_liveout
Definition: MILexer.h:116
llvm::MIToken::kw_reassoc
@ kw_reassoc
Definition: MILexer.h:71
llvm::SourceMgr::getMemoryBuffer
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:122
llvm::MIToken::ConstantPoolItem
@ ConstantPoolItem
Definition: MILexer.h:163
llvm::Twine::str
std::string str() const
Return the twine contents as a std::string.
Definition: Twine.cpp:17
llvm::MemoryBuffer::getBufferIdentifier
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:75
ValueSymbolTable.h
llvm::CmpInst::FCMP_FALSE
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:722
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:78
llvm::MachineBasicBlock::setAlignment
void setAlignment(Align A)
Set alignment of the basic block.
Definition: MachineBasicBlock.h:522
llvm::MIToken::hasIntegerValue
bool hasIntegerValue() const
Definition: MILexer.h:230
llvm::function_ref
An efficient, type-erasing, non-owning reference to a callable.
Definition: STLExtras.h:168
llvm::LLT::pointer
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
Definition: LowLevelTypeImpl.h:50
llvm::MIToken::StackObject
@ StackObject
Definition: MILexer.h:150
llvm::AtomicOrdering
AtomicOrdering
Atomic ordering for LLVM's memory model.
Definition: AtomicOrdering.h:56
llvm::PerFunctionMIParsingState::VRegInfos
DenseMap< Register, VRegInfo * > VRegInfos
Definition: MIParser.h:173
BasicBlock.h
llvm::MIToken::kw_dead
@ kw_dead
Definition: MILexer.h:54
llvm::MIToken::kw_cfi_adjust_cfa_offset
@ kw_cfi_adjust_cfa_offset
Definition: MILexer.h:83
llvm::MachineOperand::CreateShuffleMask
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
Definition: MachineOperand.h:931
llvm::PerFunctionMIParsingState::getIRValue
const Value * getIRValue(unsigned Slot)
Definition: MIParser.cpp:369
llvm::RegisterBankInfo::getNumRegBanks
unsigned getNumRegBanks() const
Get the total number of register banks.
Definition: RegisterBankInfo.h:589
llvm::SlotMapping
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
Definition: SlotMapping.h:32
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MIToken::kw_cfi_window_save
@ kw_cfi_window_save
Definition: MILexer.h:92
llvm::parseMachineMetadata
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)
Definition: MIParser.cpp:3451
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:63
llvm::TargetRegisterInfo::getRegClass
const TargetRegisterClass * getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
Definition: TargetRegisterInfo.h:739
isImplicitOperandIn
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:1335
llvm::isUInt< 16 >
constexpr bool isUInt< 16 >(uint64_t x)
Definition: MathExtras.h:408
llvm::MIToken::kw_pre_instr_symbol
@ kw_pre_instr_symbol
Definition: MILexer.h:126
Index
uint32_t Index
Definition: ELFObjHandler.cpp:84
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:321
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
uint64_t
llvm::MachineOperand::CreateMBB
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
Definition: MachineOperand.h:816
llvm::PerFunctionMIParsingState::getVRegInfo
VRegInfo & getVRegInfo(Register Num)
Definition: MIParser.cpp:324
parseIRValue
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:2937
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:578
llvm::MCInstrDesc::isCall
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:279
llvm::tgtok::Int
@ Int
Definition: TGLexer.h:51
llvm::TargetRegisterInfo::getRegClassName
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
Definition: TargetRegisterInfo.h:745
llvm::MIToken::SubRegisterIndex
@ SubRegisterIndex
Definition: MILexer.h:170
llvm::MachineBasicBlock::setIsEHPad
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Definition: MachineBasicBlock.h:530
llvm::MIToken::kw_nnan
@ kw_nnan
Definition: MILexer.h:65
llvm::VRegInfo::NORMAL
@ NORMAL
Definition: MIParser.h:39
llvm::MachineInstr::FmReassoc
@ FmReassoc
Definition: MachineInstr.h:100
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:38
llvm::MIToken::kw_target_index
@ kw_target_index
Definition: MILexer.h:96
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
llvm::MCCFIInstruction::createNegateRAState
static MCCFIInstruction createNegateRAState(MCSymbol *L)
.cfi_negate_ra_state AArch64 negate RA state.
Definition: MCDwarf.h:575
llvm::MIToken::kw_fp128
@ kw_fp128
Definition: MILexer.h:101
MemoryLocation.h
llvm::DenseMap
Definition: DenseMap.h:714
llvm::SyncScope::ID
uint8_t ID
Definition: LLVMContext.h:47
llvm::StringRef::front
LLVM_NODISCARD char front() const
front - Get the first character in the string.
Definition: StringRef.h:161
llvm::AtomicOrdering::Unordered
@ Unordered
MIRPrinter.h
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:21
llvm::MIToken::MachineBasicBlock
@ MachineBasicBlock
Definition: MILexer.h:149
llvm::MIToken::Newline
@ Newline
Definition: MILexer.h:31
MCRegisterInfo.h
llvm::StringRef::lower
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:105
ArrayRef.h
llvm::MIToken::lbrace
@ lbrace
Definition: MILexer.h:43
llvm::MDString::get
static MDString * get(LLVMContext &Context, StringRef Str)
Definition: Metadata.cpp:473
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::MIToken::kw_half
@ kw_half
Definition: MILexer.h:97
llvm::MachineMemOperand::Flags
Flags
Flags values. These may be or'd together.
Definition: MachineMemOperand.h:131
llvm::MBBSectionID::ExceptionSectionID
const static MBBSectionID ExceptionSectionID
Definition: MachineBasicBlock.h:65
llvm::MIToken::IRValue
@ IRValue
Definition: MILexer.h:168
llvm::VRegInfo::D
union llvm::VRegInfo::@191 D
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MIToken::comma
@ comma
Definition: MILexer.h:34
llvm::MachineBasicBlock::setHasAddressTaken
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
Definition: MachineBasicBlock.h:215
llvm::CmpInst::FCMP_OGE
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:725
llvm::Function::lookupIntrinsicID
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:770
llvm::CmpInst::ICMP_UGE
@ ICMP_UGE
unsigned greater or equal
Definition: InstrTypes.h:744
MIRFormatter.h
llvm::MachineMemOperand::MONonTemporal
@ MONonTemporal
The memory access is non-temporal.
Definition: MachineMemOperand.h:141
llvm::MachineOperand::CreateBA
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:866
llvm::CmpInst::BAD_ICMP_PREDICATE
@ BAD_ICMP_PREDICATE
Definition: InstrTypes.h:753
llvm::MIToken::dot
@ dot
Definition: MILexer.h:39
APSInt.h
llvm::MDTuple::get
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1200
llvm::MCCFIInstruction::cfiDefCfa
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
Definition: MCDwarf.h:511
llvm::MIToken::JumpTableIndex
@ JumpTableIndex
Definition: MILexer.h:164
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:67
llvm::MDNode
Metadata node.
Definition: Metadata.h:906
llvm::MachineOperand::CreateMCSymbol
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
Definition: MachineOperand.h:904
llvm::MIToken::kw_constant_pool
@ kw_constant_pool
Definition: MILexer.h:113
initSlots2Values
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
Definition: MIParser.cpp:356
llvm::irsymtab::storage::Word
support::ulittle32_t Word
Definition: IRSymtab.h:52
llvm::PerTargetMIParsingState::getRegisterByName
bool getRegisterByName(StringRef RegName, Register &Reg)
Try to convert a register name to a register number.
Definition: MIParser.cpp:124
llvm::MIToken::Eof
@ Eof
Definition: MILexer.h:29
llvm::TargetSubtargetInfo::getRegBankInfo
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
Definition: TargetSubtargetInfo.h:128
llvm::MachineBasicBlock::setIsEHFuncletEntry
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
Definition: MachineBasicBlock.h:555
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::MachineFunction
Definition: MachineFunction.h:234
llvm::CmpInst::ICMP_SLT
@ ICMP_SLT
signed less than
Definition: InstrTypes.h:749
llvm::CmpInst::isIntPredicate
bool isIntPredicate() const
Definition: InstrTypes.h:814
llvm::MIToken::kw_successors
@ kw_successors
Definition: MILexer.h:122
llvm::MachineInstr::IsExact
@ IsExact
Definition: MachineInstr.h:106
llvm::MIToken::md_dilocation
@ md_dilocation
Definition: MILexer.h:142
llvm::MIToken::kw_basealign
@ kw_basealign
Definition: MILexer.h:108
llvm::dwarf::getAttributeEncoding
unsigned getAttributeEncoding(StringRef EncodingString)
Definition: Dwarf.cpp:208
llvm::MIToken::kw_frame_setup
@ kw_frame_setup
Definition: MILexer.h:63
llvm::MIToken::kw_debug_location
@ kw_debug_location
Definition: MILexer.h:76
llvm::Sched::Source
@ Source
Definition: TargetLowering.h:100
llvm::MachineOperand::CreateIntrinsicID
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
Definition: MachineOperand.h:919
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MIToken::kw_nsw
@ kw_nsw
Definition: MILexer.h:73
None.h
llvm::MachineOperand::CreateGA
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:850
DataLayout.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::MIToken::md_range
@ md_range
Definition: MILexer.h:140
llvm::CmpInst::ICMP_ULT
@ ICMP_ULT
unsigned less than
Definition: InstrTypes.h:745
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
llvm::MIToken::kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_aarch64_negate_ra_sign_state
Definition: MILexer.h:93
llvm::SourceMgr
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
Definition: SourceMgr.h:31
Number
uint32_t Number
Definition: Profile.cpp:47
uint32_t
llvm::MIToken::kw_intrinsic
@ kw_intrinsic
Definition: MILexer.h:95
parse
static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Definition: LineTable.cpp:54
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MachinePointerInfo::AddrSpace
unsigned AddrSpace
Definition: MachineMemOperand.h:47
llvm::MachineOperand::isDef
bool isDef() const
Definition: MachineOperand.h:375
llvm::MIToken::kw_bbsections
@ kw_bbsections
Definition: MILexer.h:129
llvm::MIToken::kw_implicit_define
@ kw_implicit_define
Definition: MILexer.h:52
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::MCCFIInstruction::createAdjustCfaOffset
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:532
llvm::MIToken::kw_ppc_fp128
@ kw_ppc_fp128
Definition: MILexer.h:102
llvm::MachineOperand::CreateCImm
static MachineOperand CreateCImm(const ConstantInt *CI)
Definition: MachineOperand.h:779
llvm::MDTuple::getTemporary
static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a temporary node.
Definition: Metadata.h:1220
llvm::PerTargetMIParsingState::setTarget
void setTarget(const TargetSubtargetInfo &NewSubtarget)
Definition: MIParser.cpp:86
LLVM_FALLTHROUGH
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:286
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::insert
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:207
llvm::MachineMemOperand::MOVolatile
@ MOVolatile
The memory access is volatile.
Definition: MachineMemOperand.h:139
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:59
MILexer.h
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:135
llvm::MIToken::kw_dereferenceable
@ kw_dereferenceable
Definition: MILexer.h:55
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MIToken::kw_jump_table
@ kw_jump_table
Definition: MILexer.h:112
llvm::AtomicOrdering::Release
@ Release
llvm::MIToken::kw_non_temporal
@ kw_non_temporal
Definition: MILexer.h:105
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MIToken::minus
@ minus
Definition: MILexer.h:46
llvm::MIToken::ExternalSymbol
@ ExternalSymbol
Definition: MILexer.h:154
llvm::PerFunctionMIParsingState
Definition: MIParser.h:162
llvm::MIToken::kw_target_flags
@ kw_target_flags
Definition: MILexer.h:103
llvm::CmpInst::FCMP_UGT
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:732
llvm::parseNamedRegisterReference
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3428
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::MDNode::replaceAllUsesWith
void replaceAllUsesWith(Metadata *MD)
RAUW a temporary.
Definition: Metadata.h:992
llvm::Function::getValueSymbolTable
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:726
llvm::PerFunctionMIParsingState::Slots2Values
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
Definition: MIParser.h:181
llvm::MIToken::NamedIRBlock
@ NamedIRBlock
Definition: MILexer.h:165
llvm::MemoryBuffer::getBufferStart
const char * getBufferStart() const
Definition: MemoryBuffer.h:65
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
llvm::MIToken::kw_floatpred
@ kw_floatpred
Definition: MILexer.h:123
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:596
llvm::StringRef::drop_front
LLVM_NODISCARD StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
Definition: StringRef.h:653
llvm::MIToken::coloncolon
@ coloncolon
Definition: MILexer.h:38
llvm::MIToken::rparen
@ rparen
Definition: MILexer.h:42
llvm::dwarf::getOperationEncoding
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:161
llvm::AAMDNodes::NoAlias
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:677
llvm::SlotMapping::GlobalValues
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:33
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:324
llvm::MBBSectionID::ColdSectionID
const static MBBSectionID ColdSectionID
Definition: MachineBasicBlock.h:64
llvm::MachineBasicBlock::insert
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Definition: MachineBasicBlock.cpp:1317
MachineFrameInfo.h
llvm::MIToken::kw_debug_instr_number
@ kw_debug_instr_number
Definition: MILexer.h:77
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
llvm::MIToken::kw_intpred
@ kw_intpred
Definition: MILexer.h:124
llvm::MIToken::MCSymbol
@ MCSymbol
Definition: MILexer.h:155
llvm::PerTargetMIParsingState::getSubRegIndex
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
Definition: MIParser.cpp:183
llvm::MIToken::greater
@ greater
Definition: MILexer.h:48
llvm::MIToken::exclaim
@ exclaim
Definition: MILexer.h:40
Casting.h
Function.h
llvm::MIToken::IntegerLiteral
@ IntegerLiteral
Definition: MILexer.h:158
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::MIToken::kw_align
@ kw_align
Definition: MILexer.h:107
llvm::RegState::Renamable
@ Renamable
Register that may be renamed.
Definition: MachineInstrBuilder.h:61
llvm::SourceMgr::DK_Error
@ DK_Error
Definition: SourceMgr.h:34
llvm::MachineInstr::FmNoNans
@ FmNoNans
Definition: MachineInstr.h:88
StringSwitch.h
llvm::MachineInstr::FmContract
@ FmContract
Definition: MachineInstr.h:96
SlotMapping.h
llvm::PerFunctionMIParsingState::MF
MachineFunction & MF
Definition: MIParser.h:164
llvm::MIToken::TokenKind
TokenKind
Definition: MILexer.h:27
llvm::CmpInst::ICMP_SGE
@ ICMP_SGE
signed greater or equal
Definition: InstrTypes.h:748
llvm::TargetRegisterInfo::getNumRegClasses
unsigned getNumRegClasses() const
Definition: TargetRegisterInfo.h:733
llvm::SourceMgr::GetMessage
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:262
llvm::MachineBasicBlock::normalizeSuccProbs
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
Definition: MachineBasicBlock.h:654
llvm::MIToken::kind
TokenKind kind() const
Definition: MILexer.h:190
llvm::MachineMemOperand::MOStore
@ MOStore
The memory access writes data.
Definition: MachineMemOperand.h:137
parseGlobalValue
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:2048
llvm::AAMDNodes::TBAA
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:668
llvm::parseVirtualRegisterReference
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3434
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:79
llvm::VRegInfo
Definition: MIParser.h:37
llvm::MIToken::QuotedIRValue
@ QuotedIRValue
Definition: MILexer.h:169
llvm::parseConstantValue
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:182
llvm::BranchProbability::getRaw
static BranchProbability getRaw(uint32_t N)
Definition: BranchProbability.h:54
llvm::PerTargetMIParsingState::getRegMask
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
Definition: MIParser.cpp:166
llvm::MIRFormatter
MIRFormater - Interface to format MIR operand based on target.
Definition: MIRFormatter.h:29
Instructions.h
llvm::MIToken::kw_custom
@ kw_custom
Definition: MILexer.h:115
llvm::MIToken::kw_stack
@ kw_stack
Definition: MILexer.h:110
llvm::MCCFIInstruction::createRegister
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:564
llvm::MIToken::kw_got
@ kw_got
Definition: MILexer.h:111
llvm::StringMapImpl::empty
bool empty() const
Definition: StringMap.h:92
SmallVector.h
llvm::MachineOperand::CreateRegMask
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
Definition: MachineOperand.h:886
llvm::MachineRegisterInfo::getType
LLT getType(Register Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.
Definition: MachineRegisterInfo.h:732
MachineInstrBuilder.h
llvm::MachineInstr::NoUWrap
@ NoUWrap
Definition: MachineInstr.h:102
llvm::MCCFIInstruction::createUndefined
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can't be restored anymore.
Definition: MCDwarf.h:588
llvm::VRegInfo::UNKNOWN
@ UNKNOWN
Definition: MIParser.h:39
RegisterBank.h
TargetIntrinsicInfo.h
llvm::CmpInst::ICMP_UGT
@ ICMP_UGT
unsigned greater than
Definition: InstrTypes.h:743
llvm::SMRange
Represents a range in source code.
Definition: SMLoc.h:48
llvm::CmpInst::FCMP_UNE
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:736
llvm::MIToken::is
bool is(TokenKind K) const
Definition: MILexer.h:217
llvm::MIToken::location
StringRef::iterator location() const
Definition: MILexer.h:221
llvm::PerFunctionMIParsingState::MBBSlots
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:172
llvm::MachineInstr::BundledSucc
@ BundledSucc
Definition: MachineInstr.h:87
llvm::BlockAddress::get
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1834
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
LaneBitmask.h
initSlots2BasicBlocks
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3353
llvm::MIToken::Identifier
@ Identifier
Definition: MILexer.h:145
llvm::MachineInstr::FmArcp
@ FmArcp
Definition: MachineInstr.h:94
ModuleSlotTracker.h
MachineMemOperand.h
llvm::CmpInst::FCMP_OLE
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:727
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::SMLoc::getFromPointer
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:36
MachineOperand.h
llvm::MIToken::rbrace
@ rbrace
Definition: MILexer.h:44
RegName
#define RegName(no)
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:549
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:42
llvm::parseRegisterReference
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3422
llvm::ValueSymbolTable::lookup
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
Definition: ValueSymbolTable.h:74
llvm::MCCFIInstruction::createRememberState
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:599
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::MIToken::kw_cfi_def_cfa_offset
@ kw_cfi_def_cfa_offset
Definition: MILexer.h:82
llvm::MIToken::less
@ less
Definition: MILexer.h:47
llvm::MIToken::kw_volatile
@ kw_volatile
Definition: MILexer.h:104
llvm::MIToken::kw_def
@ kw_def
Definition: MILexer.h:53
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MIToken::kw_landing_pad
@ kw_landing_pad
Definition: MILexer.h:118
llvm::TargetRegisterInfo::getSubRegIndexName
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
Definition: TargetRegisterInfo.h:367
llvm::PerTargetMIParsingState::getBitmaskTargetFlag
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
Definition: MIParser.cpp:244
llvm::PerTargetMIParsingState::getDirectTargetFlag
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
Definition: MIParser.cpp:222
raw_ostream.h
llvm::VRegInfo::Explicit
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:41
llvm::MIToken::kw_nuw
@ kw_nuw
Definition: MILexer.h:72
llvm::MIToken::plus
@ plus
Definition: MILexer.h:45
llvm::StringRef::size
LLVM_NODISCARD size_t size() const
size - Get the string size.
Definition: StringRef.h:157
MachineFunction.h
llvm::MIToken::md_alias_scope
@ md_alias_scope
Definition: MILexer.h:138
llvm::MIToken::kw_cfi_same_value
@ kw_cfi_same_value
Definition: MILexer.h:78
llvm::MIToken::NamedVirtualRegister
@ NamedVirtualRegister
Definition: MILexer.h:147
llvm::MachineInstr::BundledPred
@ BundledPred
Definition: MachineInstr.h:86
llvm::parseMBBReference
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3416
llvm::MIToken::kw_ehfunclet_entry
@ kw_ehfunclet_entry
Definition: MILexer.h:120
llvm::CmpInst::FCMP_TRUE
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:737
llvm::isPowerOf2_64
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
Definition: MathExtras.h:496
llvm::VRegInfo::GENERIC
@ GENERIC
Definition: MIParser.h:39
llvm::LLT::scalar
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Definition: LowLevelTypeImpl.h:43
Value.h
llvm::MachineMemOperand::MONone
@ MONone
Definition: MachineMemOperand.h:133
llvm::MIToken::kw_liveins
@ kw_liveins
Definition: MILexer.h:121
llvm::MIToken::kw_contract
@ kw_contract
Definition: MILexer.h:69
llvm::MachineOperand::CreatePredicate
static MachineOperand CreatePredicate(unsigned Pred)
Definition: MachineOperand.h:925
llvm::lexMIToken
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
llvm::MIToken::kw_cfi_rel_offset
@ kw_cfi_rel_offset
Definition: MILexer.h:80
llvm::MIToken::md_diexpr
@ md_diexpr
Definition: MILexer.h:141
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::MIToken::lparen
@ lparen
Definition: MILexer.h:41
llvm::MIToken::kw_address_taken
@ kw_address_taken
Definition: MILexer.h:117
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:314
llvm::MIToken::kw_undef
@ kw_undef
Definition: MILexer.h:57
llvm::SyncScope::System
@ System
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:58
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
llvm::LaneBitmask::getAll
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84
SubReg
unsigned SubReg
Definition: AArch64AdvSIMDScalarPass.cpp:104
llvm::CmpInst::BAD_FCMP_PREDICATE
@ BAD_FCMP_PREDICATE
Definition: InstrTypes.h:740
llvm::MachineOperand::CreateFPImm
static MachineOperand CreateFPImm(const ConstantFP *CFP)
Definition: MachineOperand.h:785
llvm::MCCFIInstruction::createWindowSave
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:570
llvm::MIToken::kw_blockaddress
@ kw_blockaddress
Definition: MILexer.h:94
llvm::MCInstrDesc::getImplicitUses
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction.
Definition: MCInstrDesc.h:559
llvm::MachineOperand::CreateTargetIndex
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:836
llvm::AtomicOrdering::NotAtomic
@ NotAtomic
llvm::Optional::getValue
constexpr const T & getValue() const LLVM_LVALUE_FUNCTION
Definition: Optional.h:282
llvm::CmpInst::FCMP_ORD
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:729
llvm::TargetRegisterInfo::getRegMasks
virtual ArrayRef< const uint32_t * > getRegMasks() const =0
Return all the call-preserved register masks defined for this target.
llvm::MachineInstr::setFlag
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:335
llvm::CmpInst::FCMP_UEQ
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:731
llvm::MachineOperand::isIdenticalTo
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
Definition: MachineOperand.cpp:287
MIParser.h
llvm::MachineOperand::CreateRegLiveOut
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
Definition: MachineOperand.h:892
llvm::MCInstrDesc::ImplicitDefs
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:205
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37
llvm::MCCFIInstruction::createRestore
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:582
getRegisterName
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
Definition: MIParser.cpp:1328
llvm::MIToken::kw_unknown_address
@ kw_unknown_address
Definition: MILexer.h:131
llvm::LLT
Definition: LowLevelTypeImpl.h:40