LLVM  15.0.0git
MIParser.cpp
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1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the parsing of machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "MILexer.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/APSInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/None.h"
20 #include "llvm/ADT/Optional.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringMap.h"
23 #include "llvm/ADT/StringRef.h"
24 #include "llvm/ADT/StringSwitch.h"
25 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
44 #include "llvm/IR/BasicBlock.h"
45 #include "llvm/IR/Constants.h"
46 #include "llvm/IR/DataLayout.h"
48 #include "llvm/IR/DebugLoc.h"
49 #include "llvm/IR/Function.h"
50 #include "llvm/IR/InstrTypes.h"
51 #include "llvm/IR/Instructions.h"
52 #include "llvm/IR/Intrinsics.h"
53 #include "llvm/IR/Metadata.h"
54 #include "llvm/IR/Module.h"
56 #include "llvm/IR/Type.h"
57 #include "llvm/IR/Value.h"
59 #include "llvm/MC/LaneBitmask.h"
60 #include "llvm/MC/MCContext.h"
61 #include "llvm/MC/MCDwarf.h"
62 #include "llvm/MC/MCInstrDesc.h"
65 #include "llvm/Support/Casting.h"
69 #include "llvm/Support/SMLoc.h"
70 #include "llvm/Support/SourceMgr.h"
73 #include <cassert>
74 #include <cctype>
75 #include <cstddef>
76 #include <cstdint>
77 #include <limits>
78 #include <string>
79 #include <utility>
80 
81 using namespace llvm;
82 
84  const TargetSubtargetInfo &NewSubtarget) {
85 
86  // If the subtarget changed, over conservatively assume everything is invalid.
87  if (&Subtarget == &NewSubtarget)
88  return;
89 
90  Names2InstrOpCodes.clear();
91  Names2Regs.clear();
92  Names2RegMasks.clear();
93  Names2SubRegIndices.clear();
94  Names2TargetIndices.clear();
95  Names2DirectTargetFlags.clear();
96  Names2BitmaskTargetFlags.clear();
97  Names2MMOTargetFlags.clear();
98 
99  initNames2RegClasses();
100  initNames2RegBanks();
101 }
102 
103 void PerTargetMIParsingState::initNames2Regs() {
104  if (!Names2Regs.empty())
105  return;
106 
107  // The '%noreg' register is the register 0.
108  Names2Regs.insert(std::make_pair("noreg", 0));
109  const auto *TRI = Subtarget.getRegisterInfo();
110  assert(TRI && "Expected target register info");
111 
112  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
113  bool WasInserted =
114  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
115  .second;
116  (void)WasInserted;
117  assert(WasInserted && "Expected registers to be unique case-insensitively");
118  }
119 }
120 
122  Register &Reg) {
123  initNames2Regs();
124  auto RegInfo = Names2Regs.find(RegName);
125  if (RegInfo == Names2Regs.end())
126  return true;
127  Reg = RegInfo->getValue();
128  return false;
129 }
130 
131 void PerTargetMIParsingState::initNames2InstrOpCodes() {
132  if (!Names2InstrOpCodes.empty())
133  return;
134  const auto *TII = Subtarget.getInstrInfo();
135  assert(TII && "Expected target instruction info");
136  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
137  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
138 }
139 
141  unsigned &OpCode) {
142  initNames2InstrOpCodes();
143  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
144  if (InstrInfo == Names2InstrOpCodes.end())
145  return true;
146  OpCode = InstrInfo->getValue();
147  return false;
148 }
149 
150 void PerTargetMIParsingState::initNames2RegMasks() {
151  if (!Names2RegMasks.empty())
152  return;
153  const auto *TRI = Subtarget.getRegisterInfo();
154  assert(TRI && "Expected target register info");
156  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
157  assert(RegMasks.size() == RegMaskNames.size());
158  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
159  Names2RegMasks.insert(
160  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
161 }
162 
164  initNames2RegMasks();
165  auto RegMaskInfo = Names2RegMasks.find(Identifier);
166  if (RegMaskInfo == Names2RegMasks.end())
167  return nullptr;
168  return RegMaskInfo->getValue();
169 }
170 
171 void PerTargetMIParsingState::initNames2SubRegIndices() {
172  if (!Names2SubRegIndices.empty())
173  return;
174  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
175  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
176  Names2SubRegIndices.insert(
177  std::make_pair(TRI->getSubRegIndexName(I), I));
178 }
179 
181  initNames2SubRegIndices();
182  auto SubRegInfo = Names2SubRegIndices.find(Name);
183  if (SubRegInfo == Names2SubRegIndices.end())
184  return 0;
185  return SubRegInfo->getValue();
186 }
187 
188 void PerTargetMIParsingState::initNames2TargetIndices() {
189  if (!Names2TargetIndices.empty())
190  return;
191  const auto *TII = Subtarget.getInstrInfo();
192  assert(TII && "Expected target instruction info");
193  auto Indices = TII->getSerializableTargetIndices();
194  for (const auto &I : Indices)
195  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
196 }
197 
199  initNames2TargetIndices();
200  auto IndexInfo = Names2TargetIndices.find(Name);
201  if (IndexInfo == Names2TargetIndices.end())
202  return true;
203  Index = IndexInfo->second;
204  return false;
205 }
206 
207 void PerTargetMIParsingState::initNames2DirectTargetFlags() {
208  if (!Names2DirectTargetFlags.empty())
209  return;
210 
211  const auto *TII = Subtarget.getInstrInfo();
212  assert(TII && "Expected target instruction info");
214  for (const auto &I : Flags)
215  Names2DirectTargetFlags.insert(
216  std::make_pair(StringRef(I.second), I.first));
217 }
218 
220  unsigned &Flag) {
221  initNames2DirectTargetFlags();
222  auto FlagInfo = Names2DirectTargetFlags.find(Name);
223  if (FlagInfo == Names2DirectTargetFlags.end())
224  return true;
225  Flag = FlagInfo->second;
226  return false;
227 }
228 
229 void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
230  if (!Names2BitmaskTargetFlags.empty())
231  return;
232 
233  const auto *TII = Subtarget.getInstrInfo();
234  assert(TII && "Expected target instruction info");
236  for (const auto &I : Flags)
237  Names2BitmaskTargetFlags.insert(
238  std::make_pair(StringRef(I.second), I.first));
239 }
240 
242  unsigned &Flag) {
243  initNames2BitmaskTargetFlags();
244  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
245  if (FlagInfo == Names2BitmaskTargetFlags.end())
246  return true;
247  Flag = FlagInfo->second;
248  return false;
249 }
250 
251 void PerTargetMIParsingState::initNames2MMOTargetFlags() {
252  if (!Names2MMOTargetFlags.empty())
253  return;
254 
255  const auto *TII = Subtarget.getInstrInfo();
256  assert(TII && "Expected target instruction info");
257  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
258  for (const auto &I : Flags)
259  Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));
260 }
261 
264  initNames2MMOTargetFlags();
265  auto FlagInfo = Names2MMOTargetFlags.find(Name);
266  if (FlagInfo == Names2MMOTargetFlags.end())
267  return true;
268  Flag = FlagInfo->second;
269  return false;
270 }
271 
272 void PerTargetMIParsingState::initNames2RegClasses() {
273  if (!Names2RegClasses.empty())
274  return;
275 
276  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
277  for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
278  const auto *RC = TRI->getRegClass(I);
279  Names2RegClasses.insert(
280  std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
281  }
282 }
283 
284 void PerTargetMIParsingState::initNames2RegBanks() {
285  if (!Names2RegBanks.empty())
286  return;
287 
288  const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
289  // If the target does not support GlobalISel, we may not have a
290  // register bank info.
291  if (!RBI)
292  return;
293 
294  for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
295  const auto &RegBank = RBI->getRegBank(I);
296  Names2RegBanks.insert(
297  std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
298  }
299 }
300 
301 const TargetRegisterClass *
303  auto RegClassInfo = Names2RegClasses.find(Name);
304  if (RegClassInfo == Names2RegClasses.end())
305  return nullptr;
306  return RegClassInfo->getValue();
307 }
308 
310  auto RegBankInfo = Names2RegBanks.find(Name);
311  if (RegBankInfo == Names2RegBanks.end())
312  return nullptr;
313  return RegBankInfo->getValue();
314 }
315 
317  SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &T)
318  : MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {
319 }
320 
322  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
323  if (I.second) {
325  VRegInfo *Info = new (Allocator) VRegInfo;
327  I.first->second = Info;
328  }
329  return *I.first->second;
330 }
331 
333  assert(RegName != "" && "Expected named reg.");
334 
335  auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
336  if (I.second) {
337  VRegInfo *Info = new (Allocator) VRegInfo;
339  I.first->second = Info;
340  }
341  return *I.first->second;
342 }
343 
344 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
345  DenseMap<unsigned, const Value *> &Slots2Values) {
346  int Slot = MST.getLocalSlot(V);
347  if (Slot == -1)
348  return;
349  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
350 }
351 
352 /// Creates the mapping from slot numbers to function's unnamed IR values.
353 static void initSlots2Values(const Function &F,
354  DenseMap<unsigned, const Value *> &Slots2Values) {
355  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
356  MST.incorporateFunction(F);
357  for (const auto &Arg : F.args())
358  mapValueToSlot(&Arg, MST, Slots2Values);
359  for (const auto &BB : F) {
360  mapValueToSlot(&BB, MST, Slots2Values);
361  for (const auto &I : BB)
362  mapValueToSlot(&I, MST, Slots2Values);
363  }
364 }
365 
367  if (Slots2Values.empty())
369  return Slots2Values.lookup(Slot);
370 }
371 
372 namespace {
373 
374 /// A wrapper struct around the 'MachineOperand' struct that includes a source
375 /// range and other attributes.
376 struct ParsedMachineOperand {
377  MachineOperand Operand;
378  StringRef::iterator Begin;
380  Optional<unsigned> TiedDefIdx;
381 
382  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
383  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
384  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
385  if (TiedDefIdx)
386  assert(Operand.isReg() && Operand.isUse() &&
387  "Only used register operands can be tied");
388  }
389 };
390 
391 class MIParser {
392  MachineFunction &MF;
394  StringRef Source, CurrentSource;
395  SMRange SourceRange;
396  MIToken Token;
398  /// Maps from slot numbers to function's unnamed basic blocks.
399  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
400 
401 public:
403  StringRef Source);
405  StringRef Source, SMRange SourceRange);
406 
407  /// \p SkipChar gives the number of characters to skip before looking
408  /// for the next token.
409  void lex(unsigned SkipChar = 0);
410 
411  /// Report an error at the current location with the given message.
412  ///
413  /// This function always return true.
414  bool error(const Twine &Msg);
415 
416  /// Report an error at the given location with the given message.
417  ///
418  /// This function always return true.
419  bool error(StringRef::iterator Loc, const Twine &Msg);
420 
421  bool
422  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
423  bool parseBasicBlocks();
424  bool parse(MachineInstr *&MI);
425  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
426  bool parseStandaloneNamedRegister(Register &Reg);
427  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
428  bool parseStandaloneRegister(Register &Reg);
429  bool parseStandaloneStackObject(int &FI);
430  bool parseStandaloneMDNode(MDNode *&Node);
431  bool parseMachineMetadata();
432  bool parseMDTuple(MDNode *&MD, bool IsDistinct);
433  bool parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts);
434  bool parseMetadata(Metadata *&MD);
435 
436  bool
437  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
438  bool parseBasicBlock(MachineBasicBlock &MBB,
439  MachineBasicBlock *&AddFalthroughFrom);
440  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
441  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
442 
443  bool parseNamedRegister(Register &Reg);
444  bool parseVirtualRegister(VRegInfo *&Info);
445  bool parseNamedVirtualRegister(VRegInfo *&Info);
446  bool parseRegister(Register &Reg, VRegInfo *&VRegInfo);
447  bool parseRegisterFlag(unsigned &Flags);
448  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
449  bool parseSubRegisterIndex(unsigned &SubReg);
450  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
451  bool parseRegisterOperand(MachineOperand &Dest,
452  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
453  bool parseImmediateOperand(MachineOperand &Dest);
454  bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
455  const Constant *&C);
456  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
457  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
458  bool parseTypedImmediateOperand(MachineOperand &Dest);
459  bool parseFPImmediateOperand(MachineOperand &Dest);
461  bool parseMBBOperand(MachineOperand &Dest);
462  bool parseStackFrameIndex(int &FI);
463  bool parseStackObjectOperand(MachineOperand &Dest);
464  bool parseFixedStackFrameIndex(int &FI);
465  bool parseFixedStackObjectOperand(MachineOperand &Dest);
466  bool parseGlobalValue(GlobalValue *&GV);
467  bool parseGlobalAddressOperand(MachineOperand &Dest);
468  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
469  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
470  bool parseJumpTableIndexOperand(MachineOperand &Dest);
471  bool parseExternalSymbolOperand(MachineOperand &Dest);
472  bool parseMCSymbolOperand(MachineOperand &Dest);
473  bool parseMDNode(MDNode *&Node);
474  bool parseDIExpression(MDNode *&Expr);
475  bool parseDILocation(MDNode *&Expr);
476  bool parseMetadataOperand(MachineOperand &Dest);
477  bool parseCFIOffset(int &Offset);
478  bool parseCFIRegister(Register &Reg);
479  bool parseCFIAddressSpace(unsigned &AddressSpace);
480  bool parseCFIEscapeValues(std::string& Values);
481  bool parseCFIOperand(MachineOperand &Dest);
482  bool parseIRBlock(BasicBlock *&BB, const Function &F);
483  bool parseBlockAddressOperand(MachineOperand &Dest);
484  bool parseIntrinsicOperand(MachineOperand &Dest);
485  bool parsePredicateOperand(MachineOperand &Dest);
486  bool parseShuffleMaskOperand(MachineOperand &Dest);
487  bool parseTargetIndexOperand(MachineOperand &Dest);
488  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
489  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
490  bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
491  MachineOperand &Dest,
492  Optional<unsigned> &TiedDefIdx);
493  bool parseMachineOperandAndTargetFlags(const unsigned OpCode,
494  const unsigned OpIdx,
495  MachineOperand &Dest,
496  Optional<unsigned> &TiedDefIdx);
497  bool parseOffset(int64_t &Offset);
498  bool parseAlignment(uint64_t &Alignment);
499  bool parseAddrspace(unsigned &Addrspace);
500  bool parseSectionID(Optional<MBBSectionID> &SID);
501  bool parseOperandsOffset(MachineOperand &Op);
502  bool parseIRValue(const Value *&V);
503  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
504  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
505  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
506  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
507  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
508  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
509  bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
510  bool parseHeapAllocMarker(MDNode *&Node);
511 
512  bool parseTargetImmMnemonic(const unsigned OpCode, const unsigned OpIdx,
513  MachineOperand &Dest, const MIRFormatter &MF);
514 
515 private:
516  /// Convert the integer literal in the current token into an unsigned integer.
517  ///
518  /// Return true if an error occurred.
519  bool getUnsigned(unsigned &Result);
520 
521  /// Convert the integer literal in the current token into an uint64.
522  ///
523  /// Return true if an error occurred.
524  bool getUint64(uint64_t &Result);
525 
526  /// Convert the hexadecimal literal in the current token into an unsigned
527  /// APInt with a minimum bitwidth required to represent the value.
528  ///
529  /// Return true if the literal does not represent an integer value.
530  bool getHexUint(APInt &Result);
531 
532  /// If the current token is of the given kind, consume it and return false.
533  /// Otherwise report an error and return true.
534  bool expectAndConsume(MIToken::TokenKind TokenKind);
535 
536  /// If the current token is of the given kind, consume it and return true.
537  /// Otherwise return false.
538  bool consumeIfPresent(MIToken::TokenKind TokenKind);
539 
540  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
541 
542  bool assignRegisterTies(MachineInstr &MI,
544 
545  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
546  const MCInstrDesc &MCID);
547 
548  const BasicBlock *getIRBlock(unsigned Slot);
549  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
550 
551  /// Get or create an MCSymbol for a given name.
552  MCSymbol *getOrCreateMCSymbol(StringRef Name);
553 
554  /// parseStringConstant
555  /// ::= StringConstant
556  bool parseStringConstant(std::string &Result);
557 
558  /// Map the location in the MI string to the corresponding location specified
559  /// in `SourceRange`.
560  SMLoc mapSMLoc(StringRef::iterator Loc);
561 };
562 
563 } // end anonymous namespace
564 
565 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
567  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
568 {}
569 
570 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
571  StringRef Source, SMRange SourceRange)
572  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source),
573  SourceRange(SourceRange), PFS(PFS) {}
574 
575 void MIParser::lex(unsigned SkipChar) {
576  CurrentSource = lexMIToken(
577  CurrentSource.slice(SkipChar, StringRef::npos), Token,
578  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
579 }
580 
581 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
582 
583 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
584  const SourceMgr &SM = *PFS.SM;
585  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
586  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
587  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
588  // Create an ordinary diagnostic when the source manager's buffer is the
589  // source string.
591  return true;
592  }
593  // Create a diagnostic for a YAML string literal.
594  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
595  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
596  Source, None, None);
597  return true;
598 }
599 
600 SMLoc MIParser::mapSMLoc(StringRef::iterator Loc) {
601  assert(SourceRange.isValid() && "Invalid source range");
602  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
603  return SMLoc::getFromPointer(SourceRange.Start.getPointer() +
604  (Loc - Source.data()));
605 }
606 
607 typedef function_ref<bool(StringRef::iterator Loc, const Twine &)>
609 
610 static const char *toString(MIToken::TokenKind TokenKind) {
611  switch (TokenKind) {
612  case MIToken::comma:
613  return "','";
614  case MIToken::equal:
615  return "'='";
616  case MIToken::colon:
617  return "':'";
618  case MIToken::lparen:
619  return "'('";
620  case MIToken::rparen:
621  return "')'";
622  default:
623  return "<unknown token>";
624  }
625 }
626 
627 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
628  if (Token.isNot(TokenKind))
629  return error(Twine("expected ") + toString(TokenKind));
630  lex();
631  return false;
632 }
633 
634 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
635  if (Token.isNot(TokenKind))
636  return false;
637  lex();
638  return true;
639 }
640 
641 // Parse Machine Basic Block Section ID.
642 bool MIParser::parseSectionID(Optional<MBBSectionID> &SID) {
643  assert(Token.is(MIToken::kw_bbsections));
644  lex();
645  if (Token.is(MIToken::IntegerLiteral)) {
646  unsigned Value = 0;
647  if (getUnsigned(Value))
648  return error("Unknown Section ID");
649  SID = MBBSectionID{Value};
650  } else {
651  const StringRef &S = Token.stringValue();
652  if (S == "Exception")
654  else if (S == "Cold")
656  else
657  return error("Unknown Section ID");
658  }
659  lex();
660  return false;
661 }
662 
663 bool MIParser::parseBasicBlockDefinition(
666  unsigned ID = 0;
667  if (getUnsigned(ID))
668  return true;
669  auto Loc = Token.location();
670  auto Name = Token.stringValue();
671  lex();
672  bool HasAddressTaken = false;
673  bool IsLandingPad = false;
674  bool IsInlineAsmBrIndirectTarget = false;
675  bool IsEHFuncletEntry = false;
676  Optional<MBBSectionID> SectionID;
677  uint64_t Alignment = 0;
678  BasicBlock *BB = nullptr;
679  if (consumeIfPresent(MIToken::lparen)) {
680  do {
681  // TODO: Report an error when multiple same attributes are specified.
682  switch (Token.kind()) {
684  HasAddressTaken = true;
685  lex();
686  break;
688  IsLandingPad = true;
689  lex();
690  break;
692  IsInlineAsmBrIndirectTarget = true;
693  lex();
694  break;
696  IsEHFuncletEntry = true;
697  lex();
698  break;
699  case MIToken::kw_align:
700  if (parseAlignment(Alignment))
701  return true;
702  break;
703  case MIToken::IRBlock:
704  // TODO: Report an error when both name and ir block are specified.
705  if (parseIRBlock(BB, MF.getFunction()))
706  return true;
707  lex();
708  break;
710  if (parseSectionID(SectionID))
711  return true;
712  break;
713  default:
714  break;
715  }
716  } while (consumeIfPresent(MIToken::comma));
717  if (expectAndConsume(MIToken::rparen))
718  return true;
719  }
720  if (expectAndConsume(MIToken::colon))
721  return true;
722 
723  if (!Name.empty()) {
724  BB = dyn_cast_or_null<BasicBlock>(
725  MF.getFunction().getValueSymbolTable()->lookup(Name));
726  if (!BB)
727  return error(Loc, Twine("basic block '") + Name +
728  "' is not defined in the function '" +
729  MF.getName() + "'");
730  }
731  auto *MBB = MF.CreateMachineBasicBlock(BB);
732  MF.insert(MF.end(), MBB);
733  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
734  if (!WasInserted)
735  return error(Loc, Twine("redefinition of machine basic block with id #") +
736  Twine(ID));
737  if (Alignment)
738  MBB->setAlignment(Align(Alignment));
739  if (HasAddressTaken)
741  MBB->setIsEHPad(IsLandingPad);
742  MBB->setIsInlineAsmBrIndirectTarget(IsInlineAsmBrIndirectTarget);
743  MBB->setIsEHFuncletEntry(IsEHFuncletEntry);
744  if (SectionID.hasValue()) {
745  MBB->setSectionID(SectionID.getValue());
746  MF.setBBSectionsType(BasicBlockSection::List);
747  }
748  return false;
749 }
750 
751 bool MIParser::parseBasicBlockDefinitions(
753  lex();
754  // Skip until the first machine basic block.
755  while (Token.is(MIToken::Newline))
756  lex();
757  if (Token.isErrorOrEOF())
758  return Token.isError();
759  if (Token.isNot(MIToken::MachineBasicBlockLabel))
760  return error("expected a basic block definition before instructions");
761  unsigned BraceDepth = 0;
762  do {
763  if (parseBasicBlockDefinition(MBBSlots))
764  return true;
765  bool IsAfterNewline = false;
766  // Skip until the next machine basic block.
767  while (true) {
768  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
769  Token.isErrorOrEOF())
770  break;
771  else if (Token.is(MIToken::MachineBasicBlockLabel))
772  return error("basic block definition should be located at the start of "
773  "the line");
774  else if (consumeIfPresent(MIToken::Newline)) {
775  IsAfterNewline = true;
776  continue;
777  }
778  IsAfterNewline = false;
779  if (Token.is(MIToken::lbrace))
780  ++BraceDepth;
781  if (Token.is(MIToken::rbrace)) {
782  if (!BraceDepth)
783  return error("extraneous closing brace ('}')");
784  --BraceDepth;
785  }
786  lex();
787  }
788  // Verify that we closed all of the '{' at the end of a file or a block.
789  if (!Token.isError() && BraceDepth)
790  return error("expected '}'"); // FIXME: Report a note that shows '{'.
791  } while (!Token.isErrorOrEOF());
792  return Token.isError();
793 }
794 
795 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
796  assert(Token.is(MIToken::kw_liveins));
797  lex();
798  if (expectAndConsume(MIToken::colon))
799  return true;
800  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
801  return false;
802  do {
803  if (Token.isNot(MIToken::NamedRegister))
804  return error("expected a named register");
805  Register Reg;
806  if (parseNamedRegister(Reg))
807  return true;
808  lex();
810  if (consumeIfPresent(MIToken::colon)) {
811  // Parse lane mask.
812  if (Token.isNot(MIToken::IntegerLiteral) &&
813  Token.isNot(MIToken::HexLiteral))
814  return error("expected a lane mask");
815  static_assert(sizeof(LaneBitmask::Type) == sizeof(uint64_t),
816  "Use correct get-function for lane mask");
818  if (getUint64(V))
819  return error("invalid lane mask value");
820  Mask = LaneBitmask(V);
821  lex();
822  }
823  MBB.addLiveIn(Reg, Mask);
824  } while (consumeIfPresent(MIToken::comma));
825  return false;
826 }
827 
828 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
829  assert(Token.is(MIToken::kw_successors));
830  lex();
831  if (expectAndConsume(MIToken::colon))
832  return true;
833  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
834  return false;
835  do {
836  if (Token.isNot(MIToken::MachineBasicBlock))
837  return error("expected a machine basic block reference");
838  MachineBasicBlock *SuccMBB = nullptr;
839  if (parseMBBReference(SuccMBB))
840  return true;
841  lex();
842  unsigned Weight = 0;
843  if (consumeIfPresent(MIToken::lparen)) {
844  if (Token.isNot(MIToken::IntegerLiteral) &&
845  Token.isNot(MIToken::HexLiteral))
846  return error("expected an integer literal after '('");
847  if (getUnsigned(Weight))
848  return true;
849  lex();
850  if (expectAndConsume(MIToken::rparen))
851  return true;
852  }
853  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
854  } while (consumeIfPresent(MIToken::comma));
856  return false;
857 }
858 
859 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
860  MachineBasicBlock *&AddFalthroughFrom) {
861  // Skip the definition.
863  lex();
864  if (consumeIfPresent(MIToken::lparen)) {
865  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
866  lex();
867  consumeIfPresent(MIToken::rparen);
868  }
869  consumeIfPresent(MIToken::colon);
870 
871  // Parse the liveins and successors.
872  // N.B: Multiple lists of successors and liveins are allowed and they're
873  // merged into one.
874  // Example:
875  // liveins: $edi
876  // liveins: $esi
877  //
878  // is equivalent to
879  // liveins: $edi, $esi
880  bool ExplicitSuccessors = false;
881  while (true) {
882  if (Token.is(MIToken::kw_successors)) {
883  if (parseBasicBlockSuccessors(MBB))
884  return true;
885  ExplicitSuccessors = true;
886  } else if (Token.is(MIToken::kw_liveins)) {
887  if (parseBasicBlockLiveins(MBB))
888  return true;
889  } else if (consumeIfPresent(MIToken::Newline)) {
890  continue;
891  } else
892  break;
893  if (!Token.isNewlineOrEOF())
894  return error("expected line break at the end of a list");
895  lex();
896  }
897 
898  // Parse the instructions.
899  bool IsInBundle = false;
900  MachineInstr *PrevMI = nullptr;
901  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
902  !Token.is(MIToken::Eof)) {
903  if (consumeIfPresent(MIToken::Newline))
904  continue;
905  if (consumeIfPresent(MIToken::rbrace)) {
906  // The first parsing pass should verify that all closing '}' have an
907  // opening '{'.
908  assert(IsInBundle);
909  IsInBundle = false;
910  continue;
911  }
912  MachineInstr *MI = nullptr;
913  if (parse(MI))
914  return true;
915  MBB.insert(MBB.end(), MI);
916  if (IsInBundle) {
918  MI->setFlag(MachineInstr::BundledPred);
919  }
920  PrevMI = MI;
921  if (Token.is(MIToken::lbrace)) {
922  if (IsInBundle)
923  return error("nested instruction bundles are not allowed");
924  lex();
925  // This instruction is the start of the bundle.
926  MI->setFlag(MachineInstr::BundledSucc);
927  IsInBundle = true;
928  if (!Token.is(MIToken::Newline))
929  // The next instruction can be on the same line.
930  continue;
931  }
932  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
933  lex();
934  }
935 
936  // Construct successor list by searching for basic block machine operands.
937  if (!ExplicitSuccessors) {
939  bool IsFallthrough;
940  guessSuccessors(MBB, Successors, IsFallthrough);
941  for (MachineBasicBlock *Succ : Successors)
942  MBB.addSuccessor(Succ);
943 
944  if (IsFallthrough) {
945  AddFalthroughFrom = &MBB;
946  } else {
948  }
949  }
950 
951  return false;
952 }
953 
954 bool MIParser::parseBasicBlocks() {
955  lex();
956  // Skip until the first machine basic block.
957  while (Token.is(MIToken::Newline))
958  lex();
959  if (Token.isErrorOrEOF())
960  return Token.isError();
961  // The first parsing pass should have verified that this token is a MBB label
962  // in the 'parseBasicBlockDefinitions' method.
964  MachineBasicBlock *AddFalthroughFrom = nullptr;
965  do {
966  MachineBasicBlock *MBB = nullptr;
967  if (parseMBBReference(MBB))
968  return true;
969  if (AddFalthroughFrom) {
970  if (!AddFalthroughFrom->isSuccessor(MBB))
971  AddFalthroughFrom->addSuccessor(MBB);
972  AddFalthroughFrom->normalizeSuccProbs();
973  AddFalthroughFrom = nullptr;
974  }
975  if (parseBasicBlock(*MBB, AddFalthroughFrom))
976  return true;
977  // The method 'parseBasicBlock' should parse the whole block until the next
978  // block or the end of file.
979  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
980  } while (Token.isNot(MIToken::Eof));
981  return false;
982 }
983 
985  // Parse any register operands before '='
988  while (Token.isRegister() || Token.isRegisterFlag()) {
989  auto Loc = Token.location();
990  Optional<unsigned> TiedDefIdx;
991  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
992  return true;
993  Operands.push_back(
994  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
995  if (Token.isNot(MIToken::comma))
996  break;
997  lex();
998  }
999  if (!Operands.empty() && expectAndConsume(MIToken::equal))
1000  return true;
1001 
1002  unsigned OpCode, Flags = 0;
1003  if (Token.isError() || parseInstruction(OpCode, Flags))
1004  return true;
1005 
1006  // Parse the remaining machine operands.
1007  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
1008  Token.isNot(MIToken::kw_post_instr_symbol) &&
1009  Token.isNot(MIToken::kw_heap_alloc_marker) &&
1010  Token.isNot(MIToken::kw_debug_location) &&
1011  Token.isNot(MIToken::kw_debug_instr_number) &&
1012  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
1013  auto Loc = Token.location();
1014  Optional<unsigned> TiedDefIdx;
1015  if (parseMachineOperandAndTargetFlags(OpCode, Operands.size(), MO, TiedDefIdx))
1016  return true;
1017  Operands.push_back(
1018  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1019  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
1020  Token.is(MIToken::lbrace))
1021  break;
1022  if (Token.isNot(MIToken::comma))
1023  return error("expected ',' before the next machine operand");
1024  lex();
1025  }
1026 
1027  MCSymbol *PreInstrSymbol = nullptr;
1028  if (Token.is(MIToken::kw_pre_instr_symbol))
1029  if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1030  return true;
1031  MCSymbol *PostInstrSymbol = nullptr;
1032  if (Token.is(MIToken::kw_post_instr_symbol))
1033  if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1034  return true;
1035  MDNode *HeapAllocMarker = nullptr;
1036  if (Token.is(MIToken::kw_heap_alloc_marker))
1037  if (parseHeapAllocMarker(HeapAllocMarker))
1038  return true;
1039 
1040  unsigned InstrNum = 0;
1041  if (Token.is(MIToken::kw_debug_instr_number)) {
1042  lex();
1043  if (Token.isNot(MIToken::IntegerLiteral))
1044  return error("expected an integer literal after 'debug-instr-number'");
1045  if (getUnsigned(InstrNum))
1046  return true;
1047  lex();
1048  // Lex past trailing comma if present.
1049  if (Token.is(MIToken::comma))
1050  lex();
1051  }
1052 
1053  DebugLoc DebugLocation;
1054  if (Token.is(MIToken::kw_debug_location)) {
1055  lex();
1056  MDNode *Node = nullptr;
1057  if (Token.is(MIToken::exclaim)) {
1058  if (parseMDNode(Node))
1059  return true;
1060  } else if (Token.is(MIToken::md_dilocation)) {
1061  if (parseDILocation(Node))
1062  return true;
1063  } else
1064  return error("expected a metadata node after 'debug-location'");
1065  if (!isa<DILocation>(Node))
1066  return error("referenced metadata is not a DILocation");
1067  DebugLocation = DebugLoc(Node);
1068  }
1069 
1070  // Parse the machine memory operands.
1072  if (Token.is(MIToken::coloncolon)) {
1073  lex();
1074  while (!Token.isNewlineOrEOF()) {
1075  MachineMemOperand *MemOp = nullptr;
1076  if (parseMachineMemoryOperand(MemOp))
1077  return true;
1078  MemOperands.push_back(MemOp);
1079  if (Token.isNewlineOrEOF())
1080  break;
1081  if (Token.isNot(MIToken::comma))
1082  return error("expected ',' before the next machine memory operand");
1083  lex();
1084  }
1085  }
1086 
1087  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1088  if (!MCID.isVariadic()) {
1089  // FIXME: Move the implicit operand verification to the machine verifier.
1090  if (verifyImplicitOperands(Operands, MCID))
1091  return true;
1092  }
1093 
1094  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
1095  MI->setFlags(Flags);
1096 
1097  unsigned NumExplicitOps = 0;
1098  for (const auto &Operand : Operands) {
1099  bool IsImplicitOp = Operand.Operand.isReg() && Operand.Operand.isImplicit();
1100  if (!IsImplicitOp) {
1101  if (!MCID.isVariadic() && NumExplicitOps >= MCID.getNumOperands() &&
1102  !Operand.Operand.isValidExcessOperand())
1103  return error(Operand.Begin, "too many operands for instruction");
1104 
1105  ++NumExplicitOps;
1106  }
1107 
1108  MI->addOperand(MF, Operand.Operand);
1109  }
1110 
1111  if (assignRegisterTies(*MI, Operands))
1112  return true;
1113  if (PreInstrSymbol)
1114  MI->setPreInstrSymbol(MF, PreInstrSymbol);
1115  if (PostInstrSymbol)
1116  MI->setPostInstrSymbol(MF, PostInstrSymbol);
1117  if (HeapAllocMarker)
1118  MI->setHeapAllocMarker(MF, HeapAllocMarker);
1119  if (!MemOperands.empty())
1120  MI->setMemRefs(MF, MemOperands);
1121  if (InstrNum)
1122  MI->setDebugInstrNum(InstrNum);
1123  return false;
1124 }
1125 
1126 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
1127  lex();
1128  if (Token.isNot(MIToken::MachineBasicBlock))
1129  return error("expected a machine basic block reference");
1130  if (parseMBBReference(MBB))
1131  return true;
1132  lex();
1133  if (Token.isNot(MIToken::Eof))
1134  return error(
1135  "expected end of string after the machine basic block reference");
1136  return false;
1137 }
1138 
1139 bool MIParser::parseStandaloneNamedRegister(Register &Reg) {
1140  lex();
1141  if (Token.isNot(MIToken::NamedRegister))
1142  return error("expected a named register");
1143  if (parseNamedRegister(Reg))
1144  return true;
1145  lex();
1146  if (Token.isNot(MIToken::Eof))
1147  return error("expected end of string after the register reference");
1148  return false;
1149 }
1150 
1151 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
1152  lex();
1153  if (Token.isNot(MIToken::VirtualRegister))
1154  return error("expected a virtual register");
1155  if (parseVirtualRegister(Info))
1156  return true;
1157  lex();
1158  if (Token.isNot(MIToken::Eof))
1159  return error("expected end of string after the register reference");
1160  return false;
1161 }
1162 
1163 bool MIParser::parseStandaloneRegister(Register &Reg) {
1164  lex();
1165  if (Token.isNot(MIToken::NamedRegister) &&
1166  Token.isNot(MIToken::VirtualRegister))
1167  return error("expected either a named or virtual register");
1168 
1169  VRegInfo *Info;
1170  if (parseRegister(Reg, Info))
1171  return true;
1172 
1173  lex();
1174  if (Token.isNot(MIToken::Eof))
1175  return error("expected end of string after the register reference");
1176  return false;
1177 }
1178 
1179 bool MIParser::parseStandaloneStackObject(int &FI) {
1180  lex();
1181  if (Token.isNot(MIToken::StackObject))
1182  return error("expected a stack object");
1183  if (parseStackFrameIndex(FI))
1184  return true;
1185  if (Token.isNot(MIToken::Eof))
1186  return error("expected end of string after the stack object reference");
1187  return false;
1188 }
1189 
1190 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
1191  lex();
1192  if (Token.is(MIToken::exclaim)) {
1193  if (parseMDNode(Node))
1194  return true;
1195  } else if (Token.is(MIToken::md_diexpr)) {
1196  if (parseDIExpression(Node))
1197  return true;
1198  } else if (Token.is(MIToken::md_dilocation)) {
1199  if (parseDILocation(Node))
1200  return true;
1201  } else
1202  return error("expected a metadata node");
1203  if (Token.isNot(MIToken::Eof))
1204  return error("expected end of string after the metadata node");
1205  return false;
1206 }
1207 
1209  lex();
1210  if (Token.isNot(MIToken::exclaim))
1211  return error("expected a metadata node");
1212 
1213  lex();
1214  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1215  return error("expected metadata id after '!'");
1216  unsigned ID = 0;
1217  if (getUnsigned(ID))
1218  return true;
1219  lex();
1220  if (expectAndConsume(MIToken::equal))
1221  return true;
1222  bool IsDistinct = Token.is(MIToken::kw_distinct);
1223  if (IsDistinct)
1224  lex();
1225  if (Token.isNot(MIToken::exclaim))
1226  return error("expected a metadata node");
1227  lex();
1228 
1229  MDNode *MD;
1230  if (parseMDTuple(MD, IsDistinct))
1231  return true;
1232 
1233  auto FI = PFS.MachineForwardRefMDNodes.find(ID);
1234  if (FI != PFS.MachineForwardRefMDNodes.end()) {
1235  FI->second.first->replaceAllUsesWith(MD);
1236  PFS.MachineForwardRefMDNodes.erase(FI);
1237 
1238  assert(PFS.MachineMetadataNodes[ID] == MD && "Tracking VH didn't work");
1239  } else {
1240  if (PFS.MachineMetadataNodes.count(ID))
1241  return error("Metadata id is already used");
1242  PFS.MachineMetadataNodes[ID].reset(MD);
1243  }
1244 
1245  return false;
1246 }
1247 
1248 bool MIParser::parseMDTuple(MDNode *&MD, bool IsDistinct) {
1250  if (parseMDNodeVector(Elts))
1251  return true;
1252  MD = (IsDistinct ? MDTuple::getDistinct
1253  : MDTuple::get)(MF.getFunction().getContext(), Elts);
1254  return false;
1255 }
1256 
1257 bool MIParser::parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts) {
1258  if (Token.isNot(MIToken::lbrace))
1259  return error("expected '{' here");
1260  lex();
1261 
1262  if (Token.is(MIToken::rbrace)) {
1263  lex();
1264  return false;
1265  }
1266 
1267  do {
1268  Metadata *MD;
1269  if (parseMetadata(MD))
1270  return true;
1271 
1272  Elts.push_back(MD);
1273 
1274  if (Token.isNot(MIToken::comma))
1275  break;
1276  lex();
1277  } while (true);
1278 
1279  if (Token.isNot(MIToken::rbrace))
1280  return error("expected end of metadata node");
1281  lex();
1282 
1283  return false;
1284 }
1285 
1286 // ::= !42
1287 // ::= !"string"
1288 bool MIParser::parseMetadata(Metadata *&MD) {
1289  if (Token.isNot(MIToken::exclaim))
1290  return error("expected '!' here");
1291  lex();
1292 
1293  if (Token.is(MIToken::StringConstant)) {
1294  std::string Str;
1295  if (parseStringConstant(Str))
1296  return true;
1297  MD = MDString::get(MF.getFunction().getContext(), Str);
1298  return false;
1299  }
1300 
1301  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1302  return error("expected metadata id after '!'");
1303 
1304  SMLoc Loc = mapSMLoc(Token.location());
1305 
1306  unsigned ID = 0;
1307  if (getUnsigned(ID))
1308  return true;
1309  lex();
1310 
1311  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1312  if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
1313  MD = NodeInfo->second.get();
1314  return false;
1315  }
1316  // Check machine metadata.
1317  NodeInfo = PFS.MachineMetadataNodes.find(ID);
1318  if (NodeInfo != PFS.MachineMetadataNodes.end()) {
1319  MD = NodeInfo->second.get();
1320  return false;
1321  }
1322  // Forward reference.
1323  auto &FwdRef = PFS.MachineForwardRefMDNodes[ID];
1324  FwdRef = std::make_pair(
1325  MDTuple::getTemporary(MF.getFunction().getContext(), None), Loc);
1326  PFS.MachineMetadataNodes[ID].reset(FwdRef.first.get());
1327  MD = FwdRef.first.get();
1328 
1329  return false;
1330 }
1331 
1332 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
1333  assert(MO.isImplicit());
1334  return MO.isDef() ? "implicit-def" : "implicit";
1335 }
1336 
1337 static std::string getRegisterName(const TargetRegisterInfo *TRI,
1338  Register Reg) {
1339  assert(Register::isPhysicalRegister(Reg) && "expected phys reg");
1340  return StringRef(TRI->getName(Reg)).lower();
1341 }
1342 
1343 /// Return true if the parsed machine operands contain a given machine operand.
1344 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
1346  for (const auto &I : Operands) {
1347  if (ImplicitOperand.isIdenticalTo(I.Operand))
1348  return true;
1349  }
1350  return false;
1351 }
1352 
1353 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
1354  const MCInstrDesc &MCID) {
1355  if (MCID.isCall())
1356  // We can't verify call instructions as they can contain arbitrary implicit
1357  // register and register mask operands.
1358  return false;
1359 
1360  // Gather all the expected implicit operands.
1361  SmallVector<MachineOperand, 4> ImplicitOperands;
1362  if (MCID.ImplicitDefs)
1363  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
1364  ImplicitOperands.push_back(
1365  MachineOperand::CreateReg(*ImpDefs, true, true));
1366  if (MCID.ImplicitUses)
1367  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
1368  ImplicitOperands.push_back(
1369  MachineOperand::CreateReg(*ImpUses, false, true));
1370 
1371  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1372  assert(TRI && "Expected target register info");
1373  for (const auto &I : ImplicitOperands) {
1375  continue;
1376  return error(Operands.empty() ? Token.location() : Operands.back().End,
1377  Twine("missing implicit register operand '") +
1378  printImplicitRegisterFlag(I) + " $" +
1379  getRegisterName(TRI, I.getReg()) + "'");
1380  }
1381  return false;
1382 }
1383 
1384 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
1385  // Allow frame and fast math flags for OPCODE
1386  while (Token.is(MIToken::kw_frame_setup) ||
1387  Token.is(MIToken::kw_frame_destroy) ||
1388  Token.is(MIToken::kw_nnan) ||
1389  Token.is(MIToken::kw_ninf) ||
1390  Token.is(MIToken::kw_nsz) ||
1391  Token.is(MIToken::kw_arcp) ||
1392  Token.is(MIToken::kw_contract) ||
1393  Token.is(MIToken::kw_afn) ||
1394  Token.is(MIToken::kw_reassoc) ||
1395  Token.is(MIToken::kw_nuw) ||
1396  Token.is(MIToken::kw_nsw) ||
1397  Token.is(MIToken::kw_exact) ||
1398  Token.is(MIToken::kw_nofpexcept)) {
1399  // Mine frame and fast math flags
1400  if (Token.is(MIToken::kw_frame_setup))
1401  Flags |= MachineInstr::FrameSetup;
1402  if (Token.is(MIToken::kw_frame_destroy))
1403  Flags |= MachineInstr::FrameDestroy;
1404  if (Token.is(MIToken::kw_nnan))
1405  Flags |= MachineInstr::FmNoNans;
1406  if (Token.is(MIToken::kw_ninf))
1407  Flags |= MachineInstr::FmNoInfs;
1408  if (Token.is(MIToken::kw_nsz))
1409  Flags |= MachineInstr::FmNsz;
1410  if (Token.is(MIToken::kw_arcp))
1411  Flags |= MachineInstr::FmArcp;
1412  if (Token.is(MIToken::kw_contract))
1413  Flags |= MachineInstr::FmContract;
1414  if (Token.is(MIToken::kw_afn))
1415  Flags |= MachineInstr::FmAfn;
1416  if (Token.is(MIToken::kw_reassoc))
1417  Flags |= MachineInstr::FmReassoc;
1418  if (Token.is(MIToken::kw_nuw))
1419  Flags |= MachineInstr::NoUWrap;
1420  if (Token.is(MIToken::kw_nsw))
1421  Flags |= MachineInstr::NoSWrap;
1422  if (Token.is(MIToken::kw_exact))
1423  Flags |= MachineInstr::IsExact;
1424  if (Token.is(MIToken::kw_nofpexcept))
1425  Flags |= MachineInstr::NoFPExcept;
1426 
1427  lex();
1428  }
1429  if (Token.isNot(MIToken::Identifier))
1430  return error("expected a machine instruction");
1431  StringRef InstrName = Token.stringValue();
1432  if (PFS.Target.parseInstrName(InstrName, OpCode))
1433  return error(Twine("unknown machine instruction name '") + InstrName + "'");
1434  lex();
1435  return false;
1436 }
1437 
1438 bool MIParser::parseNamedRegister(Register &Reg) {
1439  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
1440  StringRef Name = Token.stringValue();
1441  if (PFS.Target.getRegisterByName(Name, Reg))
1442  return error(Twine("unknown register name '") + Name + "'");
1443  return false;
1444 }
1445 
1446 bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
1447  assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
1448  StringRef Name = Token.stringValue();
1449  // TODO: Check that the VReg name is not the same as a physical register name.
1450  // If it is, then print a warning (when warnings are implemented).
1451  Info = &PFS.getVRegInfoNamed(Name);
1452  return false;
1453 }
1454 
1455 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
1456  if (Token.is(MIToken::NamedVirtualRegister))
1457  return parseNamedVirtualRegister(Info);
1458  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
1459  unsigned ID;
1460  if (getUnsigned(ID))
1461  return true;
1462  Info = &PFS.getVRegInfo(ID);
1463  return false;
1464 }
1465 
1466 bool MIParser::parseRegister(Register &Reg, VRegInfo *&Info) {
1467  switch (Token.kind()) {
1468  case MIToken::underscore:
1469  Reg = 0;
1470  return false;
1472  return parseNamedRegister(Reg);
1475  if (parseVirtualRegister(Info))
1476  return true;
1477  Reg = Info->VReg;
1478  return false;
1479  // TODO: Parse other register kinds.
1480  default:
1481  llvm_unreachable("The current token should be a register");
1482  }
1483 }
1484 
1485 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
1486  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
1487  return error("expected '_', register class, or register bank name");
1488  StringRef::iterator Loc = Token.location();
1489  StringRef Name = Token.stringValue();
1490 
1491  // Was it a register class?
1492  const TargetRegisterClass *RC = PFS.Target.getRegClass(Name);
1493  if (RC) {
1494  lex();
1495 
1496  switch (RegInfo.Kind) {
1497  case VRegInfo::UNKNOWN:
1498  case VRegInfo::NORMAL:
1499  RegInfo.Kind = VRegInfo::NORMAL;
1500  if (RegInfo.Explicit && RegInfo.D.RC != RC) {
1501  const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
1502  return error(Loc, Twine("conflicting register classes, previously: ") +
1503  Twine(TRI.getRegClassName(RegInfo.D.RC)));
1504  }
1505  RegInfo.D.RC = RC;
1506  RegInfo.Explicit = true;
1507  return false;
1508 
1509  case VRegInfo::GENERIC:
1510  case VRegInfo::REGBANK:
1511  return error(Loc, "register class specification on generic register");
1512  }
1513  llvm_unreachable("Unexpected register kind");
1514  }
1515 
1516  // Should be a register bank or a generic register.
1517  const RegisterBank *RegBank = nullptr;
1518  if (Name != "_") {
1519  RegBank = PFS.Target.getRegBank(Name);
1520  if (!RegBank)
1521  return error(Loc, "expected '_', register class, or register bank name");
1522  }
1523 
1524  lex();
1525 
1526  switch (RegInfo.Kind) {
1527  case VRegInfo::UNKNOWN:
1528  case VRegInfo::GENERIC:
1529  case VRegInfo::REGBANK:
1530  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1531  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1532  return error(Loc, "conflicting generic register banks");
1533  RegInfo.D.RegBank = RegBank;
1534  RegInfo.Explicit = true;
1535  return false;
1536 
1537  case VRegInfo::NORMAL:
1538  return error(Loc, "register bank specification on normal register");
1539  }
1540  llvm_unreachable("Unexpected register kind");
1541 }
1542 
1543 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1544  const unsigned OldFlags = Flags;
1545  switch (Token.kind()) {
1546  case MIToken::kw_implicit:
1547  Flags |= RegState::Implicit;
1548  break;
1550  Flags |= RegState::ImplicitDefine;
1551  break;
1552  case MIToken::kw_def:
1553  Flags |= RegState::Define;
1554  break;
1555  case MIToken::kw_dead:
1556  Flags |= RegState::Dead;
1557  break;
1558  case MIToken::kw_killed:
1559  Flags |= RegState::Kill;
1560  break;
1561  case MIToken::kw_undef:
1562  Flags |= RegState::Undef;
1563  break;
1564  case MIToken::kw_internal:
1565  Flags |= RegState::InternalRead;
1566  break;
1568  Flags |= RegState::EarlyClobber;
1569  break;
1570  case MIToken::kw_debug_use:
1571  Flags |= RegState::Debug;
1572  break;
1573  case MIToken::kw_renamable:
1574  Flags |= RegState::Renamable;
1575  break;
1576  default:
1577  llvm_unreachable("The current token should be a register flag");
1578  }
1579  if (OldFlags == Flags)
1580  // We know that the same flag is specified more than once when the flags
1581  // weren't modified.
1582  return error("duplicate '" + Token.stringValue() + "' register flag");
1583  lex();
1584  return false;
1585 }
1586 
1587 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1588  assert(Token.is(MIToken::dot));
1589  lex();
1590  if (Token.isNot(MIToken::Identifier))
1591  return error("expected a subregister index after '.'");
1592  auto Name = Token.stringValue();
1593  SubReg = PFS.Target.getSubRegIndex(Name);
1594  if (!SubReg)
1595  return error(Twine("use of unknown subregister index '") + Name + "'");
1596  lex();
1597  return false;
1598 }
1599 
1600 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1601  if (!consumeIfPresent(MIToken::kw_tied_def))
1602  return true;
1603  if (Token.isNot(MIToken::IntegerLiteral))
1604  return error("expected an integer literal after 'tied-def'");
1605  if (getUnsigned(TiedDefIdx))
1606  return true;
1607  lex();
1608  if (expectAndConsume(MIToken::rparen))
1609  return true;
1610  return false;
1611 }
1612 
1613 bool MIParser::assignRegisterTies(MachineInstr &MI,
1615  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1616  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1617  if (!Operands[I].TiedDefIdx)
1618  continue;
1619  // The parser ensures that this operand is a register use, so we just have
1620  // to check the tied-def operand.
1621  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1622  if (DefIdx >= E)
1623  return error(Operands[I].Begin,
1624  Twine("use of invalid tied-def operand index '" +
1625  Twine(DefIdx) + "'; instruction has only ") +
1626  Twine(E) + " operands");
1627  const auto &DefOperand = Operands[DefIdx].Operand;
1628  if (!DefOperand.isReg() || !DefOperand.isDef())
1629  // FIXME: add note with the def operand.
1630  return error(Operands[I].Begin,
1631  Twine("use of invalid tied-def operand index '") +
1632  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1633  " isn't a defined register");
1634  // Check that the tied-def operand wasn't tied elsewhere.
1635  for (const auto &TiedPair : TiedRegisterPairs) {
1636  if (TiedPair.first == DefIdx)
1637  return error(Operands[I].Begin,
1638  Twine("the tied-def operand #") + Twine(DefIdx) +
1639  " is already tied with another register operand");
1640  }
1641  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1642  }
1643  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1644  // indices must be less than tied max.
1645  for (const auto &TiedPair : TiedRegisterPairs)
1646  MI.tieOperands(TiedPair.first, TiedPair.second);
1647  return false;
1648 }
1649 
1650 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1651  Optional<unsigned> &TiedDefIdx,
1652  bool IsDef) {
1653  unsigned Flags = IsDef ? RegState::Define : 0;
1654  while (Token.isRegisterFlag()) {
1655  if (parseRegisterFlag(Flags))
1656  return true;
1657  }
1658  if (!Token.isRegister())
1659  return error("expected a register after register flags");
1660  Register Reg;
1661  VRegInfo *RegInfo;
1662  if (parseRegister(Reg, RegInfo))
1663  return true;
1664  lex();
1665  unsigned SubReg = 0;
1666  if (Token.is(MIToken::dot)) {
1667  if (parseSubRegisterIndex(SubReg))
1668  return true;
1670  return error("subregister index expects a virtual register");
1671  }
1672  if (Token.is(MIToken::colon)) {
1674  return error("register class specification expects a virtual register");
1675  lex();
1676  if (parseRegisterClassOrBank(*RegInfo))
1677  return true;
1678  }
1679  MachineRegisterInfo &MRI = MF.getRegInfo();
1680  if ((Flags & RegState::Define) == 0) {
1681  if (consumeIfPresent(MIToken::lparen)) {
1682  unsigned Idx;
1683  if (!parseRegisterTiedDefIndex(Idx))
1684  TiedDefIdx = Idx;
1685  else {
1686  // Try a redundant low-level type.
1687  LLT Ty;
1688  if (parseLowLevelType(Token.location(), Ty))
1689  return error("expected tied-def or low-level type after '('");
1690 
1691  if (expectAndConsume(MIToken::rparen))
1692  return true;
1693 
1694  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1695  return error("inconsistent type for generic virtual register");
1696 
1697  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1698  MRI.setType(Reg, Ty);
1699  }
1700  }
1701  } else if (consumeIfPresent(MIToken::lparen)) {
1702  // Virtual registers may have a tpe with GlobalISel.
1704  return error("unexpected type on physical register");
1705 
1706  LLT Ty;
1707  if (parseLowLevelType(Token.location(), Ty))
1708  return true;
1709 
1710  if (expectAndConsume(MIToken::rparen))
1711  return true;
1712 
1713  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1714  return error("inconsistent type for generic virtual register");
1715 
1716  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1717  MRI.setType(Reg, Ty);
1718  } else if (Register::isVirtualRegister(Reg)) {
1719  // Generic virtual registers must have a type.
1720  // If we end up here this means the type hasn't been specified and
1721  // this is bad!
1722  if (RegInfo->Kind == VRegInfo::GENERIC ||
1723  RegInfo->Kind == VRegInfo::REGBANK)
1724  return error("generic virtual registers must have a type");
1725  }
1726 
1727  if (Flags & RegState::Define) {
1728  if (Flags & RegState::Kill)
1729  return error("cannot have a killed def operand");
1730  } else {
1731  if (Flags & RegState::Dead)
1732  return error("cannot have a dead use operand");
1733  }
1734 
1736  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1737  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1738  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1739  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1740 
1741  return false;
1742 }
1743 
1744 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1745  assert(Token.is(MIToken::IntegerLiteral));
1746  const APSInt &Int = Token.integerValue();
1747  if (Int.getMinSignedBits() > 64)
1748  return error("integer literal is too large to be an immediate operand");
1749  Dest = MachineOperand::CreateImm(Int.getExtValue());
1750  lex();
1751  return false;
1752 }
1753 
1754 bool MIParser::parseTargetImmMnemonic(const unsigned OpCode,
1755  const unsigned OpIdx,
1756  MachineOperand &Dest,
1757  const MIRFormatter &MF) {
1758  assert(Token.is(MIToken::dot));
1759  auto Loc = Token.location(); // record start position
1760  size_t Len = 1; // for "."
1761  lex();
1762 
1763  // Handle the case that mnemonic starts with number.
1764  if (Token.is(MIToken::IntegerLiteral)) {
1765  Len += Token.range().size();
1766  lex();
1767  }
1768 
1769  StringRef Src;
1770  if (Token.is(MIToken::comma))
1771  Src = StringRef(Loc, Len);
1772  else {
1773  assert(Token.is(MIToken::Identifier));
1774  Src = StringRef(Loc, Len + Token.stringValue().size());
1775  }
1776  int64_t Val;
1777  if (MF.parseImmMnemonic(OpCode, OpIdx, Src, Val,
1778  [this](StringRef::iterator Loc, const Twine &Msg)
1779  -> bool { return error(Loc, Msg); }))
1780  return true;
1781 
1782  Dest = MachineOperand::CreateImm(Val);
1783  if (!Token.is(MIToken::comma))
1784  lex();
1785  return false;
1786 }
1787 
1788 static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1789  PerFunctionMIParsingState &PFS, const Constant *&C,
1790  ErrorCallbackType ErrCB) {
1791  auto Source = StringValue.str(); // The source has to be null terminated.
1792  SMDiagnostic Err;
1794  &PFS.IRSlots);
1795  if (!C)
1796  return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
1797  return false;
1798 }
1799 
1801  const Constant *&C) {
1803  Loc, StringValue, PFS, C,
1804  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1805  return error(Loc, Msg);
1806  });
1807 }
1808 
1810  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1811  return true;
1812  lex();
1813  return false;
1814 }
1815 
1816 // See LLT implemntation for bit size limits.
1817 static bool verifyScalarSize(uint64_t Size) {
1818  return Size != 0 && isUInt<16>(Size);
1819 }
1820 
1821 static bool verifyVectorElementCount(uint64_t NumElts) {
1822  return NumElts != 0 && isUInt<16>(NumElts);
1823 }
1824 
1825 static bool verifyAddrSpace(uint64_t AddrSpace) {
1826  return isUInt<24>(AddrSpace);
1827 }
1828 
1829 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1830  if (Token.range().front() == 's' || Token.range().front() == 'p') {
1831  StringRef SizeStr = Token.range().drop_front();
1832  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1833  return error("expected integers after 's'/'p' type character");
1834  }
1835 
1836  if (Token.range().front() == 's') {
1837  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1838  if (!verifyScalarSize(ScalarSize))
1839  return error("invalid size for scalar type");
1840 
1841  Ty = LLT::scalar(ScalarSize);
1842  lex();
1843  return false;
1844  } else if (Token.range().front() == 'p') {
1845  const DataLayout &DL = MF.getDataLayout();
1846  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1847  if (!verifyAddrSpace(AS))
1848  return error("invalid address space number");
1849 
1850  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1851  lex();
1852  return false;
1853  }
1854 
1855  // Now we're looking for a vector.
1856  if (Token.isNot(MIToken::less))
1857  return error(Loc,
1858  "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1859  lex();
1860 
1861  if (Token.isNot(MIToken::IntegerLiteral))
1862  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1863  uint64_t NumElements = Token.integerValue().getZExtValue();
1864  if (!verifyVectorElementCount(NumElements))
1865  return error("invalid number of vector elements");
1866 
1867  lex();
1868 
1869  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1870  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1871  lex();
1872 
1873  if (Token.range().front() != 's' && Token.range().front() != 'p')
1874  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1875  StringRef SizeStr = Token.range().drop_front();
1876  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1877  return error("expected integers after 's'/'p' type character");
1878 
1879  if (Token.range().front() == 's') {
1880  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1881  if (!verifyScalarSize(ScalarSize))
1882  return error("invalid size for scalar type");
1883  Ty = LLT::scalar(ScalarSize);
1884  } else if (Token.range().front() == 'p') {
1885  const DataLayout &DL = MF.getDataLayout();
1886  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1887  if (!verifyAddrSpace(AS))
1888  return error("invalid address space number");
1889 
1890  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1891  } else
1892  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1893  lex();
1894 
1895  if (Token.isNot(MIToken::greater))
1896  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1897  lex();
1898 
1899  Ty = LLT::fixed_vector(NumElements, Ty);
1900  return false;
1901 }
1902 
1903 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1904  assert(Token.is(MIToken::Identifier));
1905  StringRef TypeStr = Token.range();
1906  if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
1907  TypeStr.front() != 'p')
1908  return error(
1909  "a typed immediate operand should start with one of 'i', 's', or 'p'");
1910  StringRef SizeStr = Token.range().drop_front();
1911  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1912  return error("expected integers after 'i'/'s'/'p' type character");
1913 
1914  auto Loc = Token.location();
1915  lex();
1916  if (Token.isNot(MIToken::IntegerLiteral)) {
1917  if (Token.isNot(MIToken::Identifier) ||
1918  !(Token.range() == "true" || Token.range() == "false"))
1919  return error("expected an integer literal");
1920  }
1921  const Constant *C = nullptr;
1922  if (parseIRConstant(Loc, C))
1923  return true;
1924  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1925  return false;
1926 }
1927 
1928 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1929  auto Loc = Token.location();
1930  lex();
1931  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1932  Token.isNot(MIToken::HexLiteral))
1933  return error("expected a floating point literal");
1934  const Constant *C = nullptr;
1935  if (parseIRConstant(Loc, C))
1936  return true;
1937  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1938  return false;
1939 }
1940 
1941 static bool getHexUint(const MIToken &Token, APInt &Result) {
1942  assert(Token.is(MIToken::HexLiteral));
1943  StringRef S = Token.range();
1944  assert(S[0] == '0' && tolower(S[1]) == 'x');
1945  // This could be a floating point literal with a special prefix.
1946  if (!isxdigit(S[2]))
1947  return true;
1948  StringRef V = S.substr(2);
1949  APInt A(V.size()*4, V, 16);
1950 
1951  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
1952  // sure it isn't the case before constructing result.
1953  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
1954  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
1955  return false;
1956 }
1957 
1958 static bool getUnsigned(const MIToken &Token, unsigned &Result,
1959  ErrorCallbackType ErrCB) {
1960  if (Token.hasIntegerValue()) {
1962  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1963  if (Val64 == Limit)
1964  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
1965  Result = Val64;
1966  return false;
1967  }
1968  if (Token.is(MIToken::HexLiteral)) {
1969  APInt A;
1970  if (getHexUint(Token, A))
1971  return true;
1972  if (A.getBitWidth() > 32)
1973  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
1974  Result = A.getZExtValue();
1975  return false;
1976  }
1977  return true;
1978 }
1979 
1980 bool MIParser::getUnsigned(unsigned &Result) {
1982  Token, Result, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1983  return error(Loc, Msg);
1984  });
1985 }
1986 
1988  assert(Token.is(MIToken::MachineBasicBlock) ||
1990  unsigned Number;
1991  if (getUnsigned(Number))
1992  return true;
1993  auto MBBInfo = PFS.MBBSlots.find(Number);
1994  if (MBBInfo == PFS.MBBSlots.end())
1995  return error(Twine("use of undefined machine basic block #") +
1996  Twine(Number));
1997  MBB = MBBInfo->second;
1998  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
1999  // we drop the <irname> from the bb.<id>.<irname> format.
2000  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
2001  return error(Twine("the name of machine basic block #") + Twine(Number) +
2002  " isn't '" + Token.stringValue() + "'");
2003  return false;
2004 }
2005 
2006 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
2008  if (parseMBBReference(MBB))
2009  return true;
2011  lex();
2012  return false;
2013 }
2014 
2015 bool MIParser::parseStackFrameIndex(int &FI) {
2016  assert(Token.is(MIToken::StackObject));
2017  unsigned ID;
2018  if (getUnsigned(ID))
2019  return true;
2020  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
2021  if (ObjectInfo == PFS.StackObjectSlots.end())
2022  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
2023  "'");
2024  StringRef Name;
2025  if (const auto *Alloca =
2026  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2027  Name = Alloca->getName();
2028  if (!Token.stringValue().empty() && Token.stringValue() != Name)
2029  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
2030  "' isn't '" + Token.stringValue() + "'");
2031  lex();
2032  FI = ObjectInfo->second;
2033  return false;
2034 }
2035 
2036 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
2037  int FI;
2038  if (parseStackFrameIndex(FI))
2039  return true;
2040  Dest = MachineOperand::CreateFI(FI);
2041  return false;
2042 }
2043 
2044 bool MIParser::parseFixedStackFrameIndex(int &FI) {
2045  assert(Token.is(MIToken::FixedStackObject));
2046  unsigned ID;
2047  if (getUnsigned(ID))
2048  return true;
2049  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
2050  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
2051  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
2052  Twine(ID) + "'");
2053  lex();
2054  FI = ObjectInfo->second;
2055  return false;
2056 }
2057 
2058 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
2059  int FI;
2060  if (parseFixedStackFrameIndex(FI))
2061  return true;
2062  Dest = MachineOperand::CreateFI(FI);
2063  return false;
2064 }
2065 
2066 static bool parseGlobalValue(const MIToken &Token,
2068  ErrorCallbackType ErrCB) {
2069  switch (Token.kind()) {
2071  const Module *M = PFS.MF.getFunction().getParent();
2072  GV = M->getNamedValue(Token.stringValue());
2073  if (!GV)
2074  return ErrCB(Token.location(), Twine("use of undefined global value '") +
2075  Token.range() + "'");
2076  break;
2077  }
2078  case MIToken::GlobalValue: {
2079  unsigned GVIdx;
2080  if (getUnsigned(Token, GVIdx, ErrCB))
2081  return true;
2082  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
2083  return ErrCB(Token.location(), Twine("use of undefined global value '@") +
2084  Twine(GVIdx) + "'");
2085  GV = PFS.IRSlots.GlobalValues[GVIdx];
2086  break;
2087  }
2088  default:
2089  llvm_unreachable("The current token should be a global value");
2090  }
2091  return false;
2092 }
2093 
2096  Token, PFS, GV,
2097  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2098  return error(Loc, Msg);
2099  });
2100 }
2101 
2102 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
2103  GlobalValue *GV = nullptr;
2104  if (parseGlobalValue(GV))
2105  return true;
2106  lex();
2107  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
2108  if (parseOperandsOffset(Dest))
2109  return true;
2110  return false;
2111 }
2112 
2113 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
2114  assert(Token.is(MIToken::ConstantPoolItem));
2115  unsigned ID;
2116  if (getUnsigned(ID))
2117  return true;
2118  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
2119  if (ConstantInfo == PFS.ConstantPoolSlots.end())
2120  return error("use of undefined constant '%const." + Twine(ID) + "'");
2121  lex();
2122  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
2123  if (parseOperandsOffset(Dest))
2124  return true;
2125  return false;
2126 }
2127 
2128 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
2129  assert(Token.is(MIToken::JumpTableIndex));
2130  unsigned ID;
2131  if (getUnsigned(ID))
2132  return true;
2133  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
2134  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
2135  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
2136  lex();
2137  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
2138  return false;
2139 }
2140 
2141 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
2142  assert(Token.is(MIToken::ExternalSymbol));
2143  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
2144  lex();
2146  if (parseOperandsOffset(Dest))
2147  return true;
2148  return false;
2149 }
2150 
2151 bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
2152  assert(Token.is(MIToken::MCSymbol));
2153  MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
2154  lex();
2156  if (parseOperandsOffset(Dest))
2157  return true;
2158  return false;
2159 }
2160 
2161 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
2162  assert(Token.is(MIToken::SubRegisterIndex));
2163  StringRef Name = Token.stringValue();
2164  unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
2165  if (SubRegIndex == 0)
2166  return error(Twine("unknown subregister index '") + Name + "'");
2167  lex();
2168  Dest = MachineOperand::CreateImm(SubRegIndex);
2169  return false;
2170 }
2171 
2172 bool MIParser::parseMDNode(MDNode *&Node) {
2173  assert(Token.is(MIToken::exclaim));
2174 
2175  auto Loc = Token.location();
2176  lex();
2177  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2178  return error("expected metadata id after '!'");
2179  unsigned ID;
2180  if (getUnsigned(ID))
2181  return true;
2182  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
2183  if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
2184  NodeInfo = PFS.MachineMetadataNodes.find(ID);
2185  if (NodeInfo == PFS.MachineMetadataNodes.end())
2186  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
2187  }
2188  lex();
2189  Node = NodeInfo->second.get();
2190  return false;
2191 }
2192 
2193 bool MIParser::parseDIExpression(MDNode *&Expr) {
2194  assert(Token.is(MIToken::md_diexpr));
2195  lex();
2196 
2197  // FIXME: Share this parsing with the IL parser.
2198  SmallVector<uint64_t, 8> Elements;
2199 
2200  if (expectAndConsume(MIToken::lparen))
2201  return true;
2202 
2203  if (Token.isNot(MIToken::rparen)) {
2204  do {
2205  if (Token.is(MIToken::Identifier)) {
2206  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
2207  lex();
2208  Elements.push_back(Op);
2209  continue;
2210  }
2211  if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) {
2212  lex();
2213  Elements.push_back(Enc);
2214  continue;
2215  }
2216  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
2217  }
2218 
2219  if (Token.isNot(MIToken::IntegerLiteral) ||
2220  Token.integerValue().isSigned())
2221  return error("expected unsigned integer");
2222 
2223  auto &U = Token.integerValue();
2224  if (U.ugt(UINT64_MAX))
2225  return error("element too large, limit is " + Twine(UINT64_MAX));
2226  Elements.push_back(U.getZExtValue());
2227  lex();
2228 
2229  } while (consumeIfPresent(MIToken::comma));
2230  }
2231 
2232  if (expectAndConsume(MIToken::rparen))
2233  return true;
2234 
2235  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
2236  return false;
2237 }
2238 
2239 bool MIParser::parseDILocation(MDNode *&Loc) {
2240  assert(Token.is(MIToken::md_dilocation));
2241  lex();
2242 
2243  bool HaveLine = false;
2244  unsigned Line = 0;
2245  unsigned Column = 0;
2246  MDNode *Scope = nullptr;
2247  MDNode *InlinedAt = nullptr;
2248  bool ImplicitCode = false;
2249 
2250  if (expectAndConsume(MIToken::lparen))
2251  return true;
2252 
2253  if (Token.isNot(MIToken::rparen)) {
2254  do {
2255  if (Token.is(MIToken::Identifier)) {
2256  if (Token.stringValue() == "line") {
2257  lex();
2258  if (expectAndConsume(MIToken::colon))
2259  return true;
2260  if (Token.isNot(MIToken::IntegerLiteral) ||
2261  Token.integerValue().isSigned())
2262  return error("expected unsigned integer");
2263  Line = Token.integerValue().getZExtValue();
2264  HaveLine = true;
2265  lex();
2266  continue;
2267  }
2268  if (Token.stringValue() == "column") {
2269  lex();
2270  if (expectAndConsume(MIToken::colon))
2271  return true;
2272  if (Token.isNot(MIToken::IntegerLiteral) ||
2273  Token.integerValue().isSigned())
2274  return error("expected unsigned integer");
2275  Column = Token.integerValue().getZExtValue();
2276  lex();
2277  continue;
2278  }
2279  if (Token.stringValue() == "scope") {
2280  lex();
2281  if (expectAndConsume(MIToken::colon))
2282  return true;
2283  if (parseMDNode(Scope))
2284  return error("expected metadata node");
2285  if (!isa<DIScope>(Scope))
2286  return error("expected DIScope node");
2287  continue;
2288  }
2289  if (Token.stringValue() == "inlinedAt") {
2290  lex();
2291  if (expectAndConsume(MIToken::colon))
2292  return true;
2293  if (Token.is(MIToken::exclaim)) {
2294  if (parseMDNode(InlinedAt))
2295  return true;
2296  } else if (Token.is(MIToken::md_dilocation)) {
2297  if (parseDILocation(InlinedAt))
2298  return true;
2299  } else
2300  return error("expected metadata node");
2301  if (!isa<DILocation>(InlinedAt))
2302  return error("expected DILocation node");
2303  continue;
2304  }
2305  if (Token.stringValue() == "isImplicitCode") {
2306  lex();
2307  if (expectAndConsume(MIToken::colon))
2308  return true;
2309  if (!Token.is(MIToken::Identifier))
2310  return error("expected true/false");
2311  // As far as I can see, we don't have any existing need for parsing
2312  // true/false in MIR yet. Do it ad-hoc until there's something else
2313  // that needs it.
2314  if (Token.stringValue() == "true")
2315  ImplicitCode = true;
2316  else if (Token.stringValue() == "false")
2317  ImplicitCode = false;
2318  else
2319  return error("expected true/false");
2320  lex();
2321  continue;
2322  }
2323  }
2324  return error(Twine("invalid DILocation argument '") +
2325  Token.stringValue() + "'");
2326  } while (consumeIfPresent(MIToken::comma));
2327  }
2328 
2329  if (expectAndConsume(MIToken::rparen))
2330  return true;
2331 
2332  if (!HaveLine)
2333  return error("DILocation requires line number");
2334  if (!Scope)
2335  return error("DILocation requires a scope");
2336 
2337  Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
2338  InlinedAt, ImplicitCode);
2339  return false;
2340 }
2341 
2342 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
2343  MDNode *Node = nullptr;
2344  if (Token.is(MIToken::exclaim)) {
2345  if (parseMDNode(Node))
2346  return true;
2347  } else if (Token.is(MIToken::md_diexpr)) {
2348  if (parseDIExpression(Node))
2349  return true;
2350  }
2351  Dest = MachineOperand::CreateMetadata(Node);
2352  return false;
2353 }
2354 
2355 bool MIParser::parseCFIOffset(int &Offset) {
2356  if (Token.isNot(MIToken::IntegerLiteral))
2357  return error("expected a cfi offset");
2358  if (Token.integerValue().getMinSignedBits() > 32)
2359  return error("expected a 32 bit integer (the cfi offset is too large)");
2360  Offset = (int)Token.integerValue().getExtValue();
2361  lex();
2362  return false;
2363 }
2364 
2365 bool MIParser::parseCFIRegister(Register &Reg) {
2366  if (Token.isNot(MIToken::NamedRegister))
2367  return error("expected a cfi register");
2368  Register LLVMReg;
2369  if (parseNamedRegister(LLVMReg))
2370  return true;
2371  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2372  assert(TRI && "Expected target register info");
2373  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
2374  if (DwarfReg < 0)
2375  return error("invalid DWARF register");
2376  Reg = (unsigned)DwarfReg;
2377  lex();
2378  return false;
2379 }
2380 
2381 bool MIParser::parseCFIAddressSpace(unsigned &AddressSpace) {
2382  if (Token.isNot(MIToken::IntegerLiteral))
2383  return error("expected a cfi address space literal");
2384  if (Token.integerValue().isSigned())
2385  return error("expected an unsigned integer (cfi address space)");
2386  AddressSpace = Token.integerValue().getZExtValue();
2387  lex();
2388  return false;
2389 }
2390 
2391 bool MIParser::parseCFIEscapeValues(std::string &Values) {
2392  do {
2393  if (Token.isNot(MIToken::HexLiteral))
2394  return error("expected a hexadecimal literal");
2395  unsigned Value;
2396  if (getUnsigned(Value))
2397  return true;
2398  if (Value > UINT8_MAX)
2399  return error("expected a 8-bit integer (too large)");
2400  Values.push_back(static_cast<uint8_t>(Value));
2401  lex();
2402  } while (consumeIfPresent(MIToken::comma));
2403  return false;
2404 }
2405 
2406 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
2407  auto Kind = Token.kind();
2408  lex();
2409  int Offset;
2410  Register Reg;
2411  unsigned AddressSpace;
2412  unsigned CFIIndex;
2413  switch (Kind) {
2415  if (parseCFIRegister(Reg))
2416  return true;
2417  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
2418  break;
2420  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2421  parseCFIOffset(Offset))
2422  return true;
2423  CFIIndex =
2424  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
2425  break;
2427  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2428  parseCFIOffset(Offset))
2429  return true;
2430  CFIIndex = MF.addFrameInst(
2431  MCCFIInstruction::createRelOffset(nullptr, Reg, Offset));
2432  break;
2434  if (parseCFIRegister(Reg))
2435  return true;
2436  CFIIndex =
2437  MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
2438  break;
2440  if (parseCFIOffset(Offset))
2441  return true;
2442  CFIIndex =
2443  MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, Offset));
2444  break;
2446  if (parseCFIOffset(Offset))
2447  return true;
2448  CFIIndex = MF.addFrameInst(
2449  MCCFIInstruction::createAdjustCfaOffset(nullptr, Offset));
2450  break;
2452  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2453  parseCFIOffset(Offset))
2454  return true;
2455  CFIIndex =
2456  MF.addFrameInst(MCCFIInstruction::cfiDefCfa(nullptr, Reg, Offset));
2457  break;
2459  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2460  parseCFIOffset(Offset) || expectAndConsume(MIToken::comma) ||
2461  parseCFIAddressSpace(AddressSpace))
2462  return true;
2463  CFIIndex = MF.addFrameInst(MCCFIInstruction::createLLVMDefAspaceCfa(
2464  nullptr, Reg, Offset, AddressSpace));
2465  break;
2467  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRememberState(nullptr));
2468  break;
2470  if (parseCFIRegister(Reg))
2471  return true;
2472  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
2473  break;
2475  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestoreState(nullptr));
2476  break;
2478  if (parseCFIRegister(Reg))
2479  return true;
2480  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
2481  break;
2482  case MIToken::kw_cfi_register: {
2483  Register Reg2;
2484  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2485  parseCFIRegister(Reg2))
2486  return true;
2487 
2488  CFIIndex =
2489  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
2490  break;
2491  }
2493  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
2494  break;
2496  CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
2497  break;
2498  case MIToken::kw_cfi_escape: {
2499  std::string Values;
2500  if (parseCFIEscapeValues(Values))
2501  return true;
2502  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
2503  break;
2504  }
2505  default:
2506  // TODO: Parse the other CFI operands.
2507  llvm_unreachable("The current token should be a cfi operand");
2508  }
2509  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
2510  return false;
2511 }
2512 
2513 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
2514  switch (Token.kind()) {
2515  case MIToken::NamedIRBlock: {
2516  BB = dyn_cast_or_null<BasicBlock>(
2517  F.getValueSymbolTable()->lookup(Token.stringValue()));
2518  if (!BB)
2519  return error(Twine("use of undefined IR block '") + Token.range() + "'");
2520  break;
2521  }
2522  case MIToken::IRBlock: {
2523  unsigned SlotNumber = 0;
2524  if (getUnsigned(SlotNumber))
2525  return true;
2526  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
2527  if (!BB)
2528  return error(Twine("use of undefined IR block '%ir-block.") +
2529  Twine(SlotNumber) + "'");
2530  break;
2531  }
2532  default:
2533  llvm_unreachable("The current token should be an IR block reference");
2534  }
2535  return false;
2536 }
2537 
2538 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
2539  assert(Token.is(MIToken::kw_blockaddress));
2540  lex();
2541  if (expectAndConsume(MIToken::lparen))
2542  return true;
2543  if (Token.isNot(MIToken::GlobalValue) &&
2544  Token.isNot(MIToken::NamedGlobalValue))
2545  return error("expected a global value");
2546  GlobalValue *GV = nullptr;
2547  if (parseGlobalValue(GV))
2548  return true;
2549  auto *F = dyn_cast<Function>(GV);
2550  if (!F)
2551  return error("expected an IR function reference");
2552  lex();
2553  if (expectAndConsume(MIToken::comma))
2554  return true;
2555  BasicBlock *BB = nullptr;
2556  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
2557  return error("expected an IR block reference");
2558  if (parseIRBlock(BB, *F))
2559  return true;
2560  lex();
2561  if (expectAndConsume(MIToken::rparen))
2562  return true;
2563  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
2564  if (parseOperandsOffset(Dest))
2565  return true;
2566  return false;
2567 }
2568 
2569 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
2570  assert(Token.is(MIToken::kw_intrinsic));
2571  lex();
2572  if (expectAndConsume(MIToken::lparen))
2573  return error("expected syntax intrinsic(@llvm.whatever)");
2574 
2575  if (Token.isNot(MIToken::NamedGlobalValue))
2576  return error("expected syntax intrinsic(@llvm.whatever)");
2577 
2578  std::string Name = std::string(Token.stringValue());
2579  lex();
2580 
2581  if (expectAndConsume(MIToken::rparen))
2582  return error("expected ')' to terminate intrinsic name");
2583 
2584  // Find out what intrinsic we're dealing with, first try the global namespace
2585  // and then the target's private intrinsics if that fails.
2586  const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo();
2588  if (ID == Intrinsic::not_intrinsic && TII)
2589  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
2590 
2592  return error("unknown intrinsic name");
2594 
2595  return false;
2596 }
2597 
2598 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
2599  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
2600  bool IsFloat = Token.is(MIToken::kw_floatpred);
2601  lex();
2602 
2603  if (expectAndConsume(MIToken::lparen))
2604  return error("expected syntax intpred(whatever) or floatpred(whatever");
2605 
2606  if (Token.isNot(MIToken::Identifier))
2607  return error("whatever");
2608 
2609  CmpInst::Predicate Pred;
2610  if (IsFloat) {
2611  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2612  .Case("false", CmpInst::FCMP_FALSE)
2613  .Case("oeq", CmpInst::FCMP_OEQ)
2614  .Case("ogt", CmpInst::FCMP_OGT)
2615  .Case("oge", CmpInst::FCMP_OGE)
2616  .Case("olt", CmpInst::FCMP_OLT)
2617  .Case("ole", CmpInst::FCMP_OLE)
2618  .Case("one", CmpInst::FCMP_ONE)
2619  .Case("ord", CmpInst::FCMP_ORD)
2620  .Case("uno", CmpInst::FCMP_UNO)
2621  .Case("ueq", CmpInst::FCMP_UEQ)
2622  .Case("ugt", CmpInst::FCMP_UGT)
2623  .Case("uge", CmpInst::FCMP_UGE)
2624  .Case("ult", CmpInst::FCMP_ULT)
2625  .Case("ule", CmpInst::FCMP_ULE)
2626  .Case("une", CmpInst::FCMP_UNE)
2627  .Case("true", CmpInst::FCMP_TRUE)
2629  if (!CmpInst::isFPPredicate(Pred))
2630  return error("invalid floating-point predicate");
2631  } else {
2632  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2633  .Case("eq", CmpInst::ICMP_EQ)
2634  .Case("ne", CmpInst::ICMP_NE)
2635  .Case("sgt", CmpInst::ICMP_SGT)
2636  .Case("sge", CmpInst::ICMP_SGE)
2637  .Case("slt", CmpInst::ICMP_SLT)
2638  .Case("sle", CmpInst::ICMP_SLE)
2639  .Case("ugt", CmpInst::ICMP_UGT)
2640  .Case("uge", CmpInst::ICMP_UGE)
2641  .Case("ult", CmpInst::ICMP_ULT)
2642  .Case("ule", CmpInst::ICMP_ULE)
2644  if (!CmpInst::isIntPredicate(Pred))
2645  return error("invalid integer predicate");
2646  }
2647 
2648  lex();
2649  Dest = MachineOperand::CreatePredicate(Pred);
2650  if (expectAndConsume(MIToken::rparen))
2651  return error("predicate should be terminated by ')'.");
2652 
2653  return false;
2654 }
2655 
2656 bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {
2657  assert(Token.is(MIToken::kw_shufflemask));
2658 
2659  lex();
2660  if (expectAndConsume(MIToken::lparen))
2661  return error("expected syntax shufflemask(<integer or undef>, ...)");
2662 
2663  SmallVector<int, 32> ShufMask;
2664  do {
2665  if (Token.is(MIToken::kw_undef)) {
2666  ShufMask.push_back(-1);
2667  } else if (Token.is(MIToken::IntegerLiteral)) {
2668  const APSInt &Int = Token.integerValue();
2669  ShufMask.push_back(Int.getExtValue());
2670  } else
2671  return error("expected integer constant");
2672 
2673  lex();
2674  } while (consumeIfPresent(MIToken::comma));
2675 
2676  if (expectAndConsume(MIToken::rparen))
2677  return error("shufflemask should be terminated by ')'.");
2678 
2679  ArrayRef<int> MaskAlloc = MF.allocateShuffleMask(ShufMask);
2680  Dest = MachineOperand::CreateShuffleMask(MaskAlloc);
2681  return false;
2682 }
2683 
2684 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
2685  assert(Token.is(MIToken::kw_target_index));
2686  lex();
2687  if (expectAndConsume(MIToken::lparen))
2688  return true;
2689  if (Token.isNot(MIToken::Identifier))
2690  return error("expected the name of the target index");
2691  int Index = 0;
2692  if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2693  return error("use of undefined target index '" + Token.stringValue() + "'");
2694  lex();
2695  if (expectAndConsume(MIToken::rparen))
2696  return true;
2697  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
2698  if (parseOperandsOffset(Dest))
2699  return true;
2700  return false;
2701 }
2702 
2703 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
2704  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2705  lex();
2706  if (expectAndConsume(MIToken::lparen))
2707  return true;
2708 
2709  uint32_t *Mask = MF.allocateRegMask();
2710  while (true) {
2711  if (Token.isNot(MIToken::NamedRegister))
2712  return error("expected a named register");
2713  Register Reg;
2714  if (parseNamedRegister(Reg))
2715  return true;
2716  lex();
2717  Mask[Reg / 32] |= 1U << (Reg % 32);
2718  // TODO: Report an error if the same register is used more than once.
2719  if (Token.isNot(MIToken::comma))
2720  break;
2721  lex();
2722  }
2723 
2724  if (expectAndConsume(MIToken::rparen))
2725  return true;
2727  return false;
2728 }
2729 
2730 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
2731  assert(Token.is(MIToken::kw_liveout));
2732  uint32_t *Mask = MF.allocateRegMask();
2733  lex();
2734  if (expectAndConsume(MIToken::lparen))
2735  return true;
2736  while (true) {
2737  if (Token.isNot(MIToken::NamedRegister))
2738  return error("expected a named register");
2739  Register Reg;
2740  if (parseNamedRegister(Reg))
2741  return true;
2742  lex();
2743  Mask[Reg / 32] |= 1U << (Reg % 32);
2744  // TODO: Report an error if the same register is used more than once.
2745  if (Token.isNot(MIToken::comma))
2746  break;
2747  lex();
2748  }
2749  if (expectAndConsume(MIToken::rparen))
2750  return true;
2752  return false;
2753 }
2754 
2755 bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
2756  MachineOperand &Dest,
2757  Optional<unsigned> &TiedDefIdx) {
2758  switch (Token.kind()) {
2759  case MIToken::kw_implicit:
2761  case MIToken::kw_def:
2762  case MIToken::kw_dead:
2763  case MIToken::kw_killed:
2764  case MIToken::kw_undef:
2765  case MIToken::kw_internal:
2767  case MIToken::kw_debug_use:
2768  case MIToken::kw_renamable:
2769  case MIToken::underscore:
2773  return parseRegisterOperand(Dest, TiedDefIdx);
2775  return parseImmediateOperand(Dest);
2776  case MIToken::kw_half:
2777  case MIToken::kw_float:
2778  case MIToken::kw_double:
2779  case MIToken::kw_x86_fp80:
2780  case MIToken::kw_fp128:
2781  case MIToken::kw_ppc_fp128:
2782  return parseFPImmediateOperand(Dest);
2784  return parseMBBOperand(Dest);
2785  case MIToken::StackObject:
2786  return parseStackObjectOperand(Dest);
2788  return parseFixedStackObjectOperand(Dest);
2789  case MIToken::GlobalValue:
2791  return parseGlobalAddressOperand(Dest);
2793  return parseConstantPoolIndexOperand(Dest);
2795  return parseJumpTableIndexOperand(Dest);
2797  return parseExternalSymbolOperand(Dest);
2798  case MIToken::MCSymbol:
2799  return parseMCSymbolOperand(Dest);
2801  return parseSubRegisterIndexOperand(Dest);
2802  case MIToken::md_diexpr:
2803  case MIToken::exclaim:
2804  return parseMetadataOperand(Dest);
2821  return parseCFIOperand(Dest);
2823  return parseBlockAddressOperand(Dest);
2824  case MIToken::kw_intrinsic:
2825  return parseIntrinsicOperand(Dest);
2827  return parseTargetIndexOperand(Dest);
2828  case MIToken::kw_liveout:
2829  return parseLiveoutRegisterMaskOperand(Dest);
2830  case MIToken::kw_floatpred:
2831  case MIToken::kw_intpred:
2832  return parsePredicateOperand(Dest);
2834  return parseShuffleMaskOperand(Dest);
2835  case MIToken::Error:
2836  return true;
2837  case MIToken::Identifier:
2838  if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2839  Dest = MachineOperand::CreateRegMask(RegMask);
2840  lex();
2841  break;
2842  } else if (Token.stringValue() == "CustomRegMask") {
2843  return parseCustomRegisterMaskOperand(Dest);
2844  } else
2845  return parseTypedImmediateOperand(Dest);
2846  case MIToken::dot: {
2847  const auto *TII = MF.getSubtarget().getInstrInfo();
2848  if (const auto *Formatter = TII->getMIRFormatter()) {
2849  return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
2850  }
2852  }
2853  default:
2854  // FIXME: Parse the MCSymbol machine operand.
2855  return error("expected a machine operand");
2856  }
2857  return false;
2858 }
2859 
2860 bool MIParser::parseMachineOperandAndTargetFlags(
2861  const unsigned OpCode, const unsigned OpIdx, MachineOperand &Dest,
2862  Optional<unsigned> &TiedDefIdx) {
2863  unsigned TF = 0;
2864  bool HasTargetFlags = false;
2865  if (Token.is(MIToken::kw_target_flags)) {
2866  HasTargetFlags = true;
2867  lex();
2868  if (expectAndConsume(MIToken::lparen))
2869  return true;
2870  if (Token.isNot(MIToken::Identifier))
2871  return error("expected the name of the target flag");
2872  if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2873  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2874  return error("use of undefined target flag '" + Token.stringValue() +
2875  "'");
2876  }
2877  lex();
2878  while (Token.is(MIToken::comma)) {
2879  lex();
2880  if (Token.isNot(MIToken::Identifier))
2881  return error("expected the name of the target flag");
2882  unsigned BitFlag = 0;
2883  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2884  return error("use of undefined target flag '" + Token.stringValue() +
2885  "'");
2886  // TODO: Report an error when using a duplicate bit target flag.
2887  TF |= BitFlag;
2888  lex();
2889  }
2890  if (expectAndConsume(MIToken::rparen))
2891  return true;
2892  }
2893  auto Loc = Token.location();
2894  if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
2895  return true;
2896  if (!HasTargetFlags)
2897  return false;
2898  if (Dest.isReg())
2899  return error(Loc, "register operands can't have target flags");
2900  Dest.setTargetFlags(TF);
2901  return false;
2902 }
2903 
2904 bool MIParser::parseOffset(int64_t &Offset) {
2905  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2906  return false;
2907  StringRef Sign = Token.range();
2908  bool IsNegative = Token.is(MIToken::minus);
2909  lex();
2910  if (Token.isNot(MIToken::IntegerLiteral))
2911  return error("expected an integer literal after '" + Sign + "'");
2912  if (Token.integerValue().getMinSignedBits() > 64)
2913  return error("expected 64-bit integer (too large)");
2914  Offset = Token.integerValue().getExtValue();
2915  if (IsNegative)
2916  Offset = -Offset;
2917  lex();
2918  return false;
2919 }
2920 
2921 bool MIParser::parseAlignment(uint64_t &Alignment) {
2922  assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
2923  lex();
2924  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2925  return error("expected an integer literal after 'align'");
2926  if (getUint64(Alignment))
2927  return true;
2928  lex();
2929 
2930  if (!isPowerOf2_64(Alignment))
2931  return error("expected a power-of-2 literal after 'align'");
2932 
2933  return false;
2934 }
2935 
2936 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2937  assert(Token.is(MIToken::kw_addrspace));
2938  lex();
2939  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2940  return error("expected an integer literal after 'addrspace'");
2941  if (getUnsigned(Addrspace))
2942  return true;
2943  lex();
2944  return false;
2945 }
2946 
2947 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2948  int64_t Offset = 0;
2949  if (parseOffset(Offset))
2950  return true;
2951  Op.setOffset(Offset);
2952  return false;
2953 }
2954 
2955 static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS,
2956  const Value *&V, ErrorCallbackType ErrCB) {
2957  switch (Token.kind()) {
2958  case MIToken::NamedIRValue: {
2959  V = PFS.MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
2960  break;
2961  }
2962  case MIToken::IRValue: {
2963  unsigned SlotNumber = 0;
2964  if (getUnsigned(Token, SlotNumber, ErrCB))
2965  return true;
2966  V = PFS.getIRValue(SlotNumber);
2967  break;
2968  }
2970  case MIToken::GlobalValue: {
2971  GlobalValue *GV = nullptr;
2972  if (parseGlobalValue(Token, PFS, GV, ErrCB))
2973  return true;
2974  V = GV;
2975  break;
2976  }
2977  case MIToken::QuotedIRValue: {
2978  const Constant *C = nullptr;
2979  if (parseIRConstant(Token.location(), Token.stringValue(), PFS, C, ErrCB))
2980  return true;
2981  V = C;
2982  break;
2983  }
2985  V = nullptr;
2986  return false;
2987  default:
2988  llvm_unreachable("The current token should be an IR block reference");
2989  }
2990  if (!V)
2991  return ErrCB(Token.location(), Twine("use of undefined IR value '") + Token.range() + "'");
2992  return false;
2993 }
2994 
2995 bool MIParser::parseIRValue(const Value *&V) {
2997  Token, PFS, V, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2998  return error(Loc, Msg);
2999  });
3000 }
3001 
3002 bool MIParser::getUint64(uint64_t &Result) {
3003  if (Token.hasIntegerValue()) {
3004  if (Token.integerValue().getActiveBits() > 64)
3005  return error("expected 64-bit integer (too large)");
3006  Result = Token.integerValue().getZExtValue();
3007  return false;
3008  }
3009  if (Token.is(MIToken::HexLiteral)) {
3010  APInt A;
3011  if (getHexUint(A))
3012  return true;
3013  if (A.getBitWidth() > 64)
3014  return error("expected 64-bit integer (too large)");
3015  Result = A.getZExtValue();
3016  return false;
3017  }
3018  return true;
3019 }
3020 
3021 bool MIParser::getHexUint(APInt &Result) {
3022  return ::getHexUint(Token, Result);
3023 }
3024 
3025 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
3026  const auto OldFlags = Flags;
3027  switch (Token.kind()) {
3028  case MIToken::kw_volatile:
3030  break;
3033  break;
3036  break;
3037  case MIToken::kw_invariant:
3039  break;
3040  case MIToken::StringConstant: {
3042  if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
3043  return error("use of undefined target MMO flag '" + Token.stringValue() +
3044  "'");
3045  Flags |= TF;
3046  break;
3047  }
3048  default:
3049  llvm_unreachable("The current token should be a memory operand flag");
3050  }
3051  if (OldFlags == Flags)
3052  // We know that the same flag is specified more than once when the flags
3053  // weren't modified.
3054  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
3055  lex();
3056  return false;
3057 }
3058 
3059 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
3060  switch (Token.kind()) {
3061  case MIToken::kw_stack:
3062  PSV = MF.getPSVManager().getStack();
3063  break;
3064  case MIToken::kw_got:
3065  PSV = MF.getPSVManager().getGOT();
3066  break;
3068  PSV = MF.getPSVManager().getJumpTable();
3069  break;
3071  PSV = MF.getPSVManager().getConstantPool();
3072  break;
3074  int FI;
3075  if (parseFixedStackFrameIndex(FI))
3076  return true;
3077  PSV = MF.getPSVManager().getFixedStack(FI);
3078  // The token was already consumed, so use return here instead of break.
3079  return false;
3080  }
3081  case MIToken::StackObject: {
3082  int FI;
3083  if (parseStackFrameIndex(FI))
3084  return true;
3085  PSV = MF.getPSVManager().getFixedStack(FI);
3086  // The token was already consumed, so use return here instead of break.
3087  return false;
3088  }
3090  lex();
3091  switch (Token.kind()) {
3092  case MIToken::GlobalValue:
3094  GlobalValue *GV = nullptr;
3095  if (parseGlobalValue(GV))
3096  return true;
3097  PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
3098  break;
3099  }
3101  PSV = MF.getPSVManager().getExternalSymbolCallEntry(
3102  MF.createExternalSymbolName(Token.stringValue()));
3103  break;
3104  default:
3105  return error(
3106  "expected a global value or an external symbol after 'call-entry'");
3107  }
3108  break;
3109  case MIToken::kw_custom: {
3110  lex();
3111  const auto *TII = MF.getSubtarget().getInstrInfo();
3112  if (const auto *Formatter = TII->getMIRFormatter()) {
3113  if (Formatter->parseCustomPseudoSourceValue(
3114  Token.stringValue(), MF, PFS, PSV,
3115  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
3116  return error(Loc, Msg);
3117  }))
3118  return true;
3119  } else
3120  return error("unable to parse target custom pseudo source value");
3121  break;
3122  }
3123  default:
3124  llvm_unreachable("The current token should be pseudo source value");
3125  }
3126  lex();
3127  return false;
3128 }
3129 
3130 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
3131  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
3132  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
3133  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
3134  Token.is(MIToken::kw_call_entry) || Token.is(MIToken::kw_custom)) {
3135  const PseudoSourceValue *PSV = nullptr;
3136  if (parseMemoryPseudoSourceValue(PSV))
3137  return true;
3138  int64_t Offset = 0;
3139  if (parseOffset(Offset))
3140  return true;
3141  Dest = MachinePointerInfo(PSV, Offset);
3142  return false;
3143  }
3144  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
3145  Token.isNot(MIToken::GlobalValue) &&
3146  Token.isNot(MIToken::NamedGlobalValue) &&
3147  Token.isNot(MIToken::QuotedIRValue) &&
3148  Token.isNot(MIToken::kw_unknown_address))
3149  return error("expected an IR value reference");
3150  const Value *V = nullptr;
3151  if (parseIRValue(V))
3152  return true;
3153  if (V && !V->getType()->isPointerTy())
3154  return error("expected a pointer IR value");
3155  lex();
3156  int64_t Offset = 0;
3157  if (parseOffset(Offset))
3158  return true;
3159  Dest = MachinePointerInfo(V, Offset);
3160  return false;
3161 }
3162 
3163 bool MIParser::parseOptionalScope(LLVMContext &Context,
3164  SyncScope::ID &SSID) {
3165  SSID = SyncScope::System;
3166  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
3167  lex();
3168  if (expectAndConsume(MIToken::lparen))
3169  return error("expected '(' in syncscope");
3170 
3171  std::string SSN;
3172  if (parseStringConstant(SSN))
3173  return true;
3174 
3175  SSID = Context.getOrInsertSyncScopeID(SSN);
3176  if (expectAndConsume(MIToken::rparen))
3177  return error("expected ')' in syncscope");
3178  }
3179 
3180  return false;
3181 }
3182 
3183 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
3184  Order = AtomicOrdering::NotAtomic;
3185  if (Token.isNot(MIToken::Identifier))
3186  return false;
3187 
3188  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
3189  .Case("unordered", AtomicOrdering::Unordered)
3190  .Case("monotonic", AtomicOrdering::Monotonic)
3191  .Case("acquire", AtomicOrdering::Acquire)
3192  .Case("release", AtomicOrdering::Release)
3196 
3197  if (Order != AtomicOrdering::NotAtomic) {
3198  lex();
3199  return false;
3200  }
3201 
3202  return error("expected an atomic scope, ordering or a size specification");
3203 }
3204 
3205 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
3206  if (expectAndConsume(MIToken::lparen))
3207  return true;
3209  while (Token.isMemoryOperandFlag()) {
3210  if (parseMemoryOperandFlag(Flags))
3211  return true;
3212  }
3213  if (Token.isNot(MIToken::Identifier) ||
3214  (Token.stringValue() != "load" && Token.stringValue() != "store"))
3215  return error("expected 'load' or 'store' memory operation");
3216  if (Token.stringValue() == "load")
3217  Flags |= MachineMemOperand::MOLoad;
3218  else
3219  Flags |= MachineMemOperand::MOStore;
3220  lex();
3221 
3222  // Optional 'store' for operands that both load and store.
3223  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
3224  Flags |= MachineMemOperand::MOStore;
3225  lex();
3226  }
3227 
3228  // Optional synchronization scope.
3229  SyncScope::ID SSID;
3230  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3231  return true;
3232 
3233  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
3234  AtomicOrdering Order, FailureOrder;
3235  if (parseOptionalAtomicOrdering(Order))
3236  return true;
3237 
3238  if (parseOptionalAtomicOrdering(FailureOrder))
3239  return true;
3240 
3241  LLT MemoryType;
3242  if (Token.isNot(MIToken::IntegerLiteral) &&
3243  Token.isNot(MIToken::kw_unknown_size) &&
3244  Token.isNot(MIToken::lparen))
3245  return error("expected memory LLT, the size integer literal or 'unknown-size' after "
3246  "memory operation");
3247 
3249  if (Token.is(MIToken::IntegerLiteral)) {
3250  if (getUint64(Size))
3251  return true;
3252 
3253  // Convert from bytes to bits for storage.
3254  MemoryType = LLT::scalar(8 * Size);
3255  lex();
3256  } else if (Token.is(MIToken::kw_unknown_size)) {
3258  lex();
3259  } else {
3260  if (expectAndConsume(MIToken::lparen))
3261  return true;
3262  if (parseLowLevelType(Token.location(), MemoryType))
3263  return true;
3264  if (expectAndConsume(MIToken::rparen))
3265  return true;
3266 
3267  Size = MemoryType.getSizeInBytes();
3268  }
3269 
3271  if (Token.is(MIToken::Identifier)) {
3272  const char *Word =
3273  ((Flags & MachineMemOperand::MOLoad) &&
3274  (Flags & MachineMemOperand::MOStore))
3275  ? "on"
3276  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
3277  if (Token.stringValue() != Word)
3278  return error(Twine("expected '") + Word + "'");
3279  lex();
3280 
3281  if (parseMachinePointerInfo(Ptr))
3282  return true;
3283  }
3284  uint64_t BaseAlignment =
3286  AAMDNodes AAInfo;
3287  MDNode *Range = nullptr;
3288  while (consumeIfPresent(MIToken::comma)) {
3289  switch (Token.kind()) {
3290  case MIToken::kw_align: {
3291  // align is printed if it is different than size.
3293  if (parseAlignment(Alignment))
3294  return true;
3295  if (Ptr.Offset & (Alignment - 1)) {
3296  // MachineMemOperand::getAlign never returns a value greater than the
3297  // alignment of offset, so this just guards against hand-written MIR
3298  // that specifies a large "align" value when it should probably use
3299  // "basealign" instead.
3300  return error("specified alignment is more aligned than offset");
3301  }
3302  BaseAlignment = Alignment;
3303  break;
3304  }
3305  case MIToken::kw_basealign:
3306  // basealign is printed if it is different than align.
3307  if (parseAlignment(BaseAlignment))
3308  return true;
3309  break;
3310  case MIToken::kw_addrspace:
3311  if (parseAddrspace(Ptr.AddrSpace))
3312  return true;
3313  break;
3314  case MIToken::md_tbaa:
3315  lex();
3316  if (parseMDNode(AAInfo.TBAA))
3317  return true;
3318  break;
3320  lex();
3321  if (parseMDNode(AAInfo.Scope))
3322  return true;
3323  break;
3324  case MIToken::md_noalias:
3325  lex();
3326  if (parseMDNode(AAInfo.NoAlias))
3327  return true;
3328  break;
3329  case MIToken::md_range:
3330  lex();
3331  if (parseMDNode(Range))
3332  return true;
3333  break;
3334  // TODO: Report an error on duplicate metadata nodes.
3335  default:
3336  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
3337  "'!noalias' or '!range'");
3338  }
3339  }
3340  if (expectAndConsume(MIToken::rparen))
3341  return true;
3342  Dest = MF.getMachineMemOperand(Ptr, Flags, MemoryType, Align(BaseAlignment),
3343  AAInfo, Range, SSID, Order, FailureOrder);
3344  return false;
3345 }
3346 
3347 bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
3348  assert((Token.is(MIToken::kw_pre_instr_symbol) ||
3349  Token.is(MIToken::kw_post_instr_symbol)) &&
3350  "Invalid token for a pre- post-instruction symbol!");
3351  lex();
3352  if (Token.isNot(MIToken::MCSymbol))
3353  return error("expected a symbol after 'pre-instr-symbol'");
3354  Symbol = getOrCreateMCSymbol(Token.stringValue());
3355  lex();
3356  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3357  Token.is(MIToken::lbrace))
3358  return false;
3359  if (Token.isNot(MIToken::comma))
3360  return error("expected ',' before the next machine operand");
3361  lex();
3362  return false;
3363 }
3364 
3365 bool MIParser::parseHeapAllocMarker(MDNode *&Node) {
3367  "Invalid token for a heap alloc marker!");
3368  lex();
3369  parseMDNode(Node);
3370  if (!Node)
3371  return error("expected a MDNode after 'heap-alloc-marker'");
3372  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3373  Token.is(MIToken::lbrace))
3374  return false;
3375  if (Token.isNot(MIToken::comma))
3376  return error("expected ',' before the next machine operand");
3377  lex();
3378  return false;
3379 }
3380 
3382  const Function &F,
3383  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3384  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
3385  MST.incorporateFunction(F);
3386  for (auto &BB : F) {
3387  if (BB.hasName())
3388  continue;
3389  int Slot = MST.getLocalSlot(&BB);
3390  if (Slot == -1)
3391  continue;
3392  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
3393  }
3394 }
3395 
3397  unsigned Slot,
3398  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3399  return Slots2BasicBlocks.lookup(Slot);
3400 }
3401 
3402 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
3403  if (Slots2BasicBlocks.empty())
3404  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
3405  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
3406 }
3407 
3408 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
3409  if (&F == &MF.getFunction())
3410  return getIRBlock(Slot);
3411  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
3412  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
3413  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
3414 }
3415 
3416 MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
3417  // FIXME: Currently we can't recognize temporary or local symbols and call all
3418  // of the appropriate forms to create them. However, this handles basic cases
3419  // well as most of the special aspects are recognized by a prefix on their
3420  // name, and the input names should already be unique. For test cases, keeping
3421  // the symbol name out of the symbol table isn't terribly important.
3422  return MF.getContext().getOrCreateSymbol(Name);
3423 }
3424 
3425 bool MIParser::parseStringConstant(std::string &Result) {
3426  if (Token.isNot(MIToken::StringConstant))
3427  return error("expected string constant");
3428  Result = std::string(Token.stringValue());
3429  lex();
3430  return false;
3431 }
3432 
3434  StringRef Src,
3435  SMDiagnostic &Error) {
3436  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
3437 }
3438 
3440  StringRef Src, SMDiagnostic &Error) {
3441  return MIParser(PFS, Error, Src).parseBasicBlocks();
3442 }
3443 
3446  SMDiagnostic &Error) {
3447  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
3448 }
3449 
3451  Register &Reg, StringRef Src,
3452  SMDiagnostic &Error) {
3453  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
3454 }
3455 
3457  Register &Reg, StringRef Src,
3458  SMDiagnostic &Error) {
3459  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
3460 }
3461 
3463  VRegInfo *&Info, StringRef Src,
3464  SMDiagnostic &Error) {
3465  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
3466 }
3467 
3469  int &FI, StringRef Src,
3470  SMDiagnostic &Error) {
3471  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
3472 }
3473 
3475  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
3476  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
3477 }
3478 
3480  SMRange SrcRange, SMDiagnostic &Error) {
3481  return MIParser(PFS, Error, Src, SrcRange).parseMachineMetadata();
3482 }
3483 
3485  PerFunctionMIParsingState &PFS, const Value *&V,
3486  ErrorCallbackType ErrorCallback) {
3487  MIToken Token;
3488  Src = lexMIToken(Src, Token, [&](StringRef::iterator Loc, const Twine &Msg) {
3489  ErrorCallback(Loc, Msg);
3490  });
3491  V = nullptr;
3492 
3493  return ::parseIRValue(Token, PFS, V, ErrorCallback);
3494 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:76
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:69
llvm::RegState::InternalRead
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
Definition: MachineInstrBuilder.h:59
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm::MachineOperand::CreateCPI
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:837
MemoryBuffer.h
llvm::CmpInst::FCMP_ULE
@ FCMP_ULE
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:734
llvm::MachineOperand::CreateJTI
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Definition: MachineOperand.h:853
llvm::MIToken::kw_float
@ kw_float
Definition: MILexer.h:98
llvm::AtomicOrdering::AcquireRelease
@ AcquireRelease
llvm::MIToken::NamedRegister
@ NamedRegister
Definition: MILexer.h:146
llvm::MIToken::kw_cfi_offset
@ kw_cfi_offset
Definition: MILexer.h:79
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
ErrorCallbackType
function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
Definition: MIParser.cpp:608
MachineInstr.h
llvm::ModuleSlotTracker::getLocalSlot
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:868
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::MCRegisterInfo::getName
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
Definition: MCRegisterInfo.h:485
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::CmpInst::ICMP_EQ
@ ICMP_EQ
equal
Definition: InstrTypes.h:740
llvm::MachineRegisterInfo::createIncompleteVirtualRegister
Register createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
Definition: MachineRegisterInfo.cpp:144
Optional.h
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::MachineOperand::CreateReg
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition: MachineOperand.h:800
getIRBlockFromSlot
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3396
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:44
llvm::MIToken::kw_exact
@ kw_exact
Definition: MILexer.h:74
llvm::MIToken::kw_unknown_size
@ kw_unknown_size
Definition: MILexer.h:130
llvm::MIToken::colon
@ colon
Definition: MILexer.h:37
Metadata.h
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:719
llvm::MIToken::FixedStackObject
@ FixedStackObject
Definition: MILexer.h:151
llvm::MIToken::kw_nsz
@ kw_nsz
Definition: MILexer.h:67
llvm::Type::isPointerTy
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:218
llvm::MIToken::GlobalValue
@ GlobalValue
Definition: MILexer.h:153
llvm::MIToken::VirtualRegister
@ VirtualRegister
Definition: MILexer.h:162
AtomicOrdering.h
DebugInfoMetadata.h
MCInstrDesc.h
llvm::MIToken::kw_cfi_restore_state
@ kw_cfi_restore_state
Definition: MILexer.h:90
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
T
llvm::Function
Definition: Function.h:60
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::lookup
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
Definition: DenseMap.h:199
llvm::MIToken::md_noalias
@ md_noalias
Definition: MILexer.h:139
StringRef.h
llvm::MIToken::Error
@ Error
Definition: MILexer.h:30
llvm::MIToken::kw_call_entry
@ kw_call_entry
Definition: MILexer.h:114
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:93
llvm::StringSwitch::Default
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:183
llvm::VRegInfo::RegBank
const RegisterBank * RegBank
Definition: MIParser.h:44
llvm::PerTargetMIParsingState::getRegBank
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
Definition: MIParser.cpp:309
llvm::MIToken::kw_early_clobber
@ kw_early_clobber
Definition: MILexer.h:59
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:140
llvm::MIToken::integerValue
const APSInt & integerValue() const
Definition: MILexer.h:228
llvm::TargetRegisterInfo::getRegMaskNames
virtual ArrayRef< const char * > getRegMaskNames() const =0
llvm::StringRef::npos
static constexpr size_t npos
Definition: StringRef.h:60
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:52
llvm::PerTargetMIParsingState
Definition: MIParser.h:53
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::MIToken::kw_cfi_def_cfa
@ kw_cfi_def_cfa
Definition: MILexer.h:85
llvm::CmpInst::FCMP_ONE
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:727
mapValueToSlot
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
Definition: MIParser.cpp:344
llvm::VRegInfo::Kind
enum llvm::VRegInfo::uint8_t Kind
llvm::RegisterBankInfo::getRegBank
RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
Definition: RegisterBankInfo.h:431
ErrorHandling.h
llvm::MCRegisterInfo::getDwarfRegNum
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
Definition: MCRegisterInfo.cpp:68
llvm::PerFunctionMIParsingState::PerFunctionMIParsingState
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
Definition: MIParser.cpp:316
llvm::MCRegisterInfo::getNumRegs
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Definition: MCRegisterInfo.h:491
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::MIToken::kw_double
@ kw_double
Definition: MILexer.h:99
llvm::MachineMemOperand::MOInvariant
@ MOInvariant
The memory access always returns the same value (or traps).
Definition: MachineMemOperand.h:143
RegisterBankInfo.h
llvm::CmpInst::ICMP_NE
@ ICMP_NE
not equal
Definition: InstrTypes.h:741
llvm::AtomicOrdering::SequentiallyConsistent
@ SequentiallyConsistent
llvm::MIToken::kw_post_instr_symbol
@ kw_post_instr_symbol
Definition: MILexer.h:127
MachineBasicBlock.h
llvm::lltok::APSInt
@ APSInt
Definition: LLToken.h:426
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:125
llvm::MIToken::kw_afn
@ kw_afn
Definition: MILexer.h:70
llvm::MemOp
Definition: TargetLowering.h:111
APInt.h
llvm::MIToken::NamedGlobalValue
@ NamedGlobalValue
Definition: MILexer.h:152
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
llvm::CmpInst::ICMP_SGT
@ ICMP_SGT
signed greater than
Definition: InstrTypes.h:746
llvm::AAMDNodes
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:652
llvm::MCCFIInstruction::createRelOffset
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
Definition: MCDwarf.h:572
llvm::StringMap::end
iterator end()
Definition: StringMap.h:205
llvm::HexagonInstrInfo::getSerializableBitmaskMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
Definition: HexagonInstrInfo.cpp:2082
DenseMap.h
llvm::MachineOperand::CreateMetadata
static MachineOperand CreateMetadata(const MDNode *Meta)
Definition: MachineOperand.h:907
Module.h
llvm::parseMachineInstructions
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:3439
llvm::MachineOperand::CreateCFIIndex
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
Definition: MachineOperand.h:922
llvm::MIToken::kw_renamable
@ kw_renamable
Definition: MILexer.h:61
TargetInstrInfo.h
llvm::MachineInstr::FmAfn
@ FmAfn
Definition: MachineInstr.h:100
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:126
llvm::RegState::Debug
@ Debug
Register 'use' is for debugging purpose.
Definition: MachineInstrBuilder.h:56
llvm::MIToken::underscore
@ underscore
Definition: MILexer.h:36
llvm::MIToken::kw_nofpexcept
@ kw_nofpexcept
Definition: MILexer.h:75
getHexUint
static bool getHexUint(const MIToken &Token, APInt &Result)
Definition: MIParser.cpp:1941
llvm::VRegInfo::REGBANK
@ REGBANK
Definition: MIParser.h:39
llvm::MachineMemOperand::MODereferenceable
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
Definition: MachineMemOperand.h:141
llvm::LLT::isValid
bool isValid() const
Definition: LowLevelTypeImpl.h:116
llvm::MIToken::kw_frame_destroy
@ kw_frame_destroy
Definition: MILexer.h:64
error
#define error(X)
Definition: SymbolRecordMapping.cpp:14
llvm::PerFunctionMIParsingState::VRegInfosNamed
StringMap< VRegInfo * > VRegInfosNamed
Definition: MIParser.h:174
llvm::HexagonInstrInfo::getSerializableDirectMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
Definition: HexagonInstrInfo.cpp:2063
llvm::MIToken::kw_inlineasm_br_indirect_target
@ kw_inlineasm_br_indirect_target
Definition: MILexer.h:119
llvm::Optional< unsigned >
printImplicitRegisterFlag
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:1332
llvm::MIToken::kw_ninf
@ kw_ninf
Definition: MILexer.h:66
llvm::CmpInst::ICMP_SLE
@ ICMP_SLE
signed less or equal
Definition: InstrTypes.h:749
llvm::MIToken::kw_addrspace
@ kw_addrspace
Definition: MILexer.h:109
llvm::PerFunctionMIParsingState::getVRegInfoNamed
VRegInfo & getVRegInfoNamed(StringRef RegName)
Definition: MIParser.cpp:332
llvm::Intrinsic::not_intrinsic
@ not_intrinsic
Definition: Intrinsics.h:45
llvm::MIToken::kw_cfi_register
@ kw_cfi_register
Definition: MILexer.h:87
llvm::VRegInfo::D
union llvm::VRegInfo::@198 D
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:854
llvm::PowerOf2Ceil
uint64_t PowerOf2Ceil(uint64_t A)
Returns the power of two which is greater than or equal to the given value.
Definition: MathExtras.h:729
llvm::StringMap::find
iterator find(StringRef Key)
Definition: StringMap.h:218
llvm::MBBSectionID
Definition: MachineBasicBlock.h:51
llvm::AAMDNodes::Scope
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:675
llvm::minidump::MemoryType
MemoryType
Definition: Minidump.h:98
llvm::PerTargetMIParsingState::getMMOTargetFlag
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.
Definition: MIParser.cpp:262
llvm::VRegInfo::RC
const TargetRegisterClass * RC
Definition: MIParser.h:43
llvm::CmpInst::FCMP_OGT
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:723
llvm::MCCFIInstruction::createSameValue
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:609
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:44
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1620
llvm::BasicBlockSection::List
@ List
llvm::MIToken::range
StringRef range() const
Definition: MILexer.h:223
llvm::MCRegisterInfo::getNumSubRegIndices
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
Definition: MCRegisterInfo.h:498
llvm::MIToken::kw_internal
@ kw_internal
Definition: MILexer.h:58
llvm::RegState::EarlyClobber
@ EarlyClobber
Register definition happens before uses.
Definition: MachineInstrBuilder.h:54
llvm::MemoryBuffer
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:50
llvm::MIToken
A token produced by the machine instruction lexer.
Definition: MILexer.h:26
llvm::MCCFIInstruction::createLLVMDefAspaceCfa
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int Offset, unsigned AddressSpace)
.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...
Definition: MCDwarf.h:555
llvm::MDNode::get
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1300
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:540
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:86
llvm::MachineOperand::CreateES
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
Definition: MachineOperand.h:867
llvm::AtomicOrdering::Monotonic
@ Monotonic
llvm::parseMachineBasicBlockDefinitions
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:3433
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::PerTargetMIParsingState::parseInstrName
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
Definition: MIParser.cpp:140
llvm::PerFunctionMIParsingState::Allocator
BumpPtrAllocator Allocator
Definition: MIParser.h:163
llvm::MIToken::kw_cfi_def_cfa_register
@ kw_cfi_def_cfa_register
Definition: MILexer.h:81
llvm::TargetIntrinsicInfo
TargetIntrinsicInfo - Interface to description of machine instruction set.
Definition: TargetIntrinsicInfo.h:29
llvm::MDTuple::getDistinct
static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a distinct node.
Definition: Metadata.h:1278
llvm::MIToken::kw_killed
@ kw_killed
Definition: MILexer.h:56
parseIRConstant
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1788
llvm::Optional::hasValue
constexpr bool hasValue() const
Definition: Optional.h:283
llvm::MIToken::NamedIRValue
@ NamedIRValue
Definition: MILexer.h:167
llvm::MIToken::stringValue
StringRef stringValue() const
Return the token's string value.
Definition: MILexer.h:226
llvm::CmpInst::FCMP_ULT
@ FCMP_ULT
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:733
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::MachinePointerInfo::Offset
int64_t Offset
Offset - This is an offset from the base Value*.
Definition: MachineMemOperand.h:43
llvm::MIToken::kw_arcp
@ kw_arcp
Definition: MILexer.h:68
llvm::ConstantInfo
Definition: ConstantsContext.h:390
llvm::MIToken::kw_debug_use
@ kw_debug_use
Definition: MILexer.h:60
llvm::LLT::fixed_vector
static LLT fixed_vector(unsigned NumElements, unsigned ScalarSizeInBits)
Get a low-level fixed-width vector of some number of elements and element width.
Definition: LowLevelTypeImpl.h:74
llvm::MIToken::MachineBasicBlockLabel
@ MachineBasicBlockLabel
Definition: MILexer.h:148
llvm::MachineBasicBlock::setSectionID
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
Definition: MachineBasicBlock.h:605
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:186
llvm::MIToken::kw_cfi_llvm_def_aspace_cfa
@ kw_cfi_llvm_def_aspace_cfa
Definition: MILexer.h:86
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:747
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
verifyScalarSize
static bool verifyScalarSize(uint64_t Size)
Definition: MIParser.cpp:1817
llvm::MachineBasicBlock::setIsInlineAsmBrIndirectTarget
void setIsInlineAsmBrIndirectTarget(bool V=true)
Indicates if this is the indirect dest of an INLINEASM_BR.
Definition: MachineBasicBlock.h:621
llvm::all_of
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1607
verifyVectorElementCount
static bool verifyVectorElementCount(uint64_t NumElts)
Definition: MIParser.cpp:1821
verifyAddrSpace
static bool verifyAddrSpace(uint64_t AddrSpace)
Definition: MIParser.cpp:1825
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:650
llvm::MachineOperand::isImplicit
bool isImplicit() const
Definition: MachineOperand.h:379
llvm::MIToken::kw_cfi_remember_state
@ kw_cfi_remember_state
Definition: MILexer.h:88
llvm::parseStackObjectReference
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3468
llvm::parseMDNode
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3474
llvm::MIToken::kw_invariant
@ kw_invariant
Definition: MILexer.h:106
TargetMachine.h
llvm::DXIL::OpCode
OpCode
Definition: DXILConstants.h:18
llvm::RegisterBank
This class implements the register bank concept.
Definition: RegisterBank.h:28
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::CmpInst::isFPPredicate
bool isFPPredicate() const
Definition: InstrTypes.h:826
llvm::MIRFormatter::parseIRValue
static bool parseIRValue(StringRef Src, MachineFunction &MF, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrorCallback)
Helper functions to parse IR value from MIR serialization format which will be useful for target spec...
Definition: MIParser.cpp:3484
llvm::MachineRegisterInfo::setRegClassOrRegBank
void setRegClassOrRegBank(Register Reg, const RegClassOrRegBank &RCOrRB)
Definition: MachineRegisterInfo.h:686
llvm::MCInstrDesc::ImplicitUses
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:206
Constants.h
llvm::MachineRegisterInfo::setType
void setType(Register VReg, LLT Ty)
Set the low-level type of VReg to Ty.
Definition: MachineRegisterInfo.cpp:180
llvm::MIToken::kw_shufflemask
@ kw_shufflemask
Definition: MILexer.h:125
llvm::MemoryBuffer::getBufferEnd
const char * getBufferEnd() const
Definition: MemoryBuffer.h:66
llvm::MachineOperand::CreateImm
static MachineOperand CreateImm(int64_t Val)
Definition: MachineOperand.h:782
llvm::PerFunctionMIParsingState::IRSlots
const SlotMapping & IRSlots
Definition: MIParser.h:166
llvm::PerTargetMIParsingState::getTargetIndex
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
Definition: MIParser.cpp:198
llvm::MIRFormatter::parseImmMnemonic
virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, StringRef Src, int64_t &Imm, ErrorCallbackType ErrorCallback) const
Implement target specific parsing of immediate mnemonics.
Definition: MIRFormatter.h:46
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::isUse
bool isUse() const
Definition: MachineOperand.h:369
Intrinsics.h
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::CmpInst::ICMP_ULE
@ ICMP_ULE
unsigned less or equal
Definition: InstrTypes.h:745
llvm::ARM_PROC::A
@ A
Definition: ARMBaseInfo.h:34
Twine.h
InstrTypes.h
llvm::MIToken::equal
@ equal
Definition: MILexer.h:35
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::StringMap::insert
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
Definition: StringMap.h:276
MCContext.h
llvm::MachineBasicBlock::isSuccessor
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Definition: MachineBasicBlock.cpp:909
llvm::MIToken::kw_cfi_restore
@ kw_cfi_restore
Definition: MILexer.h:89
llvm::MIToken::kw_implicit
@ kw_implicit
Definition: MILexer.h:51
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::guessSuccessors
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:603
llvm::MIToken::FloatingPointLiteral
@ FloatingPointLiteral
Definition: MILexer.h:159
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:45
llvm::CmpInst::FCMP_UGE
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:732
llvm::MIToken::md_tbaa
@ md_tbaa
Definition: MILexer.h:137
llvm::SMDiagnostic
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
llvm::ms_demangle::QualifierMangleMode::Result
@ Result
llvm::MIToken::kw_x86_fp80
@ kw_x86_fp80
Definition: MILexer.h:100
llvm::StringRef::iterator
const char * iterator
Definition: StringRef.h:62
llvm::MCInstrDesc::getImplicitDefs
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
Definition: MCInstrDesc.h:587
UINT64_MAX
#define UINT64_MAX
Definition: DataTypes.h:77
llvm::APInt::getLimitedValue
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
Definition: APInt.h:456
llvm::MachineInstr::FmNoInfs
@ FmNoInfs
Definition: MachineInstr.h:92
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:127
llvm::dwarf::Index
Index
Definition: Dwarf.h:472
llvm::MIToken::kw_cfi_undefined
@ kw_cfi_undefined
Definition: MILexer.h:91
llvm::MIToken::kw_distinct
@ kw_distinct
Definition: MILexer.h:134
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:197
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:84
llvm::CmpInst::FCMP_UNO
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:729
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
SMLoc.h
llvm::MCCFIInstruction::createRestoreState
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:619
llvm::MIToken::kw_tied_def
@ kw_tied_def
Definition: MILexer.h:62
llvm::StringMap::clear
void clear()
Definition: StringMap.h:348
llvm::AtomicOrdering::Acquire
@ Acquire
llvm::MIToken::IRBlock
@ IRBlock
Definition: MILexer.h:166
llvm::APSInt
An arbitrary precision integer that knows its signedness.
Definition: APSInt.h:23
llvm::SourceMgr::getMainFileID
unsigned getMainFileID() const
Definition: SourceMgr.h:132
llvm::MachineOperand::CreateFI
static MachineOperand CreateFI(int Idx)
Definition: MachineOperand.h:832
llvm::MIToken::HexLiteral
@ HexLiteral
Definition: MILexer.h:160
llvm::MIToken::kw_cfi_escape
@ kw_cfi_escape
Definition: MILexer.h:84
llvm::CmpInst::FCMP_OEQ
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:722
DebugLoc.h
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::CmpInst::FCMP_OLT
@ FCMP_OLT
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:725
llvm::MachineOperand::setTargetFlags
void setTargetFlags(unsigned F)
Definition: MachineOperand.h:223
llvm::PseudoSourceValue
Special value supplied for machine level alias analysis.
Definition: PseudoSourceValue.h:35
StringMap.h
llvm::MIToken::kw_heap_alloc_marker
@ kw_heap_alloc_marker
Definition: MILexer.h:128
llvm::MachineInstr::NoSWrap
@ NoSWrap
Definition: MachineInstr.h:106
Align
uint64_t Align
Definition: ELFObjHandler.cpp:81
llvm::MCCFIInstruction::createEscape
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:625
llvm::Metadata
Root of the metadata hierarchy.
Definition: Metadata.h:62
llvm::PerTargetMIParsingState::getRegClass
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
Definition: MIParser.cpp:302
llvm::AddressSpace
AddressSpace
Definition: NVPTXBaseInfo.h:21
llvm::StringRef::str
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:245
getUnsigned
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1958
llvm::MachineInstr::FmNsz
@ FmNsz
Definition: MachineInstr.h:94
llvm::None
const NoneType None
Definition: None.h:24
parseMetadata
static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)
Parse Input that contains metadata.
Definition: SampleProfReader.cpp:106
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::MIToken::StringConstant
@ StringConstant
Definition: MILexer.h:171
llvm::MachineInstr::NoFPExcept
@ NoFPExcept
Definition: MachineInstr.h:110
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::LLVMContext::getOrInsertSyncScopeID
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.
Definition: LLVMContext.cpp:305
SourceMgr.h
Type.h
BranchProbability.h
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:533
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
LowLevelTypeImpl.h
llvm::MIToken::kw_liveout
@ kw_liveout
Definition: MILexer.h:116
llvm::MIToken::kw_reassoc
@ kw_reassoc
Definition: MILexer.h:71
llvm::SourceMgr::getMemoryBuffer
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:125
llvm::MIToken::ConstantPoolItem
@ ConstantPoolItem
Definition: MILexer.h:163
llvm::RegState::Renamable
@ Renamable
Register that may be renamed.
Definition: MachineInstrBuilder.h:61
llvm::MemoryBuffer::getBufferIdentifier
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:75
ValueSymbolTable.h
llvm::CmpInst::FCMP_FALSE
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:721
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:74
llvm::SyncScope::System
@ System
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:58
llvm::MachineBasicBlock::setAlignment
void setAlignment(Align A)
Set alignment of the basic block.
Definition: MachineBasicBlock.h:531
llvm::RegState::Dead
@ Dead
Unused definition.
Definition: MachineInstrBuilder.h:50
llvm::MIToken::hasIntegerValue
bool hasIntegerValue() const
Definition: MILexer.h:230
llvm::function_ref
An efficient, type-erasing, non-owning reference to a callable.
Definition: STLFunctionalExtras.h:36
llvm::RegState::Implicit
@ Implicit
Not emitted register (e.g. carry, or temporary result).
Definition: MachineInstrBuilder.h:46
llvm::LLT::pointer
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
Definition: LowLevelTypeImpl.h:49
llvm::MIToken::StackObject
@ StackObject
Definition: MILexer.h:150
llvm::AtomicOrdering
AtomicOrdering
Atomic ordering for LLVM's memory model.
Definition: AtomicOrdering.h:56
llvm::PerFunctionMIParsingState::VRegInfos
DenseMap< Register, VRegInfo * > VRegInfos
Definition: MIParser.h:173
llvm::SPIRV::Decoration::Alignment
@ Alignment
BasicBlock.h
llvm::MIToken::kw_dead
@ kw_dead
Definition: MILexer.h:54
llvm::MIToken::kw_cfi_adjust_cfa_offset
@ kw_cfi_adjust_cfa_offset
Definition: MILexer.h:83
llvm::MachineOperand::CreateShuffleMask
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
Definition: MachineOperand.h:940
llvm::PerFunctionMIParsingState::getIRValue
const Value * getIRValue(unsigned Slot)
Definition: MIParser.cpp:366
llvm::RegisterBankInfo::getNumRegBanks
unsigned getNumRegBanks() const
Get the total number of register banks.
Definition: RegisterBankInfo.h:588
llvm::SlotMapping
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
Definition: SlotMapping.h:32
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MIToken::kw_cfi_window_save
@ kw_cfi_window_save
Definition: MILexer.h:92
llvm::parseMachineMetadata
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)
Definition: MIParser.cpp:3479
llvm::TargetRegisterInfo::getRegClass
const TargetRegisterClass * getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
Definition: TargetRegisterInfo.h:750
llvm::AMDGPU::Hwreg::Offset
Offset
Definition: SIDefines.h:409
isImplicitOperandIn
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:1344
llvm::isUInt< 16 >
constexpr bool isUInt< 16 >(uint64_t x)
Definition: MathExtras.h:408
llvm::MIToken::kw_pre_instr_symbol
@ kw_pre_instr_symbol
Definition: MILexer.h:126
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:320
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
uint64_t
llvm::MachineOperand::CreateMBB
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
Definition: MachineOperand.h:825
llvm::PerFunctionMIParsingState::getVRegInfo
VRegInfo & getVRegInfo(Register Num)
Definition: MIParser.cpp:321
parseIRValue
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:2955
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:577
llvm::MCInstrDesc::isCall
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:285
llvm::tgtok::Int
@ Int
Definition: TGLexer.h:51
llvm::TargetRegisterInfo::getRegClassName
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
Definition: TargetRegisterInfo.h:756
llvm::MIToken::SubRegisterIndex
@ SubRegisterIndex
Definition: MILexer.h:170
llvm::MachineBasicBlock::setIsEHPad
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Definition: MachineBasicBlock.h:552
llvm::MIToken::kw_nnan
@ kw_nnan
Definition: MILexer.h:65
llvm::VRegInfo::NORMAL
@ NORMAL
Definition: MIParser.h:39
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:63
llvm::MachineInstr::FmReassoc
@ FmReassoc
Definition: MachineInstr.h:102
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:38
llvm::MIToken::kw_target_index
@ kw_target_index
Definition: MILexer.h:96
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
llvm::MCCFIInstruction::createNegateRAState
static MCCFIInstruction createNegateRAState(MCSymbol *L)
.cfi_negate_ra_state AArch64 negate RA state.
Definition: MCDwarf.h:590
llvm::MIToken::kw_fp128
@ kw_fp128
Definition: MILexer.h:101
MemoryLocation.h
llvm::DenseMap
Definition: DenseMap.h:716
llvm::SyncScope::ID
uint8_t ID
Definition: LLVMContext.h:47
llvm::StringRef::front
LLVM_NODISCARD char front() const
front - Get the first character in the string.
Definition: StringRef.h:161
llvm::AtomicOrdering::Unordered
@ Unordered
MIRPrinter.h
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:21
llvm::MIToken::MachineBasicBlock
@ MachineBasicBlock
Definition: MILexer.h:149
llvm::MIToken::Newline
@ Newline
Definition: MILexer.h:31
llvm::StringRef::lower
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:105
ArrayRef.h
llvm::MIToken::lbrace
@ lbrace
Definition: MILexer.h:43
llvm::MDString::get
static MDString * get(LLVMContext &Context, StringRef Str)
Definition: Metadata.cpp:499
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::MIToken::kw_half
@ kw_half
Definition: MILexer.h:97
llvm::MachineMemOperand::Flags
Flags
Flags values. These may be or'd together.
Definition: MachineMemOperand.h:129
llvm::MBBSectionID::ExceptionSectionID
const static MBBSectionID ExceptionSectionID
Definition: MachineBasicBlock.h:64
llvm::MIToken::IRValue
@ IRValue
Definition: MILexer.h:168
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::Optional::getValue
constexpr const T & getValue() const &
Definition: Optional.h:279
llvm::MIToken::comma
@ comma
Definition: MILexer.h:34
llvm::MachineBasicBlock::setHasAddressTaken
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
Definition: MachineBasicBlock.h:224
llvm::CmpInst::FCMP_OGE
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:724
llvm::Function::lookupIntrinsicID
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:769
llvm::CmpInst::ICMP_UGE
@ ICMP_UGE
unsigned greater or equal
Definition: InstrTypes.h:743
MIRFormatter.h
llvm::MachineMemOperand::MONonTemporal
@ MONonTemporal
The memory access is non-temporal.
Definition: MachineMemOperand.h:139
llvm::MachineOperand::CreateBA
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:875
llvm::CmpInst::BAD_ICMP_PREDICATE
@ BAD_ICMP_PREDICATE
Definition: InstrTypes.h:752
llvm::MIToken::dot
@ dot
Definition: MILexer.h:39
APSInt.h
llvm::MDTuple::get
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1267
llvm::MCCFIInstruction::cfiDefCfa
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
Definition: MCDwarf.h:526
llvm::MIToken::JumpTableIndex
@ JumpTableIndex
Definition: MILexer.h:164
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::MDNode
Metadata node.
Definition: Metadata.h:937
llvm::MachineOperand::CreateMCSymbol
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
Definition: MachineOperand.h:913
llvm::MIToken::kw_constant_pool
@ kw_constant_pool
Definition: MILexer.h:113
initSlots2Values
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
Definition: MIParser.cpp:353
llvm::irsymtab::storage::Word
support::ulittle32_t Word
Definition: IRSymtab.h:52
llvm::PerTargetMIParsingState::getRegisterByName
bool getRegisterByName(StringRef RegName, Register &Reg)
Try to convert a register name to a register number.
Definition: MIParser.cpp:121
llvm::MIToken::Eof
@ Eof
Definition: MILexer.h:29
llvm::TargetSubtargetInfo::getRegBankInfo
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
Definition: TargetSubtargetInfo.h:129
llvm::MachineBasicBlock::setIsEHFuncletEntry
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
Definition: MachineBasicBlock.h:577
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::CmpInst::ICMP_SLT
@ ICMP_SLT
signed less than
Definition: InstrTypes.h:748
llvm::CmpInst::isIntPredicate
bool isIntPredicate() const
Definition: InstrTypes.h:827
llvm::MIToken::kw_successors
@ kw_successors
Definition: MILexer.h:122
llvm::MachineInstr::IsExact
@ IsExact
Definition: MachineInstr.h:108
llvm::MIToken::md_dilocation
@ md_dilocation
Definition: MILexer.h:142
llvm::MIToken::kw_basealign
@ kw_basealign
Definition: MILexer.h:108
llvm::dwarf::getAttributeEncoding
unsigned getAttributeEncoding(StringRef EncodingString)
Definition: Dwarf.cpp:208
llvm::MIToken::kw_frame_setup
@ kw_frame_setup
Definition: MILexer.h:63
llvm::MIToken::kw_debug_location
@ kw_debug_location
Definition: MILexer.h:76
llvm::Sched::Source
@ Source
Definition: TargetLowering.h:99
llvm::MachineOperand::CreateIntrinsicID
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
Definition: MachineOperand.h:928
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MIToken::kw_nsw
@ kw_nsw
Definition: MILexer.h:73
None.h
llvm::MachineOperand::CreateGA
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:859
DataLayout.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::MIToken::md_range
@ md_range
Definition: MILexer.h:140
llvm::CmpInst::ICMP_ULT
@ ICMP_ULT
unsigned less than
Definition: InstrTypes.h:744
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
llvm::MIToken::kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_aarch64_negate_ra_sign_state
Definition: MILexer.h:93
llvm::SourceMgr
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
Definition: SourceMgr.h:31
Number
uint32_t Number
Definition: Profile.cpp:47
uint32_t
llvm::MIToken::kw_intrinsic
@ kw_intrinsic
Definition: MILexer.h:95
parse
static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Definition: LineTable.cpp:54
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MachinePointerInfo::AddrSpace
unsigned AddrSpace
Definition: MachineMemOperand.h:45
llvm::MachineOperand::isDef
bool isDef() const
Definition: MachineOperand.h:374
llvm::MIToken::kw_bbsections
@ kw_bbsections
Definition: MILexer.h:129
llvm::MIToken::kw_implicit_define
@ kw_implicit_define
Definition: MILexer.h:52
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::MCCFIInstruction::createAdjustCfaOffset
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:547
llvm::MIToken::kw_ppc_fp128
@ kw_ppc_fp128
Definition: MILexer.h:102
llvm::MachineOperand::CreateCImm
static MachineOperand CreateCImm(const ConstantInt *CI)
Definition: MachineOperand.h:788
llvm::MDTuple::getTemporary
static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a temporary node.
Definition: Metadata.h:1287
llvm::PerTargetMIParsingState::setTarget
void setTarget(const TargetSubtargetInfo &NewSubtarget)
Definition: MIParser.cpp:83
LLVM_FALLTHROUGH
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:280
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::insert
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:209
llvm::MachineMemOperand::MOVolatile
@ MOVolatile
The memory access is volatile.
Definition: MachineMemOperand.h:137
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:60
MILexer.h
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:133
llvm::MIToken::kw_dereferenceable
@ kw_dereferenceable
Definition: MILexer.h:55
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
Parser.h
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:376
llvm::MIToken::kw_jump_table
@ kw_jump_table
Definition: MILexer.h:112
llvm::AMDGPU::SendMsg::Msg
const CustomOperand< const MCSubtargetInfo & > Msg[]
Definition: AMDGPUAsmUtils.cpp:39
llvm::AtomicOrdering::Release
@ Release
llvm::MIToken::kw_non_temporal
@ kw_non_temporal
Definition: MILexer.h:105
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MIToken::minus
@ minus
Definition: MILexer.h:46
llvm::MIToken::ExternalSymbol
@ ExternalSymbol
Definition: MILexer.h:154
llvm::PerFunctionMIParsingState
Definition: MIParser.h:162
llvm::StringRef::size
constexpr LLVM_NODISCARD size_t size() const
size - Get the string size.
Definition: StringRef.h:157
llvm::MIToken::kw_target_flags
@ kw_target_flags
Definition: MILexer.h:103
llvm::CmpInst::FCMP_UGT
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:731
llvm::parseNamedRegisterReference
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3456
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::MDNode::replaceAllUsesWith
void replaceAllUsesWith(Metadata *MD)
RAUW a temporary.
Definition: Metadata.h:1056
llvm::Function::getValueSymbolTable
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:717
llvm::PerFunctionMIParsingState::Slots2Values
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
Definition: MIParser.h:181
llvm::MIToken::NamedIRBlock
@ NamedIRBlock
Definition: MILexer.h:165
llvm::MemoryBuffer::getBufferStart
const char * getBufferStart() const
Definition: MemoryBuffer.h:65
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::MIToken::kw_floatpred
@ kw_floatpred
Definition: MILexer.h:123
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:606
llvm::StringRef::drop_front
LLVM_NODISCARD StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
Definition: StringRef.h:653
llvm::MIToken::coloncolon
@ coloncolon
Definition: MILexer.h:38
llvm::MIToken::rparen
@ rparen
Definition: MILexer.h:42
llvm::dwarf::getOperationEncoding
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:161
llvm::AAMDNodes::NoAlias
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:678
llvm::SlotMapping::GlobalValues
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:33
llvm::toString
const char * toString(DWARFSectionKind Kind)
Definition: DWARFUnitIndex.h:67
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:341
llvm::MBBSectionID::ColdSectionID
const static MBBSectionID ColdSectionID
Definition: MachineBasicBlock.h:63
llvm::MachineBasicBlock::insert
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Definition: MachineBasicBlock.cpp:1308
MachineFrameInfo.h
llvm::MIToken::kw_debug_instr_number
@ kw_debug_instr_number
Definition: MILexer.h:77
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:155
llvm::MIToken::kw_intpred
@ kw_intpred
Definition: MILexer.h:124
llvm::MIToken::MCSymbol
@ MCSymbol
Definition: MILexer.h:155
llvm::PerTargetMIParsingState::getSubRegIndex
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
Definition: MIParser.cpp:180
llvm::MIToken::greater
@ greater
Definition: MILexer.h:48
llvm::MIToken::exclaim
@ exclaim
Definition: MILexer.h:40
Casting.h
Function.h
llvm::MIToken::IntegerLiteral
@ IntegerLiteral
Definition: MILexer.h:158
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::MIToken::kw_align
@ kw_align
Definition: MILexer.h:107
llvm::SourceMgr::DK_Error
@ DK_Error
Definition: SourceMgr.h:34
llvm::MachineInstr::FmNoNans
@ FmNoNans
Definition: MachineInstr.h:90
StringSwitch.h
llvm::MachineInstr::FmContract
@ FmContract
Definition: MachineInstr.h:98
SlotMapping.h
llvm::PerFunctionMIParsingState::MF
MachineFunction & MF
Definition: MIParser.h:164
llvm::MIToken::TokenKind
TokenKind
Definition: MILexer.h:27
llvm::CmpInst::ICMP_SGE
@ ICMP_SGE
signed greater or equal
Definition: InstrTypes.h:747
llvm::TargetRegisterInfo::getNumRegClasses
unsigned getNumRegClasses() const
Definition: TargetRegisterInfo.h:744
llvm::SourceMgr::GetMessage
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:270
llvm::MachineBasicBlock::normalizeSuccProbs
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
Definition: MachineBasicBlock.h:676
llvm::MIToken::kind
TokenKind kind() const
Definition: MILexer.h:190
llvm::MachineMemOperand::MOStore
@ MOStore
The memory access writes data.
Definition: MachineMemOperand.h:135
parseGlobalValue
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:2066
llvm::AAMDNodes::TBAA
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:669
llvm::parseVirtualRegisterReference
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3462
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:83
llvm::VRegInfo
Definition: MIParser.h:37
llvm::MIToken::QuotedIRValue
@ QuotedIRValue
Definition: MILexer.h:169
llvm::parseConstantValue
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:180
llvm::BranchProbability::getRaw
static BranchProbability getRaw(uint32_t N)
Definition: BranchProbability.h:53
llvm::PerTargetMIParsingState::getRegMask
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
Definition: MIParser.cpp:163
llvm::MIRFormatter
MIRFormater - Interface to format MIR operand based on target.
Definition: MIRFormatter.h:28
Instructions.h
llvm::MIToken::kw_custom
@ kw_custom
Definition: MILexer.h:115
llvm::MemoryLocation::UnknownSize
@ UnknownSize
Definition: MemoryLocation.h:215
llvm::MIToken::kw_stack
@ kw_stack
Definition: MILexer.h:110
llvm::MCCFIInstruction::createRegister
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:579
llvm::MIToken::kw_got
@ kw_got
Definition: MILexer.h:111
llvm::StringMapImpl::empty
bool empty() const
Definition: StringMap.h:94
SmallVector.h
llvm::MachineOperand::CreateRegMask
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
Definition: MachineOperand.h:895
llvm::MachineRegisterInfo::getType
LLT getType(Register Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.
Definition: MachineRegisterInfo.h:740
MachineInstrBuilder.h
llvm::MachineInstr::NoUWrap
@ NoUWrap
Definition: MachineInstr.h:104
llvm::MCCFIInstruction::createUndefined
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can't be restored anymore.
Definition: MCDwarf.h:603
llvm::VRegInfo::UNKNOWN
@ UNKNOWN
Definition: MIParser.h:39
RegisterBank.h
TargetIntrinsicInfo.h
llvm::CmpInst::ICMP_UGT
@ ICMP_UGT
unsigned greater than
Definition: InstrTypes.h:742
llvm::SMRange
Represents a range in source code.
Definition: SMLoc.h:48
llvm::CmpInst::FCMP_UNE
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:735
llvm::MIToken::is
bool is(TokenKind K) const
Definition: MILexer.h:217
llvm::MIToken::location
StringRef::iterator location() const
Definition: MILexer.h:221
llvm::PerFunctionMIParsingState::MBBSlots
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:172
llvm::MachineInstr::BundledSucc
@ BundledSucc
Definition: MachineInstr.h:89
llvm::BlockAddress::get
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1807
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:164
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
LaneBitmask.h
initSlots2BasicBlocks
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3381
llvm::MIToken::Identifier
@ Identifier
Definition: MILexer.h:145
llvm::MachineInstr::FmArcp
@ FmArcp
Definition: MachineInstr.h:96
ModuleSlotTracker.h
MachineMemOperand.h
llvm::CmpInst::FCMP_OLE
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:726
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::SMLoc::getFromPointer
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:36
MachineOperand.h
llvm::MIToken::rbrace
@ rbrace
Definition: MILexer.h:44
RegName
#define RegName(no)
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:564
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44
llvm::parseRegisterReference
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3450
llvm::ValueSymbolTable::lookup
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
Definition: ValueSymbolTable.h:74
llvm::MCCFIInstruction::createRememberState
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:614
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::MIToken::kw_cfi_def_cfa_offset
@ kw_cfi_def_cfa_offset
Definition: MILexer.h:82
llvm::MIToken::less
@ less
Definition: MILexer.h:47
llvm::MIToken::kw_volatile
@ kw_volatile
Definition: MILexer.h:104
llvm::MIToken::kw_def
@ kw_def
Definition: MILexer.h:53
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MIToken::kw_landing_pad
@ kw_landing_pad
Definition: MILexer.h:118
llvm::TargetRegisterInfo::getSubRegIndexName
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
Definition: TargetRegisterInfo.h:368
llvm::PerTargetMIParsingState::getBitmaskTargetFlag
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
Definition: MIParser.cpp:241
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::PerTargetMIParsingState::getDirectTargetFlag
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
Definition: MIParser.cpp:219
llvm::VRegInfo::Explicit
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:41
llvm::MIToken::kw_nuw
@ kw_nuw
Definition: MILexer.h:72
llvm::MIToken::plus
@ plus
Definition: MILexer.h:45
MachineFunction.h
llvm::MIToken::md_alias_scope
@ md_alias_scope
Definition: MILexer.h:138
llvm::MIToken::kw_cfi_same_value
@ kw_cfi_same_value
Definition: MILexer.h:78
llvm::MIToken::NamedVirtualRegister
@ NamedVirtualRegister
Definition: MILexer.h:147
llvm::MachineInstr::BundledPred
@ BundledPred
Definition: MachineInstr.h:88
llvm::parseMBBReference
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3444
llvm::MIToken::kw_ehfunclet_entry
@ kw_ehfunclet_entry
Definition: MILexer.h:120
llvm::CmpInst::FCMP_TRUE
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:736
llvm::isPowerOf2_64
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
Definition: MathExtras.h:496
llvm::VRegInfo::GENERIC
@ GENERIC
Definition: MIParser.h:39
llvm::LLT::scalar
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Definition: LowLevelTypeImpl.h:42
Value.h
llvm::MachineMemOperand::MONone
@ MONone
Definition: MachineMemOperand.h:131
llvm::MIToken::kw_liveins
@ kw_liveins
Definition: MILexer.h:121
llvm::MIToken::kw_contract
@ kw_contract
Definition: MILexer.h:69
llvm::MachineOperand::CreatePredicate
static MachineOperand CreatePredicate(unsigned Pred)
Definition: MachineOperand.h:934
llvm::lexMIToken
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
llvm::MIToken::kw_cfi_rel_offset
@ kw_cfi_rel_offset
Definition: MILexer.h:80
llvm::MIToken::md_diexpr
@ md_diexpr
Definition: MILexer.h:141
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::MIToken::lparen
@ lparen
Definition: MILexer.h:41
llvm::MIToken::kw_address_taken
@ kw_address_taken
Definition: MILexer.h:117
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:310
llvm::MIToken::kw_undef
@ kw_undef
Definition: MILexer.h:57
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:279
llvm::LaneBitmask::getAll
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84
SubReg
unsigned SubReg
Definition: AArch64AdvSIMDScalarPass.cpp:104
llvm::CmpInst::BAD_FCMP_PREDICATE
@ BAD_FCMP_PREDICATE
Definition: InstrTypes.h:739
llvm::MachineOperand::CreateFPImm
static MachineOperand CreateFPImm(const ConstantFP *CFP)
Definition: MachineOperand.h:794
llvm::MCCFIInstruction::createWindowSave
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:585
llvm::MIToken::kw_blockaddress
@ kw_blockaddress
Definition: MILexer.h:94
llvm::MCInstrDesc::getImplicitUses
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction.
Definition: MCInstrDesc.h:565
llvm::MachineOperand::CreateTargetIndex
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:845
llvm::AtomicOrdering::NotAtomic
@ NotAtomic
llvm::CmpInst::FCMP_ORD
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:728
llvm::TargetRegisterInfo::getRegMasks
virtual ArrayRef< const uint32_t * > getRegMasks() const =0
Return all the call-preserved register masks defined for this target.
llvm::MachineInstr::setFlag
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:337
llvm::CmpInst::FCMP_UEQ
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:730
llvm::MachineOperand::isIdenticalTo
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
Definition: MachineOperand.cpp:285
MIParser.h
llvm::MachineOperand::CreateRegLiveOut
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
Definition: MachineOperand.h:901
llvm::MCInstrDesc::ImplicitDefs
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:207
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37
llvm::MCCFIInstruction::createRestore
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:597
getRegisterName
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
Definition: MIParser.cpp:1337
llvm::MIToken::kw_unknown_address
@ kw_unknown_address
Definition: MILexer.h:131
llvm::LLT
Definition: LowLevelTypeImpl.h:39