LLVM  13.0.0git
MIParser.cpp
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1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the parsing of machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "MILexer.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/APSInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/None.h"
20 #include "llvm/ADT/Optional.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringMap.h"
23 #include "llvm/ADT/StringRef.h"
24 #include "llvm/ADT/StringSwitch.h"
25 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
44 #include "llvm/IR/BasicBlock.h"
45 #include "llvm/IR/Constants.h"
46 #include "llvm/IR/DataLayout.h"
48 #include "llvm/IR/DebugLoc.h"
49 #include "llvm/IR/Function.h"
50 #include "llvm/IR/InstrTypes.h"
51 #include "llvm/IR/Instructions.h"
52 #include "llvm/IR/Intrinsics.h"
53 #include "llvm/IR/Metadata.h"
54 #include "llvm/IR/Module.h"
56 #include "llvm/IR/Type.h"
57 #include "llvm/IR/Value.h"
59 #include "llvm/MC/LaneBitmask.h"
60 #include "llvm/MC/MCContext.h"
61 #include "llvm/MC/MCDwarf.h"
62 #include "llvm/MC/MCInstrDesc.h"
63 #include "llvm/MC/MCRegisterInfo.h"
66 #include "llvm/Support/Casting.h"
70 #include "llvm/Support/SMLoc.h"
71 #include "llvm/Support/SourceMgr.h"
75 #include <algorithm>
76 #include <cassert>
77 #include <cctype>
78 #include <cstddef>
79 #include <cstdint>
80 #include <limits>
81 #include <string>
82 #include <utility>
83 
84 using namespace llvm;
85 
87  const TargetSubtargetInfo &NewSubtarget) {
88 
89  // If the subtarget changed, over conservatively assume everything is invalid.
90  if (&Subtarget == &NewSubtarget)
91  return;
92 
93  Names2InstrOpCodes.clear();
94  Names2Regs.clear();
95  Names2RegMasks.clear();
96  Names2SubRegIndices.clear();
97  Names2TargetIndices.clear();
98  Names2DirectTargetFlags.clear();
99  Names2BitmaskTargetFlags.clear();
100  Names2MMOTargetFlags.clear();
101 
102  initNames2RegClasses();
103  initNames2RegBanks();
104 }
105 
106 void PerTargetMIParsingState::initNames2Regs() {
107  if (!Names2Regs.empty())
108  return;
109 
110  // The '%noreg' register is the register 0.
111  Names2Regs.insert(std::make_pair("noreg", 0));
112  const auto *TRI = Subtarget.getRegisterInfo();
113  assert(TRI && "Expected target register info");
114 
115  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
116  bool WasInserted =
117  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
118  .second;
119  (void)WasInserted;
120  assert(WasInserted && "Expected registers to be unique case-insensitively");
121  }
122 }
123 
125  Register &Reg) {
126  initNames2Regs();
127  auto RegInfo = Names2Regs.find(RegName);
128  if (RegInfo == Names2Regs.end())
129  return true;
130  Reg = RegInfo->getValue();
131  return false;
132 }
133 
134 void PerTargetMIParsingState::initNames2InstrOpCodes() {
135  if (!Names2InstrOpCodes.empty())
136  return;
137  const auto *TII = Subtarget.getInstrInfo();
138  assert(TII && "Expected target instruction info");
139  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
140  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
141 }
142 
144  unsigned &OpCode) {
145  initNames2InstrOpCodes();
146  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
147  if (InstrInfo == Names2InstrOpCodes.end())
148  return true;
149  OpCode = InstrInfo->getValue();
150  return false;
151 }
152 
153 void PerTargetMIParsingState::initNames2RegMasks() {
154  if (!Names2RegMasks.empty())
155  return;
156  const auto *TRI = Subtarget.getRegisterInfo();
157  assert(TRI && "Expected target register info");
159  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
160  assert(RegMasks.size() == RegMaskNames.size());
161  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
162  Names2RegMasks.insert(
163  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
164 }
165 
167  initNames2RegMasks();
168  auto RegMaskInfo = Names2RegMasks.find(Identifier);
169  if (RegMaskInfo == Names2RegMasks.end())
170  return nullptr;
171  return RegMaskInfo->getValue();
172 }
173 
174 void PerTargetMIParsingState::initNames2SubRegIndices() {
175  if (!Names2SubRegIndices.empty())
176  return;
177  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
178  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
179  Names2SubRegIndices.insert(
180  std::make_pair(TRI->getSubRegIndexName(I), I));
181 }
182 
184  initNames2SubRegIndices();
185  auto SubRegInfo = Names2SubRegIndices.find(Name);
186  if (SubRegInfo == Names2SubRegIndices.end())
187  return 0;
188  return SubRegInfo->getValue();
189 }
190 
191 void PerTargetMIParsingState::initNames2TargetIndices() {
192  if (!Names2TargetIndices.empty())
193  return;
194  const auto *TII = Subtarget.getInstrInfo();
195  assert(TII && "Expected target instruction info");
196  auto Indices = TII->getSerializableTargetIndices();
197  for (const auto &I : Indices)
198  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
199 }
200 
202  initNames2TargetIndices();
203  auto IndexInfo = Names2TargetIndices.find(Name);
204  if (IndexInfo == Names2TargetIndices.end())
205  return true;
206  Index = IndexInfo->second;
207  return false;
208 }
209 
210 void PerTargetMIParsingState::initNames2DirectTargetFlags() {
211  if (!Names2DirectTargetFlags.empty())
212  return;
213 
214  const auto *TII = Subtarget.getInstrInfo();
215  assert(TII && "Expected target instruction info");
217  for (const auto &I : Flags)
218  Names2DirectTargetFlags.insert(
219  std::make_pair(StringRef(I.second), I.first));
220 }
221 
223  unsigned &Flag) {
224  initNames2DirectTargetFlags();
225  auto FlagInfo = Names2DirectTargetFlags.find(Name);
226  if (FlagInfo == Names2DirectTargetFlags.end())
227  return true;
228  Flag = FlagInfo->second;
229  return false;
230 }
231 
232 void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
233  if (!Names2BitmaskTargetFlags.empty())
234  return;
235 
236  const auto *TII = Subtarget.getInstrInfo();
237  assert(TII && "Expected target instruction info");
239  for (const auto &I : Flags)
240  Names2BitmaskTargetFlags.insert(
241  std::make_pair(StringRef(I.second), I.first));
242 }
243 
245  unsigned &Flag) {
246  initNames2BitmaskTargetFlags();
247  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
248  if (FlagInfo == Names2BitmaskTargetFlags.end())
249  return true;
250  Flag = FlagInfo->second;
251  return false;
252 }
253 
254 void PerTargetMIParsingState::initNames2MMOTargetFlags() {
255  if (!Names2MMOTargetFlags.empty())
256  return;
257 
258  const auto *TII = Subtarget.getInstrInfo();
259  assert(TII && "Expected target instruction info");
260  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
261  for (const auto &I : Flags)
262  Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));
263 }
264 
267  initNames2MMOTargetFlags();
268  auto FlagInfo = Names2MMOTargetFlags.find(Name);
269  if (FlagInfo == Names2MMOTargetFlags.end())
270  return true;
271  Flag = FlagInfo->second;
272  return false;
273 }
274 
275 void PerTargetMIParsingState::initNames2RegClasses() {
276  if (!Names2RegClasses.empty())
277  return;
278 
279  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
280  for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
281  const auto *RC = TRI->getRegClass(I);
282  Names2RegClasses.insert(
283  std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
284  }
285 }
286 
287 void PerTargetMIParsingState::initNames2RegBanks() {
288  if (!Names2RegBanks.empty())
289  return;
290 
291  const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
292  // If the target does not support GlobalISel, we may not have a
293  // register bank info.
294  if (!RBI)
295  return;
296 
297  for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
298  const auto &RegBank = RBI->getRegBank(I);
299  Names2RegBanks.insert(
300  std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
301  }
302 }
303 
304 const TargetRegisterClass *
306  auto RegClassInfo = Names2RegClasses.find(Name);
307  if (RegClassInfo == Names2RegClasses.end())
308  return nullptr;
309  return RegClassInfo->getValue();
310 }
311 
313  auto RegBankInfo = Names2RegBanks.find(Name);
314  if (RegBankInfo == Names2RegBanks.end())
315  return nullptr;
316  return RegBankInfo->getValue();
317 }
318 
320  SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &T)
321  : MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {
322 }
323 
325  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
326  if (I.second) {
328  VRegInfo *Info = new (Allocator) VRegInfo;
330  I.first->second = Info;
331  }
332  return *I.first->second;
333 }
334 
336  assert(RegName != "" && "Expected named reg.");
337 
338  auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
339  if (I.second) {
340  VRegInfo *Info = new (Allocator) VRegInfo;
342  I.first->second = Info;
343  }
344  return *I.first->second;
345 }
346 
347 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
348  DenseMap<unsigned, const Value *> &Slots2Values) {
349  int Slot = MST.getLocalSlot(V);
350  if (Slot == -1)
351  return;
352  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
353 }
354 
355 /// Creates the mapping from slot numbers to function's unnamed IR values.
356 static void initSlots2Values(const Function &F,
357  DenseMap<unsigned, const Value *> &Slots2Values) {
358  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
359  MST.incorporateFunction(F);
360  for (const auto &Arg : F.args())
361  mapValueToSlot(&Arg, MST, Slots2Values);
362  for (const auto &BB : F) {
363  mapValueToSlot(&BB, MST, Slots2Values);
364  for (const auto &I : BB)
365  mapValueToSlot(&I, MST, Slots2Values);
366  }
367 }
368 
370  if (Slots2Values.empty())
372  return Slots2Values.lookup(Slot);
373 }
374 
375 namespace {
376 
377 /// A wrapper struct around the 'MachineOperand' struct that includes a source
378 /// range and other attributes.
379 struct ParsedMachineOperand {
380  MachineOperand Operand;
381  StringRef::iterator Begin;
383  Optional<unsigned> TiedDefIdx;
384 
385  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
386  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
387  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
388  if (TiedDefIdx)
389  assert(Operand.isReg() && Operand.isUse() &&
390  "Only used register operands can be tied");
391  }
392 };
393 
394 class MIParser {
395  MachineFunction &MF;
397  StringRef Source, CurrentSource;
398  MIToken Token;
400  /// Maps from slot numbers to function's unnamed basic blocks.
401  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
402 
403 public:
405  StringRef Source);
406 
407  /// \p SkipChar gives the number of characters to skip before looking
408  /// for the next token.
409  void lex(unsigned SkipChar = 0);
410 
411  /// Report an error at the current location with the given message.
412  ///
413  /// This function always return true.
414  bool error(const Twine &Msg);
415 
416  /// Report an error at the given location with the given message.
417  ///
418  /// This function always return true.
419  bool error(StringRef::iterator Loc, const Twine &Msg);
420 
421  bool
422  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
423  bool parseBasicBlocks();
424  bool parse(MachineInstr *&MI);
425  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
426  bool parseStandaloneNamedRegister(Register &Reg);
427  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
428  bool parseStandaloneRegister(Register &Reg);
429  bool parseStandaloneStackObject(int &FI);
430  bool parseStandaloneMDNode(MDNode *&Node);
431 
432  bool
433  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
434  bool parseBasicBlock(MachineBasicBlock &MBB,
435  MachineBasicBlock *&AddFalthroughFrom);
436  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
437  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
438 
439  bool parseNamedRegister(Register &Reg);
440  bool parseVirtualRegister(VRegInfo *&Info);
441  bool parseNamedVirtualRegister(VRegInfo *&Info);
442  bool parseRegister(Register &Reg, VRegInfo *&VRegInfo);
443  bool parseRegisterFlag(unsigned &Flags);
444  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
445  bool parseSubRegisterIndex(unsigned &SubReg);
446  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
447  bool parseRegisterOperand(MachineOperand &Dest,
448  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
449  bool parseImmediateOperand(MachineOperand &Dest);
450  bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
451  const Constant *&C);
452  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
453  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
454  bool parseTypedImmediateOperand(MachineOperand &Dest);
455  bool parseFPImmediateOperand(MachineOperand &Dest);
457  bool parseMBBOperand(MachineOperand &Dest);
458  bool parseStackFrameIndex(int &FI);
459  bool parseStackObjectOperand(MachineOperand &Dest);
460  bool parseFixedStackFrameIndex(int &FI);
461  bool parseFixedStackObjectOperand(MachineOperand &Dest);
462  bool parseGlobalValue(GlobalValue *&GV);
463  bool parseGlobalAddressOperand(MachineOperand &Dest);
464  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
465  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
466  bool parseJumpTableIndexOperand(MachineOperand &Dest);
467  bool parseExternalSymbolOperand(MachineOperand &Dest);
468  bool parseMCSymbolOperand(MachineOperand &Dest);
469  bool parseMDNode(MDNode *&Node);
470  bool parseDIExpression(MDNode *&Expr);
471  bool parseDILocation(MDNode *&Expr);
472  bool parseMetadataOperand(MachineOperand &Dest);
473  bool parseCFIOffset(int &Offset);
474  bool parseCFIRegister(Register &Reg);
475  bool parseCFIEscapeValues(std::string& Values);
476  bool parseCFIOperand(MachineOperand &Dest);
477  bool parseIRBlock(BasicBlock *&BB, const Function &F);
478  bool parseBlockAddressOperand(MachineOperand &Dest);
479  bool parseIntrinsicOperand(MachineOperand &Dest);
480  bool parsePredicateOperand(MachineOperand &Dest);
481  bool parseShuffleMaskOperand(MachineOperand &Dest);
482  bool parseTargetIndexOperand(MachineOperand &Dest);
483  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
484  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
485  bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
486  MachineOperand &Dest,
487  Optional<unsigned> &TiedDefIdx);
488  bool parseMachineOperandAndTargetFlags(const unsigned OpCode,
489  const unsigned OpIdx,
490  MachineOperand &Dest,
491  Optional<unsigned> &TiedDefIdx);
492  bool parseOffset(int64_t &Offset);
493  bool parseAlignment(unsigned &Alignment);
494  bool parseAddrspace(unsigned &Addrspace);
495  bool parseSectionID(Optional<MBBSectionID> &SID);
496  bool parseOperandsOffset(MachineOperand &Op);
497  bool parseIRValue(const Value *&V);
498  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
499  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
500  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
501  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
502  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
503  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
504  bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
505  bool parseHeapAllocMarker(MDNode *&Node);
506 
507  bool parseTargetImmMnemonic(const unsigned OpCode, const unsigned OpIdx,
508  MachineOperand &Dest, const MIRFormatter &MF);
509 
510 private:
511  /// Convert the integer literal in the current token into an unsigned integer.
512  ///
513  /// Return true if an error occurred.
514  bool getUnsigned(unsigned &Result);
515 
516  /// Convert the integer literal in the current token into an uint64.
517  ///
518  /// Return true if an error occurred.
519  bool getUint64(uint64_t &Result);
520 
521  /// Convert the hexadecimal literal in the current token into an unsigned
522  /// APInt with a minimum bitwidth required to represent the value.
523  ///
524  /// Return true if the literal does not represent an integer value.
525  bool getHexUint(APInt &Result);
526 
527  /// If the current token is of the given kind, consume it and return false.
528  /// Otherwise report an error and return true.
529  bool expectAndConsume(MIToken::TokenKind TokenKind);
530 
531  /// If the current token is of the given kind, consume it and return true.
532  /// Otherwise return false.
533  bool consumeIfPresent(MIToken::TokenKind TokenKind);
534 
535  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
536 
537  bool assignRegisterTies(MachineInstr &MI,
539 
540  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
541  const MCInstrDesc &MCID);
542 
543  const BasicBlock *getIRBlock(unsigned Slot);
544  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
545 
546  /// Get or create an MCSymbol for a given name.
547  MCSymbol *getOrCreateMCSymbol(StringRef Name);
548 
549  /// parseStringConstant
550  /// ::= StringConstant
551  bool parseStringConstant(std::string &Result);
552 };
553 
554 } // end anonymous namespace
555 
556 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
558  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
559 {}
560 
561 void MIParser::lex(unsigned SkipChar) {
562  CurrentSource = lexMIToken(
563  CurrentSource.slice(SkipChar, StringRef::npos), Token,
564  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
565 }
566 
567 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
568 
569 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
570  const SourceMgr &SM = *PFS.SM;
571  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
572  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
573  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
574  // Create an ordinary diagnostic when the source manager's buffer is the
575  // source string.
577  return true;
578  }
579  // Create a diagnostic for a YAML string literal.
580  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
581  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
582  Source, None, None);
583  return true;
584 }
585 
586 typedef function_ref<bool(StringRef::iterator Loc, const Twine &)>
588 
589 static const char *toString(MIToken::TokenKind TokenKind) {
590  switch (TokenKind) {
591  case MIToken::comma:
592  return "','";
593  case MIToken::equal:
594  return "'='";
595  case MIToken::colon:
596  return "':'";
597  case MIToken::lparen:
598  return "'('";
599  case MIToken::rparen:
600  return "')'";
601  default:
602  return "<unknown token>";
603  }
604 }
605 
606 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
607  if (Token.isNot(TokenKind))
608  return error(Twine("expected ") + toString(TokenKind));
609  lex();
610  return false;
611 }
612 
613 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
614  if (Token.isNot(TokenKind))
615  return false;
616  lex();
617  return true;
618 }
619 
620 // Parse Machine Basic Block Section ID.
621 bool MIParser::parseSectionID(Optional<MBBSectionID> &SID) {
622  assert(Token.is(MIToken::kw_bbsections));
623  lex();
624  if (Token.is(MIToken::IntegerLiteral)) {
625  unsigned Value = 0;
626  if (getUnsigned(Value))
627  return error("Unknown Section ID");
628  SID = MBBSectionID{Value};
629  } else {
630  const StringRef &S = Token.stringValue();
631  if (S == "Exception")
633  else if (S == "Cold")
635  else
636  return error("Unknown Section ID");
637  }
638  lex();
639  return false;
640 }
641 
642 bool MIParser::parseBasicBlockDefinition(
645  unsigned ID = 0;
646  if (getUnsigned(ID))
647  return true;
648  auto Loc = Token.location();
649  auto Name = Token.stringValue();
650  lex();
651  bool HasAddressTaken = false;
652  bool IsLandingPad = false;
653  bool IsEHFuncletEntry = false;
654  Optional<MBBSectionID> SectionID;
655  unsigned Alignment = 0;
656  BasicBlock *BB = nullptr;
657  if (consumeIfPresent(MIToken::lparen)) {
658  do {
659  // TODO: Report an error when multiple same attributes are specified.
660  switch (Token.kind()) {
662  HasAddressTaken = true;
663  lex();
664  break;
666  IsLandingPad = true;
667  lex();
668  break;
670  IsEHFuncletEntry = true;
671  lex();
672  break;
673  case MIToken::kw_align:
674  if (parseAlignment(Alignment))
675  return true;
676  break;
677  case MIToken::IRBlock:
678  // TODO: Report an error when both name and ir block are specified.
679  if (parseIRBlock(BB, MF.getFunction()))
680  return true;
681  lex();
682  break;
684  if (parseSectionID(SectionID))
685  return true;
686  break;
687  default:
688  break;
689  }
690  } while (consumeIfPresent(MIToken::comma));
691  if (expectAndConsume(MIToken::rparen))
692  return true;
693  }
694  if (expectAndConsume(MIToken::colon))
695  return true;
696 
697  if (!Name.empty()) {
698  BB = dyn_cast_or_null<BasicBlock>(
699  MF.getFunction().getValueSymbolTable()->lookup(Name));
700  if (!BB)
701  return error(Loc, Twine("basic block '") + Name +
702  "' is not defined in the function '" +
703  MF.getName() + "'");
704  }
705  auto *MBB = MF.CreateMachineBasicBlock(BB);
706  MF.insert(MF.end(), MBB);
707  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
708  if (!WasInserted)
709  return error(Loc, Twine("redefinition of machine basic block with id #") +
710  Twine(ID));
711  if (Alignment)
712  MBB->setAlignment(Align(Alignment));
713  if (HasAddressTaken)
715  MBB->setIsEHPad(IsLandingPad);
716  MBB->setIsEHFuncletEntry(IsEHFuncletEntry);
717  if (SectionID.hasValue()) {
718  MBB->setSectionID(SectionID.getValue());
719  MF.setBBSectionsType(BasicBlockSection::List);
720  }
721  return false;
722 }
723 
724 bool MIParser::parseBasicBlockDefinitions(
726  lex();
727  // Skip until the first machine basic block.
728  while (Token.is(MIToken::Newline))
729  lex();
730  if (Token.isErrorOrEOF())
731  return Token.isError();
732  if (Token.isNot(MIToken::MachineBasicBlockLabel))
733  return error("expected a basic block definition before instructions");
734  unsigned BraceDepth = 0;
735  do {
736  if (parseBasicBlockDefinition(MBBSlots))
737  return true;
738  bool IsAfterNewline = false;
739  // Skip until the next machine basic block.
740  while (true) {
741  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
742  Token.isErrorOrEOF())
743  break;
744  else if (Token.is(MIToken::MachineBasicBlockLabel))
745  return error("basic block definition should be located at the start of "
746  "the line");
747  else if (consumeIfPresent(MIToken::Newline)) {
748  IsAfterNewline = true;
749  continue;
750  }
751  IsAfterNewline = false;
752  if (Token.is(MIToken::lbrace))
753  ++BraceDepth;
754  if (Token.is(MIToken::rbrace)) {
755  if (!BraceDepth)
756  return error("extraneous closing brace ('}')");
757  --BraceDepth;
758  }
759  lex();
760  }
761  // Verify that we closed all of the '{' at the end of a file or a block.
762  if (!Token.isError() && BraceDepth)
763  return error("expected '}'"); // FIXME: Report a note that shows '{'.
764  } while (!Token.isErrorOrEOF());
765  return Token.isError();
766 }
767 
768 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
769  assert(Token.is(MIToken::kw_liveins));
770  lex();
771  if (expectAndConsume(MIToken::colon))
772  return true;
773  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
774  return false;
775  do {
776  if (Token.isNot(MIToken::NamedRegister))
777  return error("expected a named register");
778  Register Reg;
779  if (parseNamedRegister(Reg))
780  return true;
781  lex();
783  if (consumeIfPresent(MIToken::colon)) {
784  // Parse lane mask.
785  if (Token.isNot(MIToken::IntegerLiteral) &&
786  Token.isNot(MIToken::HexLiteral))
787  return error("expected a lane mask");
788  static_assert(sizeof(LaneBitmask::Type) == sizeof(uint64_t),
789  "Use correct get-function for lane mask");
791  if (getUint64(V))
792  return error("invalid lane mask value");
793  Mask = LaneBitmask(V);
794  lex();
795  }
796  MBB.addLiveIn(Reg, Mask);
797  } while (consumeIfPresent(MIToken::comma));
798  return false;
799 }
800 
801 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
802  assert(Token.is(MIToken::kw_successors));
803  lex();
804  if (expectAndConsume(MIToken::colon))
805  return true;
806  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
807  return false;
808  do {
809  if (Token.isNot(MIToken::MachineBasicBlock))
810  return error("expected a machine basic block reference");
811  MachineBasicBlock *SuccMBB = nullptr;
812  if (parseMBBReference(SuccMBB))
813  return true;
814  lex();
815  unsigned Weight = 0;
816  if (consumeIfPresent(MIToken::lparen)) {
817  if (Token.isNot(MIToken::IntegerLiteral) &&
818  Token.isNot(MIToken::HexLiteral))
819  return error("expected an integer literal after '('");
820  if (getUnsigned(Weight))
821  return true;
822  lex();
823  if (expectAndConsume(MIToken::rparen))
824  return true;
825  }
826  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
827  } while (consumeIfPresent(MIToken::comma));
829  return false;
830 }
831 
832 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
833  MachineBasicBlock *&AddFalthroughFrom) {
834  // Skip the definition.
836  lex();
837  if (consumeIfPresent(MIToken::lparen)) {
838  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
839  lex();
840  consumeIfPresent(MIToken::rparen);
841  }
842  consumeIfPresent(MIToken::colon);
843 
844  // Parse the liveins and successors.
845  // N.B: Multiple lists of successors and liveins are allowed and they're
846  // merged into one.
847  // Example:
848  // liveins: %edi
849  // liveins: %esi
850  //
851  // is equivalent to
852  // liveins: %edi, %esi
853  bool ExplicitSuccessors = false;
854  while (true) {
855  if (Token.is(MIToken::kw_successors)) {
856  if (parseBasicBlockSuccessors(MBB))
857  return true;
858  ExplicitSuccessors = true;
859  } else if (Token.is(MIToken::kw_liveins)) {
860  if (parseBasicBlockLiveins(MBB))
861  return true;
862  } else if (consumeIfPresent(MIToken::Newline)) {
863  continue;
864  } else
865  break;
866  if (!Token.isNewlineOrEOF())
867  return error("expected line break at the end of a list");
868  lex();
869  }
870 
871  // Parse the instructions.
872  bool IsInBundle = false;
873  MachineInstr *PrevMI = nullptr;
874  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
875  !Token.is(MIToken::Eof)) {
876  if (consumeIfPresent(MIToken::Newline))
877  continue;
878  if (consumeIfPresent(MIToken::rbrace)) {
879  // The first parsing pass should verify that all closing '}' have an
880  // opening '{'.
881  assert(IsInBundle);
882  IsInBundle = false;
883  continue;
884  }
885  MachineInstr *MI = nullptr;
886  if (parse(MI))
887  return true;
888  MBB.insert(MBB.end(), MI);
889  if (IsInBundle) {
891  MI->setFlag(MachineInstr::BundledPred);
892  }
893  PrevMI = MI;
894  if (Token.is(MIToken::lbrace)) {
895  if (IsInBundle)
896  return error("nested instruction bundles are not allowed");
897  lex();
898  // This instruction is the start of the bundle.
899  MI->setFlag(MachineInstr::BundledSucc);
900  IsInBundle = true;
901  if (!Token.is(MIToken::Newline))
902  // The next instruction can be on the same line.
903  continue;
904  }
905  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
906  lex();
907  }
908 
909  // Construct successor list by searching for basic block machine operands.
910  if (!ExplicitSuccessors) {
912  bool IsFallthrough;
913  guessSuccessors(MBB, Successors, IsFallthrough);
914  for (MachineBasicBlock *Succ : Successors)
915  MBB.addSuccessor(Succ);
916 
917  if (IsFallthrough) {
918  AddFalthroughFrom = &MBB;
919  } else {
921  }
922  }
923 
924  return false;
925 }
926 
927 bool MIParser::parseBasicBlocks() {
928  lex();
929  // Skip until the first machine basic block.
930  while (Token.is(MIToken::Newline))
931  lex();
932  if (Token.isErrorOrEOF())
933  return Token.isError();
934  // The first parsing pass should have verified that this token is a MBB label
935  // in the 'parseBasicBlockDefinitions' method.
937  MachineBasicBlock *AddFalthroughFrom = nullptr;
938  do {
939  MachineBasicBlock *MBB = nullptr;
940  if (parseMBBReference(MBB))
941  return true;
942  if (AddFalthroughFrom) {
943  if (!AddFalthroughFrom->isSuccessor(MBB))
944  AddFalthroughFrom->addSuccessor(MBB);
945  AddFalthroughFrom->normalizeSuccProbs();
946  AddFalthroughFrom = nullptr;
947  }
948  if (parseBasicBlock(*MBB, AddFalthroughFrom))
949  return true;
950  // The method 'parseBasicBlock' should parse the whole block until the next
951  // block or the end of file.
952  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
953  } while (Token.isNot(MIToken::Eof));
954  return false;
955 }
956 
958  // Parse any register operands before '='
961  while (Token.isRegister() || Token.isRegisterFlag()) {
962  auto Loc = Token.location();
963  Optional<unsigned> TiedDefIdx;
964  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
965  return true;
966  Operands.push_back(
967  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
968  if (Token.isNot(MIToken::comma))
969  break;
970  lex();
971  }
972  if (!Operands.empty() && expectAndConsume(MIToken::equal))
973  return true;
974 
975  unsigned OpCode, Flags = 0;
976  if (Token.isError() || parseInstruction(OpCode, Flags))
977  return true;
978 
979  // Parse the remaining machine operands.
980  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
981  Token.isNot(MIToken::kw_post_instr_symbol) &&
982  Token.isNot(MIToken::kw_heap_alloc_marker) &&
983  Token.isNot(MIToken::kw_debug_location) &&
984  Token.isNot(MIToken::kw_debug_instr_number) &&
985  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
986  auto Loc = Token.location();
987  Optional<unsigned> TiedDefIdx;
988  if (parseMachineOperandAndTargetFlags(OpCode, Operands.size(), MO, TiedDefIdx))
989  return true;
990  if ((OpCode == TargetOpcode::DBG_VALUE ||
991  OpCode == TargetOpcode::DBG_VALUE_LIST) &&
992  MO.isReg())
993  MO.setIsDebug();
994  Operands.push_back(
995  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
996  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
997  Token.is(MIToken::lbrace))
998  break;
999  if (Token.isNot(MIToken::comma))
1000  return error("expected ',' before the next machine operand");
1001  lex();
1002  }
1003 
1004  MCSymbol *PreInstrSymbol = nullptr;
1005  if (Token.is(MIToken::kw_pre_instr_symbol))
1006  if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1007  return true;
1008  MCSymbol *PostInstrSymbol = nullptr;
1009  if (Token.is(MIToken::kw_post_instr_symbol))
1010  if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1011  return true;
1012  MDNode *HeapAllocMarker = nullptr;
1013  if (Token.is(MIToken::kw_heap_alloc_marker))
1014  if (parseHeapAllocMarker(HeapAllocMarker))
1015  return true;
1016 
1017  unsigned InstrNum = 0;
1018  if (Token.is(MIToken::kw_debug_instr_number)) {
1019  lex();
1020  if (Token.isNot(MIToken::IntegerLiteral))
1021  return error("expected an integer literal after 'debug-instr-number'");
1022  if (getUnsigned(InstrNum))
1023  return true;
1024  lex();
1025  // Lex past trailing comma if present.
1026  if (Token.is(MIToken::comma))
1027  lex();
1028  }
1029 
1030  DebugLoc DebugLocation;
1031  if (Token.is(MIToken::kw_debug_location)) {
1032  lex();
1033  MDNode *Node = nullptr;
1034  if (Token.is(MIToken::exclaim)) {
1035  if (parseMDNode(Node))
1036  return true;
1037  } else if (Token.is(MIToken::md_dilocation)) {
1038  if (parseDILocation(Node))
1039  return true;
1040  } else
1041  return error("expected a metadata node after 'debug-location'");
1042  if (!isa<DILocation>(Node))
1043  return error("referenced metadata is not a DILocation");
1044  DebugLocation = DebugLoc(Node);
1045  }
1046 
1047  // Parse the machine memory operands.
1049  if (Token.is(MIToken::coloncolon)) {
1050  lex();
1051  while (!Token.isNewlineOrEOF()) {
1052  MachineMemOperand *MemOp = nullptr;
1053  if (parseMachineMemoryOperand(MemOp))
1054  return true;
1055  MemOperands.push_back(MemOp);
1056  if (Token.isNewlineOrEOF())
1057  break;
1058  if (Token.isNot(MIToken::comma))
1059  return error("expected ',' before the next machine memory operand");
1060  lex();
1061  }
1062  }
1063 
1064  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1065  if (!MCID.isVariadic()) {
1066  // FIXME: Move the implicit operand verification to the machine verifier.
1067  if (verifyImplicitOperands(Operands, MCID))
1068  return true;
1069  }
1070 
1071  // TODO: Check for extraneous machine operands.
1072  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
1073  MI->setFlags(Flags);
1074  for (const auto &Operand : Operands)
1075  MI->addOperand(MF, Operand.Operand);
1076  if (assignRegisterTies(*MI, Operands))
1077  return true;
1078  if (PreInstrSymbol)
1079  MI->setPreInstrSymbol(MF, PreInstrSymbol);
1080  if (PostInstrSymbol)
1081  MI->setPostInstrSymbol(MF, PostInstrSymbol);
1082  if (HeapAllocMarker)
1083  MI->setHeapAllocMarker(MF, HeapAllocMarker);
1084  if (!MemOperands.empty())
1085  MI->setMemRefs(MF, MemOperands);
1086  if (InstrNum)
1087  MI->setDebugInstrNum(InstrNum);
1088  return false;
1089 }
1090 
1091 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
1092  lex();
1093  if (Token.isNot(MIToken::MachineBasicBlock))
1094  return error("expected a machine basic block reference");
1095  if (parseMBBReference(MBB))
1096  return true;
1097  lex();
1098  if (Token.isNot(MIToken::Eof))
1099  return error(
1100  "expected end of string after the machine basic block reference");
1101  return false;
1102 }
1103 
1104 bool MIParser::parseStandaloneNamedRegister(Register &Reg) {
1105  lex();
1106  if (Token.isNot(MIToken::NamedRegister))
1107  return error("expected a named register");
1108  if (parseNamedRegister(Reg))
1109  return true;
1110  lex();
1111  if (Token.isNot(MIToken::Eof))
1112  return error("expected end of string after the register reference");
1113  return false;
1114 }
1115 
1116 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
1117  lex();
1118  if (Token.isNot(MIToken::VirtualRegister))
1119  return error("expected a virtual register");
1120  if (parseVirtualRegister(Info))
1121  return true;
1122  lex();
1123  if (Token.isNot(MIToken::Eof))
1124  return error("expected end of string after the register reference");
1125  return false;
1126 }
1127 
1128 bool MIParser::parseStandaloneRegister(Register &Reg) {
1129  lex();
1130  if (Token.isNot(MIToken::NamedRegister) &&
1131  Token.isNot(MIToken::VirtualRegister))
1132  return error("expected either a named or virtual register");
1133 
1134  VRegInfo *Info;
1135  if (parseRegister(Reg, Info))
1136  return true;
1137 
1138  lex();
1139  if (Token.isNot(MIToken::Eof))
1140  return error("expected end of string after the register reference");
1141  return false;
1142 }
1143 
1144 bool MIParser::parseStandaloneStackObject(int &FI) {
1145  lex();
1146  if (Token.isNot(MIToken::StackObject))
1147  return error("expected a stack object");
1148  if (parseStackFrameIndex(FI))
1149  return true;
1150  if (Token.isNot(MIToken::Eof))
1151  return error("expected end of string after the stack object reference");
1152  return false;
1153 }
1154 
1155 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
1156  lex();
1157  if (Token.is(MIToken::exclaim)) {
1158  if (parseMDNode(Node))
1159  return true;
1160  } else if (Token.is(MIToken::md_diexpr)) {
1161  if (parseDIExpression(Node))
1162  return true;
1163  } else if (Token.is(MIToken::md_dilocation)) {
1164  if (parseDILocation(Node))
1165  return true;
1166  } else
1167  return error("expected a metadata node");
1168  if (Token.isNot(MIToken::Eof))
1169  return error("expected end of string after the metadata node");
1170  return false;
1171 }
1172 
1173 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
1174  assert(MO.isImplicit());
1175  return MO.isDef() ? "implicit-def" : "implicit";
1176 }
1177 
1178 static std::string getRegisterName(const TargetRegisterInfo *TRI,
1179  Register Reg) {
1180  assert(Register::isPhysicalRegister(Reg) && "expected phys reg");
1181  return StringRef(TRI->getName(Reg)).lower();
1182 }
1183 
1184 /// Return true if the parsed machine operands contain a given machine operand.
1185 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
1187  for (const auto &I : Operands) {
1188  if (ImplicitOperand.isIdenticalTo(I.Operand))
1189  return true;
1190  }
1191  return false;
1192 }
1193 
1194 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
1195  const MCInstrDesc &MCID) {
1196  if (MCID.isCall())
1197  // We can't verify call instructions as they can contain arbitrary implicit
1198  // register and register mask operands.
1199  return false;
1200 
1201  // Gather all the expected implicit operands.
1202  SmallVector<MachineOperand, 4> ImplicitOperands;
1203  if (MCID.ImplicitDefs)
1204  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
1205  ImplicitOperands.push_back(
1206  MachineOperand::CreateReg(*ImpDefs, true, true));
1207  if (MCID.ImplicitUses)
1208  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
1209  ImplicitOperands.push_back(
1210  MachineOperand::CreateReg(*ImpUses, false, true));
1211 
1212  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1213  assert(TRI && "Expected target register info");
1214  for (const auto &I : ImplicitOperands) {
1216  continue;
1217  return error(Operands.empty() ? Token.location() : Operands.back().End,
1218  Twine("missing implicit register operand '") +
1219  printImplicitRegisterFlag(I) + " $" +
1220  getRegisterName(TRI, I.getReg()) + "'");
1221  }
1222  return false;
1223 }
1224 
1225 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
1226  // Allow frame and fast math flags for OPCODE
1227  while (Token.is(MIToken::kw_frame_setup) ||
1228  Token.is(MIToken::kw_frame_destroy) ||
1229  Token.is(MIToken::kw_nnan) ||
1230  Token.is(MIToken::kw_ninf) ||
1231  Token.is(MIToken::kw_nsz) ||
1232  Token.is(MIToken::kw_arcp) ||
1233  Token.is(MIToken::kw_contract) ||
1234  Token.is(MIToken::kw_afn) ||
1235  Token.is(MIToken::kw_reassoc) ||
1236  Token.is(MIToken::kw_nuw) ||
1237  Token.is(MIToken::kw_nsw) ||
1238  Token.is(MIToken::kw_exact) ||
1239  Token.is(MIToken::kw_nofpexcept)) {
1240  // Mine frame and fast math flags
1241  if (Token.is(MIToken::kw_frame_setup))
1242  Flags |= MachineInstr::FrameSetup;
1243  if (Token.is(MIToken::kw_frame_destroy))
1244  Flags |= MachineInstr::FrameDestroy;
1245  if (Token.is(MIToken::kw_nnan))
1246  Flags |= MachineInstr::FmNoNans;
1247  if (Token.is(MIToken::kw_ninf))
1248  Flags |= MachineInstr::FmNoInfs;
1249  if (Token.is(MIToken::kw_nsz))
1250  Flags |= MachineInstr::FmNsz;
1251  if (Token.is(MIToken::kw_arcp))
1252  Flags |= MachineInstr::FmArcp;
1253  if (Token.is(MIToken::kw_contract))
1254  Flags |= MachineInstr::FmContract;
1255  if (Token.is(MIToken::kw_afn))
1256  Flags |= MachineInstr::FmAfn;
1257  if (Token.is(MIToken::kw_reassoc))
1258  Flags |= MachineInstr::FmReassoc;
1259  if (Token.is(MIToken::kw_nuw))
1260  Flags |= MachineInstr::NoUWrap;
1261  if (Token.is(MIToken::kw_nsw))
1262  Flags |= MachineInstr::NoSWrap;
1263  if (Token.is(MIToken::kw_exact))
1264  Flags |= MachineInstr::IsExact;
1265  if (Token.is(MIToken::kw_nofpexcept))
1266  Flags |= MachineInstr::NoFPExcept;
1267 
1268  lex();
1269  }
1270  if (Token.isNot(MIToken::Identifier))
1271  return error("expected a machine instruction");
1272  StringRef InstrName = Token.stringValue();
1273  if (PFS.Target.parseInstrName(InstrName, OpCode))
1274  return error(Twine("unknown machine instruction name '") + InstrName + "'");
1275  lex();
1276  return false;
1277 }
1278 
1279 bool MIParser::parseNamedRegister(Register &Reg) {
1280  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
1281  StringRef Name = Token.stringValue();
1282  if (PFS.Target.getRegisterByName(Name, Reg))
1283  return error(Twine("unknown register name '") + Name + "'");
1284  return false;
1285 }
1286 
1287 bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
1288  assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
1289  StringRef Name = Token.stringValue();
1290  // TODO: Check that the VReg name is not the same as a physical register name.
1291  // If it is, then print a warning (when warnings are implemented).
1292  Info = &PFS.getVRegInfoNamed(Name);
1293  return false;
1294 }
1295 
1296 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
1297  if (Token.is(MIToken::NamedVirtualRegister))
1298  return parseNamedVirtualRegister(Info);
1299  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
1300  unsigned ID;
1301  if (getUnsigned(ID))
1302  return true;
1303  Info = &PFS.getVRegInfo(ID);
1304  return false;
1305 }
1306 
1307 bool MIParser::parseRegister(Register &Reg, VRegInfo *&Info) {
1308  switch (Token.kind()) {
1309  case MIToken::underscore:
1310  Reg = 0;
1311  return false;
1313  return parseNamedRegister(Reg);
1316  if (parseVirtualRegister(Info))
1317  return true;
1318  Reg = Info->VReg;
1319  return false;
1320  // TODO: Parse other register kinds.
1321  default:
1322  llvm_unreachable("The current token should be a register");
1323  }
1324 }
1325 
1326 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
1327  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
1328  return error("expected '_', register class, or register bank name");
1329  StringRef::iterator Loc = Token.location();
1330  StringRef Name = Token.stringValue();
1331 
1332  // Was it a register class?
1333  const TargetRegisterClass *RC = PFS.Target.getRegClass(Name);
1334  if (RC) {
1335  lex();
1336 
1337  switch (RegInfo.Kind) {
1338  case VRegInfo::UNKNOWN:
1339  case VRegInfo::NORMAL:
1340  RegInfo.Kind = VRegInfo::NORMAL;
1341  if (RegInfo.Explicit && RegInfo.D.RC != RC) {
1342  const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
1343  return error(Loc, Twine("conflicting register classes, previously: ") +
1344  Twine(TRI.getRegClassName(RegInfo.D.RC)));
1345  }
1346  RegInfo.D.RC = RC;
1347  RegInfo.Explicit = true;
1348  return false;
1349 
1350  case VRegInfo::GENERIC:
1351  case VRegInfo::REGBANK:
1352  return error(Loc, "register class specification on generic register");
1353  }
1354  llvm_unreachable("Unexpected register kind");
1355  }
1356 
1357  // Should be a register bank or a generic register.
1358  const RegisterBank *RegBank = nullptr;
1359  if (Name != "_") {
1360  RegBank = PFS.Target.getRegBank(Name);
1361  if (!RegBank)
1362  return error(Loc, "expected '_', register class, or register bank name");
1363  }
1364 
1365  lex();
1366 
1367  switch (RegInfo.Kind) {
1368  case VRegInfo::UNKNOWN:
1369  case VRegInfo::GENERIC:
1370  case VRegInfo::REGBANK:
1371  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1372  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1373  return error(Loc, "conflicting generic register banks");
1374  RegInfo.D.RegBank = RegBank;
1375  RegInfo.Explicit = true;
1376  return false;
1377 
1378  case VRegInfo::NORMAL:
1379  return error(Loc, "register bank specification on normal register");
1380  }
1381  llvm_unreachable("Unexpected register kind");
1382 }
1383 
1384 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1385  const unsigned OldFlags = Flags;
1386  switch (Token.kind()) {
1387  case MIToken::kw_implicit:
1388  Flags |= RegState::Implicit;
1389  break;
1391  Flags |= RegState::ImplicitDefine;
1392  break;
1393  case MIToken::kw_def:
1394  Flags |= RegState::Define;
1395  break;
1396  case MIToken::kw_dead:
1397  Flags |= RegState::Dead;
1398  break;
1399  case MIToken::kw_killed:
1400  Flags |= RegState::Kill;
1401  break;
1402  case MIToken::kw_undef:
1403  Flags |= RegState::Undef;
1404  break;
1405  case MIToken::kw_internal:
1406  Flags |= RegState::InternalRead;
1407  break;
1409  Flags |= RegState::EarlyClobber;
1410  break;
1411  case MIToken::kw_debug_use:
1412  Flags |= RegState::Debug;
1413  break;
1414  case MIToken::kw_renamable:
1415  Flags |= RegState::Renamable;
1416  break;
1417  default:
1418  llvm_unreachable("The current token should be a register flag");
1419  }
1420  if (OldFlags == Flags)
1421  // We know that the same flag is specified more than once when the flags
1422  // weren't modified.
1423  return error("duplicate '" + Token.stringValue() + "' register flag");
1424  lex();
1425  return false;
1426 }
1427 
1428 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1429  assert(Token.is(MIToken::dot));
1430  lex();
1431  if (Token.isNot(MIToken::Identifier))
1432  return error("expected a subregister index after '.'");
1433  auto Name = Token.stringValue();
1434  SubReg = PFS.Target.getSubRegIndex(Name);
1435  if (!SubReg)
1436  return error(Twine("use of unknown subregister index '") + Name + "'");
1437  lex();
1438  return false;
1439 }
1440 
1441 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1442  if (!consumeIfPresent(MIToken::kw_tied_def))
1443  return true;
1444  if (Token.isNot(MIToken::IntegerLiteral))
1445  return error("expected an integer literal after 'tied-def'");
1446  if (getUnsigned(TiedDefIdx))
1447  return true;
1448  lex();
1449  if (expectAndConsume(MIToken::rparen))
1450  return true;
1451  return false;
1452 }
1453 
1454 bool MIParser::assignRegisterTies(MachineInstr &MI,
1456  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1457  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1458  if (!Operands[I].TiedDefIdx)
1459  continue;
1460  // The parser ensures that this operand is a register use, so we just have
1461  // to check the tied-def operand.
1462  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1463  if (DefIdx >= E)
1464  return error(Operands[I].Begin,
1465  Twine("use of invalid tied-def operand index '" +
1466  Twine(DefIdx) + "'; instruction has only ") +
1467  Twine(E) + " operands");
1468  const auto &DefOperand = Operands[DefIdx].Operand;
1469  if (!DefOperand.isReg() || !DefOperand.isDef())
1470  // FIXME: add note with the def operand.
1471  return error(Operands[I].Begin,
1472  Twine("use of invalid tied-def operand index '") +
1473  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1474  " isn't a defined register");
1475  // Check that the tied-def operand wasn't tied elsewhere.
1476  for (const auto &TiedPair : TiedRegisterPairs) {
1477  if (TiedPair.first == DefIdx)
1478  return error(Operands[I].Begin,
1479  Twine("the tied-def operand #") + Twine(DefIdx) +
1480  " is already tied with another register operand");
1481  }
1482  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1483  }
1484  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1485  // indices must be less than tied max.
1486  for (const auto &TiedPair : TiedRegisterPairs)
1487  MI.tieOperands(TiedPair.first, TiedPair.second);
1488  return false;
1489 }
1490 
1491 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1492  Optional<unsigned> &TiedDefIdx,
1493  bool IsDef) {
1494  unsigned Flags = IsDef ? RegState::Define : 0;
1495  while (Token.isRegisterFlag()) {
1496  if (parseRegisterFlag(Flags))
1497  return true;
1498  }
1499  if (!Token.isRegister())
1500  return error("expected a register after register flags");
1501  Register Reg;
1502  VRegInfo *RegInfo;
1503  if (parseRegister(Reg, RegInfo))
1504  return true;
1505  lex();
1506  unsigned SubReg = 0;
1507  if (Token.is(MIToken::dot)) {
1508  if (parseSubRegisterIndex(SubReg))
1509  return true;
1511  return error("subregister index expects a virtual register");
1512  }
1513  if (Token.is(MIToken::colon)) {
1515  return error("register class specification expects a virtual register");
1516  lex();
1517  if (parseRegisterClassOrBank(*RegInfo))
1518  return true;
1519  }
1520  MachineRegisterInfo &MRI = MF.getRegInfo();
1521  if ((Flags & RegState::Define) == 0) {
1522  if (consumeIfPresent(MIToken::lparen)) {
1523  unsigned Idx;
1524  if (!parseRegisterTiedDefIndex(Idx))
1525  TiedDefIdx = Idx;
1526  else {
1527  // Try a redundant low-level type.
1528  LLT Ty;
1529  if (parseLowLevelType(Token.location(), Ty))
1530  return error("expected tied-def or low-level type after '('");
1531 
1532  if (expectAndConsume(MIToken::rparen))
1533  return true;
1534 
1535  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1536  return error("inconsistent type for generic virtual register");
1537 
1538  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1539  MRI.setType(Reg, Ty);
1540  }
1541  }
1542  } else if (consumeIfPresent(MIToken::lparen)) {
1543  // Virtual registers may have a tpe with GlobalISel.
1545  return error("unexpected type on physical register");
1546 
1547  LLT Ty;
1548  if (parseLowLevelType(Token.location(), Ty))
1549  return true;
1550 
1551  if (expectAndConsume(MIToken::rparen))
1552  return true;
1553 
1554  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1555  return error("inconsistent type for generic virtual register");
1556 
1557  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1558  MRI.setType(Reg, Ty);
1559  } else if (Register::isVirtualRegister(Reg)) {
1560  // Generic virtual registers must have a type.
1561  // If we end up here this means the type hasn't been specified and
1562  // this is bad!
1563  if (RegInfo->Kind == VRegInfo::GENERIC ||
1564  RegInfo->Kind == VRegInfo::REGBANK)
1565  return error("generic virtual registers must have a type");
1566  }
1568  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1569  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1570  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1571  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1572 
1573  return false;
1574 }
1575 
1576 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1577  assert(Token.is(MIToken::IntegerLiteral));
1578  const APSInt &Int = Token.integerValue();
1579  if (Int.getMinSignedBits() > 64)
1580  return error("integer literal is too large to be an immediate operand");
1581  Dest = MachineOperand::CreateImm(Int.getExtValue());
1582  lex();
1583  return false;
1584 }
1585 
1586 bool MIParser::parseTargetImmMnemonic(const unsigned OpCode,
1587  const unsigned OpIdx,
1588  MachineOperand &Dest,
1589  const MIRFormatter &MF) {
1590  assert(Token.is(MIToken::dot));
1591  auto Loc = Token.location(); // record start position
1592  size_t Len = 1; // for "."
1593  lex();
1594 
1595  // Handle the case that mnemonic starts with number.
1596  if (Token.is(MIToken::IntegerLiteral)) {
1597  Len += Token.range().size();
1598  lex();
1599  }
1600 
1601  StringRef Src;
1602  if (Token.is(MIToken::comma))
1603  Src = StringRef(Loc, Len);
1604  else {
1605  assert(Token.is(MIToken::Identifier));
1606  Src = StringRef(Loc, Len + Token.stringValue().size());
1607  }
1608  int64_t Val;
1609  if (MF.parseImmMnemonic(OpCode, OpIdx, Src, Val,
1610  [this](StringRef::iterator Loc, const Twine &Msg)
1611  -> bool { return error(Loc, Msg); }))
1612  return true;
1613 
1614  Dest = MachineOperand::CreateImm(Val);
1615  if (!Token.is(MIToken::comma))
1616  lex();
1617  return false;
1618 }
1619 
1620 static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1621  PerFunctionMIParsingState &PFS, const Constant *&C,
1622  ErrorCallbackType ErrCB) {
1623  auto Source = StringValue.str(); // The source has to be null terminated.
1624  SMDiagnostic Err;
1626  &PFS.IRSlots);
1627  if (!C)
1628  return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
1629  return false;
1630 }
1631 
1633  const Constant *&C) {
1635  Loc, StringValue, PFS, C,
1636  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1637  return error(Loc, Msg);
1638  });
1639 }
1640 
1642  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1643  return true;
1644  lex();
1645  return false;
1646 }
1647 
1648 // See LLT implemntation for bit size limits.
1649 static bool verifyScalarSize(uint64_t Size) {
1650  return Size != 0 && isUInt<16>(Size);
1651 }
1652 
1653 static bool verifyVectorElementCount(uint64_t NumElts) {
1654  return NumElts != 0 && isUInt<16>(NumElts);
1655 }
1656 
1657 static bool verifyAddrSpace(uint64_t AddrSpace) {
1658  return isUInt<24>(AddrSpace);
1659 }
1660 
1661 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1662  if (Token.range().front() == 's' || Token.range().front() == 'p') {
1663  StringRef SizeStr = Token.range().drop_front();
1664  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1665  return error("expected integers after 's'/'p' type character");
1666  }
1667 
1668  if (Token.range().front() == 's') {
1669  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1670  if (!verifyScalarSize(ScalarSize))
1671  return error("invalid size for scalar type");
1672 
1673  Ty = LLT::scalar(ScalarSize);
1674  lex();
1675  return false;
1676  } else if (Token.range().front() == 'p') {
1677  const DataLayout &DL = MF.getDataLayout();
1678  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1679  if (!verifyAddrSpace(AS))
1680  return error("invalid address space number");
1681 
1682  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1683  lex();
1684  return false;
1685  }
1686 
1687  // Now we're looking for a vector.
1688  if (Token.isNot(MIToken::less))
1689  return error(Loc,
1690  "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1691  lex();
1692 
1693  if (Token.isNot(MIToken::IntegerLiteral))
1694  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1695  uint64_t NumElements = Token.integerValue().getZExtValue();
1696  if (!verifyVectorElementCount(NumElements))
1697  return error("invalid number of vector elements");
1698 
1699  lex();
1700 
1701  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1702  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1703  lex();
1704 
1705  if (Token.range().front() != 's' && Token.range().front() != 'p')
1706  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1707  StringRef SizeStr = Token.range().drop_front();
1708  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1709  return error("expected integers after 's'/'p' type character");
1710 
1711  if (Token.range().front() == 's') {
1712  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1713  if (!verifyScalarSize(ScalarSize))
1714  return error("invalid size for scalar type");
1715  Ty = LLT::scalar(ScalarSize);
1716  } else if (Token.range().front() == 'p') {
1717  const DataLayout &DL = MF.getDataLayout();
1718  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1719  if (!verifyAddrSpace(AS))
1720  return error("invalid address space number");
1721 
1722  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1723  } else
1724  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1725  lex();
1726 
1727  if (Token.isNot(MIToken::greater))
1728  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1729  lex();
1730 
1731  Ty = LLT::vector(NumElements, Ty);
1732  return false;
1733 }
1734 
1735 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1736  assert(Token.is(MIToken::Identifier));
1737  StringRef TypeStr = Token.range();
1738  if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
1739  TypeStr.front() != 'p')
1740  return error(
1741  "a typed immediate operand should start with one of 'i', 's', or 'p'");
1742  StringRef SizeStr = Token.range().drop_front();
1743  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1744  return error("expected integers after 'i'/'s'/'p' type character");
1745 
1746  auto Loc = Token.location();
1747  lex();
1748  if (Token.isNot(MIToken::IntegerLiteral)) {
1749  if (Token.isNot(MIToken::Identifier) ||
1750  !(Token.range() == "true" || Token.range() == "false"))
1751  return error("expected an integer literal");
1752  }
1753  const Constant *C = nullptr;
1754  if (parseIRConstant(Loc, C))
1755  return true;
1756  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1757  return false;
1758 }
1759 
1760 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1761  auto Loc = Token.location();
1762  lex();
1763  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1764  Token.isNot(MIToken::HexLiteral))
1765  return error("expected a floating point literal");
1766  const Constant *C = nullptr;
1767  if (parseIRConstant(Loc, C))
1768  return true;
1769  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1770  return false;
1771 }
1772 
1773 static bool getHexUint(const MIToken &Token, APInt &Result) {
1774  assert(Token.is(MIToken::HexLiteral));
1775  StringRef S = Token.range();
1776  assert(S[0] == '0' && tolower(S[1]) == 'x');
1777  // This could be a floating point literal with a special prefix.
1778  if (!isxdigit(S[2]))
1779  return true;
1780  StringRef V = S.substr(2);
1781  APInt A(V.size()*4, V, 16);
1782 
1783  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
1784  // sure it isn't the case before constructing result.
1785  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
1786  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
1787  return false;
1788 }
1789 
1790 static bool getUnsigned(const MIToken &Token, unsigned &Result,
1791  ErrorCallbackType ErrCB) {
1792  if (Token.hasIntegerValue()) {
1793  const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
1794  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1795  if (Val64 == Limit)
1796  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
1797  Result = Val64;
1798  return false;
1799  }
1800  if (Token.is(MIToken::HexLiteral)) {
1801  APInt A;
1802  if (getHexUint(Token, A))
1803  return true;
1804  if (A.getBitWidth() > 32)
1805  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
1806  Result = A.getZExtValue();
1807  return false;
1808  }
1809  return true;
1810 }
1811 
1812 bool MIParser::getUnsigned(unsigned &Result) {
1814  Token, Result, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1815  return error(Loc, Msg);
1816  });
1817 }
1818 
1820  assert(Token.is(MIToken::MachineBasicBlock) ||
1822  unsigned Number;
1823  if (getUnsigned(Number))
1824  return true;
1825  auto MBBInfo = PFS.MBBSlots.find(Number);
1826  if (MBBInfo == PFS.MBBSlots.end())
1827  return error(Twine("use of undefined machine basic block #") +
1828  Twine(Number));
1829  MBB = MBBInfo->second;
1830  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
1831  // we drop the <irname> from the bb.<id>.<irname> format.
1832  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
1833  return error(Twine("the name of machine basic block #") + Twine(Number) +
1834  " isn't '" + Token.stringValue() + "'");
1835  return false;
1836 }
1837 
1838 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
1840  if (parseMBBReference(MBB))
1841  return true;
1843  lex();
1844  return false;
1845 }
1846 
1847 bool MIParser::parseStackFrameIndex(int &FI) {
1848  assert(Token.is(MIToken::StackObject));
1849  unsigned ID;
1850  if (getUnsigned(ID))
1851  return true;
1852  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
1853  if (ObjectInfo == PFS.StackObjectSlots.end())
1854  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
1855  "'");
1856  StringRef Name;
1857  if (const auto *Alloca =
1858  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
1859  Name = Alloca->getName();
1860  if (!Token.stringValue().empty() && Token.stringValue() != Name)
1861  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
1862  "' isn't '" + Token.stringValue() + "'");
1863  lex();
1864  FI = ObjectInfo->second;
1865  return false;
1866 }
1867 
1868 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
1869  int FI;
1870  if (parseStackFrameIndex(FI))
1871  return true;
1872  Dest = MachineOperand::CreateFI(FI);
1873  return false;
1874 }
1875 
1876 bool MIParser::parseFixedStackFrameIndex(int &FI) {
1877  assert(Token.is(MIToken::FixedStackObject));
1878  unsigned ID;
1879  if (getUnsigned(ID))
1880  return true;
1881  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
1882  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
1883  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
1884  Twine(ID) + "'");
1885  lex();
1886  FI = ObjectInfo->second;
1887  return false;
1888 }
1889 
1890 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
1891  int FI;
1892  if (parseFixedStackFrameIndex(FI))
1893  return true;
1894  Dest = MachineOperand::CreateFI(FI);
1895  return false;
1896 }
1897 
1898 static bool parseGlobalValue(const MIToken &Token,
1900  ErrorCallbackType ErrCB) {
1901  switch (Token.kind()) {
1903  const Module *M = PFS.MF.getFunction().getParent();
1904  GV = M->getNamedValue(Token.stringValue());
1905  if (!GV)
1906  return ErrCB(Token.location(), Twine("use of undefined global value '") +
1907  Token.range() + "'");
1908  break;
1909  }
1910  case MIToken::GlobalValue: {
1911  unsigned GVIdx;
1912  if (getUnsigned(Token, GVIdx, ErrCB))
1913  return true;
1914  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
1915  return ErrCB(Token.location(), Twine("use of undefined global value '@") +
1916  Twine(GVIdx) + "'");
1917  GV = PFS.IRSlots.GlobalValues[GVIdx];
1918  break;
1919  }
1920  default:
1921  llvm_unreachable("The current token should be a global value");
1922  }
1923  return false;
1924 }
1925 
1928  Token, PFS, GV,
1929  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1930  return error(Loc, Msg);
1931  });
1932 }
1933 
1934 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
1935  GlobalValue *GV = nullptr;
1936  if (parseGlobalValue(GV))
1937  return true;
1938  lex();
1939  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
1940  if (parseOperandsOffset(Dest))
1941  return true;
1942  return false;
1943 }
1944 
1945 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
1946  assert(Token.is(MIToken::ConstantPoolItem));
1947  unsigned ID;
1948  if (getUnsigned(ID))
1949  return true;
1950  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
1951  if (ConstantInfo == PFS.ConstantPoolSlots.end())
1952  return error("use of undefined constant '%const." + Twine(ID) + "'");
1953  lex();
1954  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
1955  if (parseOperandsOffset(Dest))
1956  return true;
1957  return false;
1958 }
1959 
1960 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
1961  assert(Token.is(MIToken::JumpTableIndex));
1962  unsigned ID;
1963  if (getUnsigned(ID))
1964  return true;
1965  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
1966  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
1967  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
1968  lex();
1969  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
1970  return false;
1971 }
1972 
1973 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
1974  assert(Token.is(MIToken::ExternalSymbol));
1975  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
1976  lex();
1978  if (parseOperandsOffset(Dest))
1979  return true;
1980  return false;
1981 }
1982 
1983 bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
1984  assert(Token.is(MIToken::MCSymbol));
1985  MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
1986  lex();
1988  if (parseOperandsOffset(Dest))
1989  return true;
1990  return false;
1991 }
1992 
1993 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
1994  assert(Token.is(MIToken::SubRegisterIndex));
1995  StringRef Name = Token.stringValue();
1996  unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
1997  if (SubRegIndex == 0)
1998  return error(Twine("unknown subregister index '") + Name + "'");
1999  lex();
2000  Dest = MachineOperand::CreateImm(SubRegIndex);
2001  return false;
2002 }
2003 
2004 bool MIParser::parseMDNode(MDNode *&Node) {
2005  assert(Token.is(MIToken::exclaim));
2006 
2007  auto Loc = Token.location();
2008  lex();
2009  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2010  return error("expected metadata id after '!'");
2011  unsigned ID;
2012  if (getUnsigned(ID))
2013  return true;
2014  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
2015  if (NodeInfo == PFS.IRSlots.MetadataNodes.end())
2016  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
2017  lex();
2018  Node = NodeInfo->second.get();
2019  return false;
2020 }
2021 
2022 bool MIParser::parseDIExpression(MDNode *&Expr) {
2023  assert(Token.is(MIToken::md_diexpr));
2024  lex();
2025 
2026  // FIXME: Share this parsing with the IL parser.
2027  SmallVector<uint64_t, 8> Elements;
2028 
2029  if (expectAndConsume(MIToken::lparen))
2030  return true;
2031 
2032  if (Token.isNot(MIToken::rparen)) {
2033  do {
2034  if (Token.is(MIToken::Identifier)) {
2035  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
2036  lex();
2037  Elements.push_back(Op);
2038  continue;
2039  }
2040  if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) {
2041  lex();
2042  Elements.push_back(Enc);
2043  continue;
2044  }
2045  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
2046  }
2047 
2048  if (Token.isNot(MIToken::IntegerLiteral) ||
2049  Token.integerValue().isSigned())
2050  return error("expected unsigned integer");
2051 
2052  auto &U = Token.integerValue();
2053  if (U.ugt(UINT64_MAX))
2054  return error("element too large, limit is " + Twine(UINT64_MAX));
2055  Elements.push_back(U.getZExtValue());
2056  lex();
2057 
2058  } while (consumeIfPresent(MIToken::comma));
2059  }
2060 
2061  if (expectAndConsume(MIToken::rparen))
2062  return true;
2063 
2064  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
2065  return false;
2066 }
2067 
2068 bool MIParser::parseDILocation(MDNode *&Loc) {
2069  assert(Token.is(MIToken::md_dilocation));
2070  lex();
2071 
2072  bool HaveLine = false;
2073  unsigned Line = 0;
2074  unsigned Column = 0;
2075  MDNode *Scope = nullptr;
2076  MDNode *InlinedAt = nullptr;
2077  bool ImplicitCode = false;
2078 
2079  if (expectAndConsume(MIToken::lparen))
2080  return true;
2081 
2082  if (Token.isNot(MIToken::rparen)) {
2083  do {
2084  if (Token.is(MIToken::Identifier)) {
2085  if (Token.stringValue() == "line") {
2086  lex();
2087  if (expectAndConsume(MIToken::colon))
2088  return true;
2089  if (Token.isNot(MIToken::IntegerLiteral) ||
2090  Token.integerValue().isSigned())
2091  return error("expected unsigned integer");
2092  Line = Token.integerValue().getZExtValue();
2093  HaveLine = true;
2094  lex();
2095  continue;
2096  }
2097  if (Token.stringValue() == "column") {
2098  lex();
2099  if (expectAndConsume(MIToken::colon))
2100  return true;
2101  if (Token.isNot(MIToken::IntegerLiteral) ||
2102  Token.integerValue().isSigned())
2103  return error("expected unsigned integer");
2104  Column = Token.integerValue().getZExtValue();
2105  lex();
2106  continue;
2107  }
2108  if (Token.stringValue() == "scope") {
2109  lex();
2110  if (expectAndConsume(MIToken::colon))
2111  return true;
2112  if (parseMDNode(Scope))
2113  return error("expected metadata node");
2114  if (!isa<DIScope>(Scope))
2115  return error("expected DIScope node");
2116  continue;
2117  }
2118  if (Token.stringValue() == "inlinedAt") {
2119  lex();
2120  if (expectAndConsume(MIToken::colon))
2121  return true;
2122  if (Token.is(MIToken::exclaim)) {
2123  if (parseMDNode(InlinedAt))
2124  return true;
2125  } else if (Token.is(MIToken::md_dilocation)) {
2126  if (parseDILocation(InlinedAt))
2127  return true;
2128  } else
2129  return error("expected metadata node");
2130  if (!isa<DILocation>(InlinedAt))
2131  return error("expected DILocation node");
2132  continue;
2133  }
2134  if (Token.stringValue() == "isImplicitCode") {
2135  lex();
2136  if (expectAndConsume(MIToken::colon))
2137  return true;
2138  if (!Token.is(MIToken::Identifier))
2139  return error("expected true/false");
2140  // As far as I can see, we don't have any existing need for parsing
2141  // true/false in MIR yet. Do it ad-hoc until there's something else
2142  // that needs it.
2143  if (Token.stringValue() == "true")
2144  ImplicitCode = true;
2145  else if (Token.stringValue() == "false")
2146  ImplicitCode = false;
2147  else
2148  return error("expected true/false");
2149  lex();
2150  continue;
2151  }
2152  }
2153  return error(Twine("invalid DILocation argument '") +
2154  Token.stringValue() + "'");
2155  } while (consumeIfPresent(MIToken::comma));
2156  }
2157 
2158  if (expectAndConsume(MIToken::rparen))
2159  return true;
2160 
2161  if (!HaveLine)
2162  return error("DILocation requires line number");
2163  if (!Scope)
2164  return error("DILocation requires a scope");
2165 
2166  Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
2167  InlinedAt, ImplicitCode);
2168  return false;
2169 }
2170 
2171 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
2172  MDNode *Node = nullptr;
2173  if (Token.is(MIToken::exclaim)) {
2174  if (parseMDNode(Node))
2175  return true;
2176  } else if (Token.is(MIToken::md_diexpr)) {
2177  if (parseDIExpression(Node))
2178  return true;
2179  }
2180  Dest = MachineOperand::CreateMetadata(Node);
2181  return false;
2182 }
2183 
2184 bool MIParser::parseCFIOffset(int &Offset) {
2185  if (Token.isNot(MIToken::IntegerLiteral))
2186  return error("expected a cfi offset");
2187  if (Token.integerValue().getMinSignedBits() > 32)
2188  return error("expected a 32 bit integer (the cfi offset is too large)");
2189  Offset = (int)Token.integerValue().getExtValue();
2190  lex();
2191  return false;
2192 }
2193 
2194 bool MIParser::parseCFIRegister(Register &Reg) {
2195  if (Token.isNot(MIToken::NamedRegister))
2196  return error("expected a cfi register");
2197  Register LLVMReg;
2198  if (parseNamedRegister(LLVMReg))
2199  return true;
2200  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2201  assert(TRI && "Expected target register info");
2202  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
2203  if (DwarfReg < 0)
2204  return error("invalid DWARF register");
2205  Reg = (unsigned)DwarfReg;
2206  lex();
2207  return false;
2208 }
2209 
2210 bool MIParser::parseCFIEscapeValues(std::string &Values) {
2211  do {
2212  if (Token.isNot(MIToken::HexLiteral))
2213  return error("expected a hexadecimal literal");
2214  unsigned Value;
2215  if (getUnsigned(Value))
2216  return true;
2217  if (Value > UINT8_MAX)
2218  return error("expected a 8-bit integer (too large)");
2219  Values.push_back(static_cast<uint8_t>(Value));
2220  lex();
2221  } while (consumeIfPresent(MIToken::comma));
2222  return false;
2223 }
2224 
2225 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
2226  auto Kind = Token.kind();
2227  lex();
2228  int Offset;
2229  Register Reg;
2230  unsigned CFIIndex;
2231  switch (Kind) {
2233  if (parseCFIRegister(Reg))
2234  return true;
2235  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
2236  break;
2238  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2239  parseCFIOffset(Offset))
2240  return true;
2241  CFIIndex =
2242  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
2243  break;
2245  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2246  parseCFIOffset(Offset))
2247  return true;
2248  CFIIndex = MF.addFrameInst(
2250  break;
2252  if (parseCFIRegister(Reg))
2253  return true;
2254  CFIIndex =
2255  MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
2256  break;
2258  if (parseCFIOffset(Offset))
2259  return true;
2260  CFIIndex =
2261  MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, Offset));
2262  break;
2264  if (parseCFIOffset(Offset))
2265  return true;
2266  CFIIndex = MF.addFrameInst(
2268  break;
2270  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2271  parseCFIOffset(Offset))
2272  return true;
2273  CFIIndex =
2274  MF.addFrameInst(MCCFIInstruction::cfiDefCfa(nullptr, Reg, Offset));
2275  break;
2277  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRememberState(nullptr));
2278  break;
2280  if (parseCFIRegister(Reg))
2281  return true;
2282  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
2283  break;
2285  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestoreState(nullptr));
2286  break;
2288  if (parseCFIRegister(Reg))
2289  return true;
2290  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
2291  break;
2292  case MIToken::kw_cfi_register: {
2293  Register Reg2;
2294  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2295  parseCFIRegister(Reg2))
2296  return true;
2297 
2298  CFIIndex =
2299  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
2300  break;
2301  }
2303  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
2304  break;
2306  CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
2307  break;
2308  case MIToken::kw_cfi_escape: {
2309  std::string Values;
2310  if (parseCFIEscapeValues(Values))
2311  return true;
2312  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
2313  break;
2314  }
2315  default:
2316  // TODO: Parse the other CFI operands.
2317  llvm_unreachable("The current token should be a cfi operand");
2318  }
2319  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
2320  return false;
2321 }
2322 
2323 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
2324  switch (Token.kind()) {
2325  case MIToken::NamedIRBlock: {
2326  BB = dyn_cast_or_null<BasicBlock>(
2327  F.getValueSymbolTable()->lookup(Token.stringValue()));
2328  if (!BB)
2329  return error(Twine("use of undefined IR block '") + Token.range() + "'");
2330  break;
2331  }
2332  case MIToken::IRBlock: {
2333  unsigned SlotNumber = 0;
2334  if (getUnsigned(SlotNumber))
2335  return true;
2336  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
2337  if (!BB)
2338  return error(Twine("use of undefined IR block '%ir-block.") +
2339  Twine(SlotNumber) + "'");
2340  break;
2341  }
2342  default:
2343  llvm_unreachable("The current token should be an IR block reference");
2344  }
2345  return false;
2346 }
2347 
2348 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
2349  assert(Token.is(MIToken::kw_blockaddress));
2350  lex();
2351  if (expectAndConsume(MIToken::lparen))
2352  return true;
2353  if (Token.isNot(MIToken::GlobalValue) &&
2354  Token.isNot(MIToken::NamedGlobalValue))
2355  return error("expected a global value");
2356  GlobalValue *GV = nullptr;
2357  if (parseGlobalValue(GV))
2358  return true;
2359  auto *F = dyn_cast<Function>(GV);
2360  if (!F)
2361  return error("expected an IR function reference");
2362  lex();
2363  if (expectAndConsume(MIToken::comma))
2364  return true;
2365  BasicBlock *BB = nullptr;
2366  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
2367  return error("expected an IR block reference");
2368  if (parseIRBlock(BB, *F))
2369  return true;
2370  lex();
2371  if (expectAndConsume(MIToken::rparen))
2372  return true;
2373  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
2374  if (parseOperandsOffset(Dest))
2375  return true;
2376  return false;
2377 }
2378 
2379 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
2380  assert(Token.is(MIToken::kw_intrinsic));
2381  lex();
2382  if (expectAndConsume(MIToken::lparen))
2383  return error("expected syntax intrinsic(@llvm.whatever)");
2384 
2385  if (Token.isNot(MIToken::NamedGlobalValue))
2386  return error("expected syntax intrinsic(@llvm.whatever)");
2387 
2388  std::string Name = std::string(Token.stringValue());
2389  lex();
2390 
2391  if (expectAndConsume(MIToken::rparen))
2392  return error("expected ')' to terminate intrinsic name");
2393 
2394  // Find out what intrinsic we're dealing with, first try the global namespace
2395  // and then the target's private intrinsics if that fails.
2396  const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo();
2398  if (ID == Intrinsic::not_intrinsic && TII)
2399  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
2400 
2402  return error("unknown intrinsic name");
2404 
2405  return false;
2406 }
2407 
2408 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
2409  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
2410  bool IsFloat = Token.is(MIToken::kw_floatpred);
2411  lex();
2412 
2413  if (expectAndConsume(MIToken::lparen))
2414  return error("expected syntax intpred(whatever) or floatpred(whatever");
2415 
2416  if (Token.isNot(MIToken::Identifier))
2417  return error("whatever");
2418 
2419  CmpInst::Predicate Pred;
2420  if (IsFloat) {
2421  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2422  .Case("false", CmpInst::FCMP_FALSE)
2423  .Case("oeq", CmpInst::FCMP_OEQ)
2424  .Case("ogt", CmpInst::FCMP_OGT)
2425  .Case("oge", CmpInst::FCMP_OGE)
2426  .Case("olt", CmpInst::FCMP_OLT)
2427  .Case("ole", CmpInst::FCMP_OLE)
2428  .Case("one", CmpInst::FCMP_ONE)
2429  .Case("ord", CmpInst::FCMP_ORD)
2430  .Case("uno", CmpInst::FCMP_UNO)
2431  .Case("ueq", CmpInst::FCMP_UEQ)
2432  .Case("ugt", CmpInst::FCMP_UGT)
2433  .Case("uge", CmpInst::FCMP_UGE)
2434  .Case("ult", CmpInst::FCMP_ULT)
2435  .Case("ule", CmpInst::FCMP_ULE)
2436  .Case("une", CmpInst::FCMP_UNE)
2437  .Case("true", CmpInst::FCMP_TRUE)
2439  if (!CmpInst::isFPPredicate(Pred))
2440  return error("invalid floating-point predicate");
2441  } else {
2442  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2443  .Case("eq", CmpInst::ICMP_EQ)
2444  .Case("ne", CmpInst::ICMP_NE)
2445  .Case("sgt", CmpInst::ICMP_SGT)
2446  .Case("sge", CmpInst::ICMP_SGE)
2447  .Case("slt", CmpInst::ICMP_SLT)
2448  .Case("sle", CmpInst::ICMP_SLE)
2449  .Case("ugt", CmpInst::ICMP_UGT)
2450  .Case("uge", CmpInst::ICMP_UGE)
2451  .Case("ult", CmpInst::ICMP_ULT)
2452  .Case("ule", CmpInst::ICMP_ULE)
2454  if (!CmpInst::isIntPredicate(Pred))
2455  return error("invalid integer predicate");
2456  }
2457 
2458  lex();
2459  Dest = MachineOperand::CreatePredicate(Pred);
2460  if (expectAndConsume(MIToken::rparen))
2461  return error("predicate should be terminated by ')'.");
2462 
2463  return false;
2464 }
2465 
2466 bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {
2467  assert(Token.is(MIToken::kw_shufflemask));
2468 
2469  lex();
2470  if (expectAndConsume(MIToken::lparen))
2471  return error("expected syntax shufflemask(<integer or undef>, ...)");
2472 
2473  SmallVector<int, 32> ShufMask;
2474  do {
2475  if (Token.is(MIToken::kw_undef)) {
2476  ShufMask.push_back(-1);
2477  } else if (Token.is(MIToken::IntegerLiteral)) {
2478  const APSInt &Int = Token.integerValue();
2479  ShufMask.push_back(Int.getExtValue());
2480  } else
2481  return error("expected integer constant");
2482 
2483  lex();
2484  } while (consumeIfPresent(MIToken::comma));
2485 
2486  if (expectAndConsume(MIToken::rparen))
2487  return error("shufflemask should be terminated by ')'.");
2488 
2489  ArrayRef<int> MaskAlloc = MF.allocateShuffleMask(ShufMask);
2490  Dest = MachineOperand::CreateShuffleMask(MaskAlloc);
2491  return false;
2492 }
2493 
2494 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
2495  assert(Token.is(MIToken::kw_target_index));
2496  lex();
2497  if (expectAndConsume(MIToken::lparen))
2498  return true;
2499  if (Token.isNot(MIToken::Identifier))
2500  return error("expected the name of the target index");
2501  int Index = 0;
2502  if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2503  return error("use of undefined target index '" + Token.stringValue() + "'");
2504  lex();
2505  if (expectAndConsume(MIToken::rparen))
2506  return true;
2507  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
2508  if (parseOperandsOffset(Dest))
2509  return true;
2510  return false;
2511 }
2512 
2513 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
2514  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2515  lex();
2516  if (expectAndConsume(MIToken::lparen))
2517  return true;
2518 
2519  uint32_t *Mask = MF.allocateRegMask();
2520  while (true) {
2521  if (Token.isNot(MIToken::NamedRegister))
2522  return error("expected a named register");
2523  Register Reg;
2524  if (parseNamedRegister(Reg))
2525  return true;
2526  lex();
2527  Mask[Reg / 32] |= 1U << (Reg % 32);
2528  // TODO: Report an error if the same register is used more than once.
2529  if (Token.isNot(MIToken::comma))
2530  break;
2531  lex();
2532  }
2533 
2534  if (expectAndConsume(MIToken::rparen))
2535  return true;
2537  return false;
2538 }
2539 
2540 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
2541  assert(Token.is(MIToken::kw_liveout));
2542  uint32_t *Mask = MF.allocateRegMask();
2543  lex();
2544  if (expectAndConsume(MIToken::lparen))
2545  return true;
2546  while (true) {
2547  if (Token.isNot(MIToken::NamedRegister))
2548  return error("expected a named register");
2549  Register Reg;
2550  if (parseNamedRegister(Reg))
2551  return true;
2552  lex();
2553  Mask[Reg / 32] |= 1U << (Reg % 32);
2554  // TODO: Report an error if the same register is used more than once.
2555  if (Token.isNot(MIToken::comma))
2556  break;
2557  lex();
2558  }
2559  if (expectAndConsume(MIToken::rparen))
2560  return true;
2562  return false;
2563 }
2564 
2565 bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
2566  MachineOperand &Dest,
2567  Optional<unsigned> &TiedDefIdx) {
2568  switch (Token.kind()) {
2569  case MIToken::kw_implicit:
2571  case MIToken::kw_def:
2572  case MIToken::kw_dead:
2573  case MIToken::kw_killed:
2574  case MIToken::kw_undef:
2575  case MIToken::kw_internal:
2577  case MIToken::kw_debug_use:
2578  case MIToken::kw_renamable:
2579  case MIToken::underscore:
2583  return parseRegisterOperand(Dest, TiedDefIdx);
2585  return parseImmediateOperand(Dest);
2586  case MIToken::kw_half:
2587  case MIToken::kw_float:
2588  case MIToken::kw_double:
2589  case MIToken::kw_x86_fp80:
2590  case MIToken::kw_fp128:
2591  case MIToken::kw_ppc_fp128:
2592  return parseFPImmediateOperand(Dest);
2594  return parseMBBOperand(Dest);
2595  case MIToken::StackObject:
2596  return parseStackObjectOperand(Dest);
2598  return parseFixedStackObjectOperand(Dest);
2599  case MIToken::GlobalValue:
2601  return parseGlobalAddressOperand(Dest);
2603  return parseConstantPoolIndexOperand(Dest);
2605  return parseJumpTableIndexOperand(Dest);
2607  return parseExternalSymbolOperand(Dest);
2608  case MIToken::MCSymbol:
2609  return parseMCSymbolOperand(Dest);
2611  return parseSubRegisterIndexOperand(Dest);
2612  case MIToken::md_diexpr:
2613  case MIToken::exclaim:
2614  return parseMetadataOperand(Dest);
2630  return parseCFIOperand(Dest);
2632  return parseBlockAddressOperand(Dest);
2633  case MIToken::kw_intrinsic:
2634  return parseIntrinsicOperand(Dest);
2636  return parseTargetIndexOperand(Dest);
2637  case MIToken::kw_liveout:
2638  return parseLiveoutRegisterMaskOperand(Dest);
2639  case MIToken::kw_floatpred:
2640  case MIToken::kw_intpred:
2641  return parsePredicateOperand(Dest);
2643  return parseShuffleMaskOperand(Dest);
2644  case MIToken::Error:
2645  return true;
2646  case MIToken::Identifier:
2647  if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2648  Dest = MachineOperand::CreateRegMask(RegMask);
2649  lex();
2650  break;
2651  } else if (Token.stringValue() == "CustomRegMask") {
2652  return parseCustomRegisterMaskOperand(Dest);
2653  } else
2654  return parseTypedImmediateOperand(Dest);
2655  case MIToken::dot: {
2656  const auto *TII = MF.getSubtarget().getInstrInfo();
2657  if (const auto *Formatter = TII->getMIRFormatter()) {
2658  return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
2659  }
2661  }
2662  default:
2663  // FIXME: Parse the MCSymbol machine operand.
2664  return error("expected a machine operand");
2665  }
2666  return false;
2667 }
2668 
2669 bool MIParser::parseMachineOperandAndTargetFlags(
2670  const unsigned OpCode, const unsigned OpIdx, MachineOperand &Dest,
2671  Optional<unsigned> &TiedDefIdx) {
2672  unsigned TF = 0;
2673  bool HasTargetFlags = false;
2674  if (Token.is(MIToken::kw_target_flags)) {
2675  HasTargetFlags = true;
2676  lex();
2677  if (expectAndConsume(MIToken::lparen))
2678  return true;
2679  if (Token.isNot(MIToken::Identifier))
2680  return error("expected the name of the target flag");
2681  if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2682  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2683  return error("use of undefined target flag '" + Token.stringValue() +
2684  "'");
2685  }
2686  lex();
2687  while (Token.is(MIToken::comma)) {
2688  lex();
2689  if (Token.isNot(MIToken::Identifier))
2690  return error("expected the name of the target flag");
2691  unsigned BitFlag = 0;
2692  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2693  return error("use of undefined target flag '" + Token.stringValue() +
2694  "'");
2695  // TODO: Report an error when using a duplicate bit target flag.
2696  TF |= BitFlag;
2697  lex();
2698  }
2699  if (expectAndConsume(MIToken::rparen))
2700  return true;
2701  }
2702  auto Loc = Token.location();
2703  if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
2704  return true;
2705  if (!HasTargetFlags)
2706  return false;
2707  if (Dest.isReg())
2708  return error(Loc, "register operands can't have target flags");
2709  Dest.setTargetFlags(TF);
2710  return false;
2711 }
2712 
2713 bool MIParser::parseOffset(int64_t &Offset) {
2714  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2715  return false;
2716  StringRef Sign = Token.range();
2717  bool IsNegative = Token.is(MIToken::minus);
2718  lex();
2719  if (Token.isNot(MIToken::IntegerLiteral))
2720  return error("expected an integer literal after '" + Sign + "'");
2721  if (Token.integerValue().getMinSignedBits() > 64)
2722  return error("expected 64-bit integer (too large)");
2723  Offset = Token.integerValue().getExtValue();
2724  if (IsNegative)
2725  Offset = -Offset;
2726  lex();
2727  return false;
2728 }
2729 
2730 bool MIParser::parseAlignment(unsigned &Alignment) {
2731  assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
2732  lex();
2733  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2734  return error("expected an integer literal after 'align'");
2735  if (getUnsigned(Alignment))
2736  return true;
2737  lex();
2738 
2739  if (!isPowerOf2_32(Alignment))
2740  return error("expected a power-of-2 literal after 'align'");
2741 
2742  return false;
2743 }
2744 
2745 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2746  assert(Token.is(MIToken::kw_addrspace));
2747  lex();
2748  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2749  return error("expected an integer literal after 'addrspace'");
2750  if (getUnsigned(Addrspace))
2751  return true;
2752  lex();
2753  return false;
2754 }
2755 
2756 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2757  int64_t Offset = 0;
2758  if (parseOffset(Offset))
2759  return true;
2760  Op.setOffset(Offset);
2761  return false;
2762 }
2763 
2764 static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS,
2765  const Value *&V, ErrorCallbackType ErrCB) {
2766  switch (Token.kind()) {
2767  case MIToken::NamedIRValue: {
2768  V = PFS.MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
2769  break;
2770  }
2771  case MIToken::IRValue: {
2772  unsigned SlotNumber = 0;
2773  if (getUnsigned(Token, SlotNumber, ErrCB))
2774  return true;
2775  V = PFS.getIRValue(SlotNumber);
2776  break;
2777  }
2779  case MIToken::GlobalValue: {
2780  GlobalValue *GV = nullptr;
2781  if (parseGlobalValue(Token, PFS, GV, ErrCB))
2782  return true;
2783  V = GV;
2784  break;
2785  }
2786  case MIToken::QuotedIRValue: {
2787  const Constant *C = nullptr;
2788  if (parseIRConstant(Token.location(), Token.stringValue(), PFS, C, ErrCB))
2789  return true;
2790  V = C;
2791  break;
2792  }
2794  V = nullptr;
2795  return false;
2796  default:
2797  llvm_unreachable("The current token should be an IR block reference");
2798  }
2799  if (!V)
2800  return ErrCB(Token.location(), Twine("use of undefined IR value '") + Token.range() + "'");
2801  return false;
2802 }
2803 
2804 bool MIParser::parseIRValue(const Value *&V) {
2806  Token, PFS, V, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2807  return error(Loc, Msg);
2808  });
2809 }
2810 
2811 bool MIParser::getUint64(uint64_t &Result) {
2812  if (Token.hasIntegerValue()) {
2813  if (Token.integerValue().getActiveBits() > 64)
2814  return error("expected 64-bit integer (too large)");
2815  Result = Token.integerValue().getZExtValue();
2816  return false;
2817  }
2818  if (Token.is(MIToken::HexLiteral)) {
2819  APInt A;
2820  if (getHexUint(A))
2821  return true;
2822  if (A.getBitWidth() > 64)
2823  return error("expected 64-bit integer (too large)");
2824  Result = A.getZExtValue();
2825  return false;
2826  }
2827  return true;
2828 }
2829 
2830 bool MIParser::getHexUint(APInt &Result) {
2831  return ::getHexUint(Token, Result);
2832 }
2833 
2834 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
2835  const auto OldFlags = Flags;
2836  switch (Token.kind()) {
2837  case MIToken::kw_volatile:
2839  break;
2842  break;
2845  break;
2846  case MIToken::kw_invariant:
2848  break;
2849  case MIToken::StringConstant: {
2851  if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
2852  return error("use of undefined target MMO flag '" + Token.stringValue() +
2853  "'");
2854  Flags |= TF;
2855  break;
2856  }
2857  default:
2858  llvm_unreachable("The current token should be a memory operand flag");
2859  }
2860  if (OldFlags == Flags)
2861  // We know that the same flag is specified more than once when the flags
2862  // weren't modified.
2863  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
2864  lex();
2865  return false;
2866 }
2867 
2868 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
2869  switch (Token.kind()) {
2870  case MIToken::kw_stack:
2871  PSV = MF.getPSVManager().getStack();
2872  break;
2873  case MIToken::kw_got:
2874  PSV = MF.getPSVManager().getGOT();
2875  break;
2877  PSV = MF.getPSVManager().getJumpTable();
2878  break;
2880  PSV = MF.getPSVManager().getConstantPool();
2881  break;
2883  int FI;
2884  if (parseFixedStackFrameIndex(FI))
2885  return true;
2886  PSV = MF.getPSVManager().getFixedStack(FI);
2887  // The token was already consumed, so use return here instead of break.
2888  return false;
2889  }
2890  case MIToken::StackObject: {
2891  int FI;
2892  if (parseStackFrameIndex(FI))
2893  return true;
2894  PSV = MF.getPSVManager().getFixedStack(FI);
2895  // The token was already consumed, so use return here instead of break.
2896  return false;
2897  }
2899  lex();
2900  switch (Token.kind()) {
2901  case MIToken::GlobalValue:
2903  GlobalValue *GV = nullptr;
2904  if (parseGlobalValue(GV))
2905  return true;
2906  PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
2907  break;
2908  }
2910  PSV = MF.getPSVManager().getExternalSymbolCallEntry(
2911  MF.createExternalSymbolName(Token.stringValue()));
2912  break;
2913  default:
2914  return error(
2915  "expected a global value or an external symbol after 'call-entry'");
2916  }
2917  break;
2918  case MIToken::kw_custom: {
2919  lex();
2920  const auto *TII = MF.getSubtarget().getInstrInfo();
2921  if (const auto *Formatter = TII->getMIRFormatter()) {
2922  if (Formatter->parseCustomPseudoSourceValue(
2923  Token.stringValue(), MF, PFS, PSV,
2924  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2925  return error(Loc, Msg);
2926  }))
2927  return true;
2928  } else
2929  return error("unable to parse target custom pseudo source value");
2930  break;
2931  }
2932  default:
2933  llvm_unreachable("The current token should be pseudo source value");
2934  }
2935  lex();
2936  return false;
2937 }
2938 
2939 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
2940  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
2941  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
2942  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
2943  Token.is(MIToken::kw_call_entry) || Token.is(MIToken::kw_custom)) {
2944  const PseudoSourceValue *PSV = nullptr;
2945  if (parseMemoryPseudoSourceValue(PSV))
2946  return true;
2947  int64_t Offset = 0;
2948  if (parseOffset(Offset))
2949  return true;
2950  Dest = MachinePointerInfo(PSV, Offset);
2951  return false;
2952  }
2953  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
2954  Token.isNot(MIToken::GlobalValue) &&
2955  Token.isNot(MIToken::NamedGlobalValue) &&
2956  Token.isNot(MIToken::QuotedIRValue) &&
2957  Token.isNot(MIToken::kw_unknown_address))
2958  return error("expected an IR value reference");
2959  const Value *V = nullptr;
2960  if (parseIRValue(V))
2961  return true;
2962  if (V && !V->getType()->isPointerTy())
2963  return error("expected a pointer IR value");
2964  lex();
2965  int64_t Offset = 0;
2966  if (parseOffset(Offset))
2967  return true;
2968  Dest = MachinePointerInfo(V, Offset);
2969  return false;
2970 }
2971 
2972 bool MIParser::parseOptionalScope(LLVMContext &Context,
2973  SyncScope::ID &SSID) {
2974  SSID = SyncScope::System;
2975  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
2976  lex();
2977  if (expectAndConsume(MIToken::lparen))
2978  return error("expected '(' in syncscope");
2979 
2980  std::string SSN;
2981  if (parseStringConstant(SSN))
2982  return true;
2983 
2984  SSID = Context.getOrInsertSyncScopeID(SSN);
2985  if (expectAndConsume(MIToken::rparen))
2986  return error("expected ')' in syncscope");
2987  }
2988 
2989  return false;
2990 }
2991 
2992 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
2993  Order = AtomicOrdering::NotAtomic;
2994  if (Token.isNot(MIToken::Identifier))
2995  return false;
2996 
2997  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
2998  .Case("unordered", AtomicOrdering::Unordered)
2999  .Case("monotonic", AtomicOrdering::Monotonic)
3000  .Case("acquire", AtomicOrdering::Acquire)
3001  .Case("release", AtomicOrdering::Release)
3005 
3006  if (Order != AtomicOrdering::NotAtomic) {
3007  lex();
3008  return false;
3009  }
3010 
3011  return error("expected an atomic scope, ordering or a size specification");
3012 }
3013 
3014 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
3015  if (expectAndConsume(MIToken::lparen))
3016  return true;
3018  while (Token.isMemoryOperandFlag()) {
3019  if (parseMemoryOperandFlag(Flags))
3020  return true;
3021  }
3022  if (Token.isNot(MIToken::Identifier) ||
3023  (Token.stringValue() != "load" && Token.stringValue() != "store"))
3024  return error("expected 'load' or 'store' memory operation");
3025  if (Token.stringValue() == "load")
3026  Flags |= MachineMemOperand::MOLoad;
3027  else
3028  Flags |= MachineMemOperand::MOStore;
3029  lex();
3030 
3031  // Optional 'store' for operands that both load and store.
3032  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
3033  Flags |= MachineMemOperand::MOStore;
3034  lex();
3035  }
3036 
3037  // Optional synchronization scope.
3038  SyncScope::ID SSID;
3039  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3040  return true;
3041 
3042  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
3043  AtomicOrdering Order, FailureOrder;
3044  if (parseOptionalAtomicOrdering(Order))
3045  return true;
3046 
3047  if (parseOptionalAtomicOrdering(FailureOrder))
3048  return true;
3049 
3050  if (Token.isNot(MIToken::IntegerLiteral) &&
3051  Token.isNot(MIToken::kw_unknown_size))
3052  return error("expected the size integer literal or 'unknown-size' after "
3053  "memory operation");
3054  uint64_t Size;
3055  if (Token.is(MIToken::IntegerLiteral)) {
3056  if (getUint64(Size))
3057  return true;
3058  } else if (Token.is(MIToken::kw_unknown_size)) {
3060  }
3061  lex();
3062 
3064  if (Token.is(MIToken::Identifier)) {
3065  const char *Word =
3066  ((Flags & MachineMemOperand::MOLoad) &&
3067  (Flags & MachineMemOperand::MOStore))
3068  ? "on"
3069  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
3070  if (Token.stringValue() != Word)
3071  return error(Twine("expected '") + Word + "'");
3072  lex();
3073 
3074  if (parseMachinePointerInfo(Ptr))
3075  return true;
3076  }
3077  unsigned BaseAlignment = (Size != MemoryLocation::UnknownSize ? Size : 1);
3078  AAMDNodes AAInfo;
3079  MDNode *Range = nullptr;
3080  while (consumeIfPresent(MIToken::comma)) {
3081  switch (Token.kind()) {
3082  case MIToken::kw_align:
3083  // align is printed if it is different than size.
3084  if (parseAlignment(BaseAlignment))
3085  return true;
3086  break;
3087  case MIToken::kw_basealign:
3088  // basealign is printed if it is different than align.
3089  if (parseAlignment(BaseAlignment))
3090  return true;
3091  break;
3092  case MIToken::kw_addrspace:
3093  if (parseAddrspace(Ptr.AddrSpace))
3094  return true;
3095  break;
3096  case MIToken::md_tbaa:
3097  lex();
3098  if (parseMDNode(AAInfo.TBAA))
3099  return true;
3100  break;
3102  lex();
3103  if (parseMDNode(AAInfo.Scope))
3104  return true;
3105  break;
3106  case MIToken::md_noalias:
3107  lex();
3108  if (parseMDNode(AAInfo.NoAlias))
3109  return true;
3110  break;
3111  case MIToken::md_range:
3112  lex();
3113  if (parseMDNode(Range))
3114  return true;
3115  break;
3116  // TODO: Report an error on duplicate metadata nodes.
3117  default:
3118  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
3119  "'!noalias' or '!range'");
3120  }
3121  }
3122  if (expectAndConsume(MIToken::rparen))
3123  return true;
3124  Dest = MF.getMachineMemOperand(Ptr, Flags, Size, Align(BaseAlignment), AAInfo,
3125  Range, SSID, Order, FailureOrder);
3126  return false;
3127 }
3128 
3129 bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
3130  assert((Token.is(MIToken::kw_pre_instr_symbol) ||
3131  Token.is(MIToken::kw_post_instr_symbol)) &&
3132  "Invalid token for a pre- post-instruction symbol!");
3133  lex();
3134  if (Token.isNot(MIToken::MCSymbol))
3135  return error("expected a symbol after 'pre-instr-symbol'");
3136  Symbol = getOrCreateMCSymbol(Token.stringValue());
3137  lex();
3138  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3139  Token.is(MIToken::lbrace))
3140  return false;
3141  if (Token.isNot(MIToken::comma))
3142  return error("expected ',' before the next machine operand");
3143  lex();
3144  return false;
3145 }
3146 
3147 bool MIParser::parseHeapAllocMarker(MDNode *&Node) {
3149  "Invalid token for a heap alloc marker!");
3150  lex();
3151  parseMDNode(Node);
3152  if (!Node)
3153  return error("expected a MDNode after 'heap-alloc-marker'");
3154  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3155  Token.is(MIToken::lbrace))
3156  return false;
3157  if (Token.isNot(MIToken::comma))
3158  return error("expected ',' before the next machine operand");
3159  lex();
3160  return false;
3161 }
3162 
3164  const Function &F,
3165  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3166  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
3167  MST.incorporateFunction(F);
3168  for (auto &BB : F) {
3169  if (BB.hasName())
3170  continue;
3171  int Slot = MST.getLocalSlot(&BB);
3172  if (Slot == -1)
3173  continue;
3174  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
3175  }
3176 }
3177 
3179  unsigned Slot,
3180  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3181  return Slots2BasicBlocks.lookup(Slot);
3182 }
3183 
3184 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
3185  if (Slots2BasicBlocks.empty())
3186  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
3187  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
3188 }
3189 
3190 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
3191  if (&F == &MF.getFunction())
3192  return getIRBlock(Slot);
3193  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
3194  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
3195  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
3196 }
3197 
3198 MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
3199  // FIXME: Currently we can't recognize temporary or local symbols and call all
3200  // of the appropriate forms to create them. However, this handles basic cases
3201  // well as most of the special aspects are recognized by a prefix on their
3202  // name, and the input names should already be unique. For test cases, keeping
3203  // the symbol name out of the symbol table isn't terribly important.
3204  return MF.getContext().getOrCreateSymbol(Name);
3205 }
3206 
3207 bool MIParser::parseStringConstant(std::string &Result) {
3208  if (Token.isNot(MIToken::StringConstant))
3209  return error("expected string constant");
3210  Result = std::string(Token.stringValue());
3211  lex();
3212  return false;
3213 }
3214 
3216  StringRef Src,
3217  SMDiagnostic &Error) {
3218  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
3219 }
3220 
3222  StringRef Src, SMDiagnostic &Error) {
3223  return MIParser(PFS, Error, Src).parseBasicBlocks();
3224 }
3225 
3228  SMDiagnostic &Error) {
3229  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
3230 }
3231 
3233  Register &Reg, StringRef Src,
3234  SMDiagnostic &Error) {
3235  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
3236 }
3237 
3239  Register &Reg, StringRef Src,
3240  SMDiagnostic &Error) {
3241  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
3242 }
3243 
3245  VRegInfo *&Info, StringRef Src,
3246  SMDiagnostic &Error) {
3247  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
3248 }
3249 
3251  int &FI, StringRef Src,
3252  SMDiagnostic &Error) {
3253  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
3254 }
3255 
3257  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
3258  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
3259 }
3260 
3262  PerFunctionMIParsingState &PFS, const Value *&V,
3263  ErrorCallbackType ErrorCallback) {
3264  MIToken Token;
3265  Src = lexMIToken(Src, Token, [&](StringRef::iterator Loc, const Twine &Msg) {
3266  ErrorCallback(Loc, Msg);
3267  });
3268  V = nullptr;
3269 
3270  return ::parseIRValue(Token, PFS, V, ErrorCallback);
3271 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:67
llvm::LaneBitmask
Definition: LaneBitmask.h:39
llvm::MachineOperand::CreateCPI
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:825
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Kind
Definition: ExecutionEngine.h:524
MemoryBuffer.h
llvm::CmpInst::FCMP_ULE
@ FCMP_ULE
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Definition: InstrTypes.h:737
llvm::MachineOperand::CreateJTI
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Definition: MachineOperand.h:841
llvm::MIToken::kw_float
@ kw_float
Definition: MILexer.h:97
llvm::AtomicOrdering::AcquireRelease
@ AcquireRelease
llvm::MIToken::NamedRegister
@ NamedRegister
Definition: MILexer.h:141
llvm::MIToken::kw_cfi_offset
@ kw_cfi_offset
Definition: MILexer.h:79
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:100
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function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
Definition: MIParser.cpp:587
MachineInstr.h
llvm::ModuleSlotTracker::getLocalSlot
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:906
llvm
Definition: AllocatorList.h:23
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unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MCRegisterInfo::getName
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
Definition: MCRegisterInfo.h:485
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::CmpInst::ICMP_EQ
@ ICMP_EQ
equal
Definition: InstrTypes.h:743
llvm::MachineRegisterInfo::createIncompleteVirtualRegister
Register createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
Definition: MachineRegisterInfo.cpp:146
Optional.h
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:112
llvm::MachineOperand::CreateReg
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition: MachineOperand.h:788
getIRBlockFromSlot
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3178
llvm::MIToken::kw_exact
@ kw_exact
Definition: MILexer.h:74
llvm::MIToken::kw_unknown_size
@ kw_unknown_size
Definition: MILexer.h:128
llvm::MIToken::colon
@ colon
Definition: MILexer.h:37
Metadata.h
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:722
llvm::MIToken::FixedStackObject
@ FixedStackObject
Definition: MILexer.h:146
llvm::MIToken::kw_nsz
@ kw_nsz
Definition: MILexer.h:67
llvm::Type::isPointerTy
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:229
llvm::MIToken::GlobalValue
@ GlobalValue
Definition: MILexer.h:148
llvm::MIToken::VirtualRegister
@ VirtualRegister
Definition: MILexer.h:157
AtomicOrdering.h
DebugInfoMetadata.h
MCInstrDesc.h
llvm::VRegInfo::D
union llvm::VRegInfo::@186 D
llvm::MIToken::kw_cfi_restore_state
@ kw_cfi_restore_state
Definition: MILexer.h:89
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
Parser.h
llvm::Function
Definition: Function.h:61
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::lookup
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
Definition: DenseMap.h:197
llvm::MIToken::md_noalias
@ md_noalias
Definition: MILexer.h:134
StringRef.h
llvm::MIToken::Error
@ Error
Definition: MILexer.h:30
llvm::MIToken::kw_call_entry
@ kw_call_entry
Definition: MILexer.h:113
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::StringSwitch::Default
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:181
llvm::VRegInfo::RegBank
const RegisterBank * RegBank
Definition: MIParser.h:42
llvm::PerTargetMIParsingState::getRegBank
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
Definition: MIParser.cpp:312
llvm::RegState::Dead
@ Dead
Unused definition.
Definition: MachineInstrBuilder.h:51
llvm::MIToken::kw_early_clobber
@ kw_early_clobber
Definition: MILexer.h:59
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:124
llvm::MIToken::integerValue
const APSInt & integerValue() const
Definition: MILexer.h:223
llvm::toString
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:991
llvm::TargetRegisterInfo::getRegMaskNames
virtual ArrayRef< const char * > getRegMaskNames() const =0
llvm::StringRef::npos
static constexpr size_t npos
Definition: StringRef.h:59
llvm::PerTargetMIParsingState
Definition: MIParser.h:51
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::MIToken::kw_cfi_def_cfa
@ kw_cfi_def_cfa
Definition: MILexer.h:85
llvm::CmpInst::FCMP_ONE
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:730
mapValueToSlot
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
Definition: MIParser.cpp:347
llvm::VRegInfo::Kind
enum llvm::VRegInfo::uint8_t Kind
llvm::RegisterBankInfo::getRegBank
RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
Definition: RegisterBankInfo.h:432
ErrorHandling.h
llvm::MCRegisterInfo::getDwarfRegNum
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
Definition: MCRegisterInfo.cpp:68
llvm::PerFunctionMIParsingState::PerFunctionMIParsingState
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
Definition: MIParser.cpp:319
llvm::MCRegisterInfo::getNumRegs
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Definition: MCRegisterInfo.h:491
llvm::MIToken::kw_double
@ kw_double
Definition: MILexer.h:98
llvm::MachineMemOperand::MOInvariant
@ MOInvariant
The memory access always returns the same value (or traps).
Definition: MachineMemOperand.h:144
RegisterBankInfo.h
llvm::CmpInst::ICMP_NE
@ ICMP_NE
not equal
Definition: InstrTypes.h:744
llvm::AtomicOrdering::SequentiallyConsistent
@ SequentiallyConsistent
llvm::MIToken::kw_post_instr_symbol
@ kw_post_instr_symbol
Definition: MILexer.h:125
MachineBasicBlock.h
llvm::lltok::APSInt
@ APSInt
Definition: LLToken.h:488
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::MIToken::kw_afn
@ kw_afn
Definition: MILexer.h:70
llvm::MemOp
Definition: TargetLowering.h:108
APInt.h
llvm::MIToken::NamedGlobalValue
@ NamedGlobalValue
Definition: MILexer.h:147
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::CmpInst::ICMP_SGT
@ ICMP_SGT
signed greater than
Definition: InstrTypes.h:749
llvm::AAMDNodes
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:651
llvm::MCCFIInstruction::createRelOffset
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
Definition: MCDwarf.h:523
llvm::StringMap::end
iterator end()
Definition: StringMap.h:205
llvm::HexagonInstrInfo::getSerializableBitmaskMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
Definition: HexagonInstrInfo.cpp:2004
DenseMap.h
llvm::MachineOperand::CreateMetadata
static MachineOperand CreateMetadata(const MDNode *Meta)
Definition: MachineOperand.h:895
Module.h
llvm::parseMachineInstructions
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:3221
llvm::MachineOperand::CreateCFIIndex
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
Definition: MachineOperand.h:910
llvm::MIToken::kw_renamable
@ kw_renamable
Definition: MILexer.h:61
TargetInstrInfo.h
llvm::MachineInstr::FmAfn
@ FmAfn
Definition: MachineInstr.h:98
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::MIToken::underscore
@ underscore
Definition: MILexer.h:36
llvm::MIToken::kw_nofpexcept
@ kw_nofpexcept
Definition: MILexer.h:75
getHexUint
static bool getHexUint(const MIToken &Token, APInt &Result)
Definition: MIParser.cpp:1773
llvm::VRegInfo::REGBANK
@ REGBANK
Definition: MIParser.h:37
llvm::MachineMemOperand::MODereferenceable
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
Definition: MachineMemOperand.h:142
llvm::RegState::InternalRead
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
Definition: MachineInstrBuilder.h:60
llvm::LLT::isValid
bool isValid() const
Definition: LowLevelTypeImpl.h:90
llvm::MIToken::kw_frame_destroy
@ kw_frame_destroy
Definition: MILexer.h:64
error
#define error(X)
Definition: SymbolRecordMapping.cpp:14
llvm::PerFunctionMIParsingState::VRegInfosNamed
StringMap< VRegInfo * > VRegInfosNamed
Definition: MIParser.h:169
llvm::HexagonInstrInfo::getSerializableDirectMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
Definition: HexagonInstrInfo.cpp:1985
llvm::Optional< unsigned >
T
#define T
Definition: Mips16ISelLowering.cpp:341
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
printImplicitRegisterFlag
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:1173
llvm::MIToken::kw_ninf
@ kw_ninf
Definition: MILexer.h:66
llvm::CmpInst::ICMP_SLE
@ ICMP_SLE
signed less or equal
Definition: InstrTypes.h:752
llvm::MIToken::kw_addrspace
@ kw_addrspace
Definition: MILexer.h:108
llvm::PerFunctionMIParsingState::getVRegInfoNamed
VRegInfo & getVRegInfoNamed(StringRef RegName)
Definition: MIParser.cpp:335
llvm::Intrinsic::not_intrinsic
@ not_intrinsic
Definition: Intrinsics.h:45
llvm::MIToken::kw_cfi_register
@ kw_cfi_register
Definition: MILexer.h:86
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:892
llvm::RegState::Renamable
@ Renamable
Register that may be renamed.
Definition: MachineInstrBuilder.h:62
llvm::StringMap::find
iterator find(StringRef Key)
Definition: StringMap.h:218
llvm::isPowerOf2_32
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:491
llvm::MBBSectionID
Definition: MachineBasicBlock.h:52
llvm::AAMDNodes::Scope
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:674
llvm::PerTargetMIParsingState::getMMOTargetFlag
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.
Definition: MIParser.cpp:265
llvm::VRegInfo::RC
const TargetRegisterClass * RC
Definition: MIParser.h:41
llvm::CmpInst::FCMP_OGT
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:726
llvm::MCCFIInstruction::createSameValue
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:560
llvm::BitmaskEnumDetail::Mask
std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:29
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::BasicBlockSection::List
@ List
llvm::MIToken::range
StringRef range() const
Definition: MILexer.h:218
llvm::MCRegisterInfo::getNumSubRegIndices
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
Definition: MCRegisterInfo.h:498
llvm::MIToken::kw_internal
@ kw_internal
Definition: MILexer.h:58
llvm::MemoryBuffer
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:50
llvm::MIToken
A token produced by the machine instruction lexer.
Definition: MILexer.h:26
llvm::MDNode::get
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1198
F
#define F(x, y, z)
Definition: MD5.cpp:56
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:502
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:84
llvm::MachineOperand::CreateES
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
Definition: MachineOperand.h:855
llvm::AtomicOrdering::Monotonic
@ Monotonic
llvm::parseMachineBasicBlockDefinitions
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:3215
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
llvm::PerTargetMIParsingState::parseInstrName
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
Definition: MIParser.cpp:143
llvm::PerFunctionMIParsingState::Allocator
BumpPtrAllocator Allocator
Definition: MIParser.h:161
llvm::MIToken::kw_cfi_def_cfa_register
@ kw_cfi_def_cfa_register
Definition: MILexer.h:81
llvm::TargetIntrinsicInfo
TargetIntrinsicInfo - Interface to description of machine instruction set.
Definition: TargetIntrinsicInfo.h:29
llvm::MIToken::kw_killed
@ kw_killed
Definition: MILexer.h:56
parseIRConstant
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1620
llvm::Optional::hasValue
constexpr bool hasValue() const
Definition: Optional.h:286
llvm::MIToken::NamedIRValue
@ NamedIRValue
Definition: MILexer.h:162
llvm::MIToken::stringValue
StringRef stringValue() const
Return the token's string value.
Definition: MILexer.h:221
llvm::CmpInst::FCMP_ULT
@ FCMP_ULT
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:736
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::MIToken::kw_arcp
@ kw_arcp
Definition: MILexer.h:68
llvm::ConstantInfo
Definition: ConstantsContext.h:397
llvm::MIToken::kw_debug_use
@ kw_debug_use
Definition: MILexer.h:60
llvm::MIToken::MachineBasicBlockLabel
@ MachineBasicBlockLabel
Definition: MILexer.h:143
llvm::MachineBasicBlock::setSectionID
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
Definition: MachineBasicBlock.h:492
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:205
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:743
verifyScalarSize
static bool verifyScalarSize(uint64_t Size)
Definition: MIParser.cpp:1649
llvm::all_of
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1505
verifyVectorElementCount
static bool verifyVectorElementCount(uint64_t NumElts)
Definition: MIParser.cpp:1653
verifyAddrSpace
static bool verifyAddrSpace(uint64_t AddrSpace)
Definition: MIParser.cpp:1657
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:565
llvm::MachineOperand::isImplicit
bool isImplicit() const
Definition: MachineOperand.h:377
llvm::MIToken::kw_cfi_remember_state
@ kw_cfi_remember_state
Definition: MILexer.h:87
llvm::parseStackObjectReference
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3250
llvm::parseMDNode
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3256
llvm::MIToken::kw_invariant
@ kw_invariant
Definition: MILexer.h:105
TargetMachine.h
llvm::RegisterBank
This class implements the register bank concept.
Definition: RegisterBank.h:28
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::CmpInst::isFPPredicate
bool isFPPredicate() const
Definition: InstrTypes.h:816
llvm::MIRFormatter::parseIRValue
static bool parseIRValue(StringRef Src, MachineFunction &MF, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrorCallback)
Helper functions to parse IR value from MIR serialization format which will be useful for target spec...
Definition: MIParser.cpp:3261
llvm::MachineRegisterInfo::setRegClassOrRegBank
void setRegClassOrRegBank(Register Reg, const RegClassOrRegBank &RCOrRB)
Definition: MachineRegisterInfo.h:678
llvm::MCInstrDesc::ImplicitUses
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:205
Constants.h
llvm::MachineRegisterInfo::setType
void setType(Register VReg, LLT Ty)
Set the low-level type of VReg to Ty.
Definition: MachineRegisterInfo.cpp:182
llvm::MIToken::kw_shufflemask
@ kw_shufflemask
Definition: MILexer.h:123
llvm::MemoryBuffer::getBufferEnd
const char * getBufferEnd() const
Definition: MemoryBuffer.h:66
llvm::MachineOperand::CreateImm
static MachineOperand CreateImm(int64_t Val)
Definition: MachineOperand.h:770
llvm::PerFunctionMIParsingState::IRSlots
const SlotMapping & IRSlots
Definition: MIParser.h:164
llvm::PerTargetMIParsingState::getTargetIndex
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
Definition: MIParser.cpp:201
llvm::MIRFormatter::parseImmMnemonic
virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, StringRef Src, int64_t &Imm, ErrorCallbackType ErrorCallback) const
Implement target specific parsing of immediate mnemonics.
Definition: MIRFormatter.h:48
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::isUse
bool isUse() const
Definition: MachineOperand.h:367
Intrinsics.h
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::CmpInst::ICMP_ULE
@ ICMP_ULE
unsigned less or equal
Definition: InstrTypes.h:748
llvm::ARM_PROC::A
@ A
Definition: ARMBaseInfo.h:34
Twine.h
InstrTypes.h
llvm::MIToken::equal
@ equal
Definition: MILexer.h:35
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::StringMap::insert
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
Definition: StringMap.h:276
MCContext.h
llvm::MachineBasicBlock::isSuccessor
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Definition: MachineBasicBlock.cpp:931
llvm::MIToken::kw_cfi_restore
@ kw_cfi_restore
Definition: MILexer.h:88
llvm::MIToken::kw_implicit
@ kw_implicit
Definition: MILexer.h:51
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::guessSuccessors
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:576
llvm::MIToken::FloatingPointLiteral
@ FloatingPointLiteral
Definition: MILexer.h:154
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::CmpInst::FCMP_UGE
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:735
llvm::MIToken::md_tbaa
@ md_tbaa
Definition: MILexer.h:132
llvm::SMDiagnostic
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:251
llvm::ms_demangle::QualifierMangleMode::Result
@ Result
llvm::MIToken::kw_x86_fp80
@ kw_x86_fp80
Definition: MILexer.h:99
llvm::StringRef::iterator
const char * iterator
Definition: StringRef.h:61
llvm::MCInstrDesc::getImplicitDefs
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
Definition: MCInstrDesc.h:582
UINT64_MAX
#define UINT64_MAX
Definition: DataTypes.h:77
llvm::APInt::getLimitedValue
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
Definition: APInt.h:488
llvm::MachineInstr::FmNoInfs
@ FmNoInfs
Definition: MachineInstr.h:90
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MIToken::kw_cfi_undefined
@ kw_cfi_undefined
Definition: MILexer.h:90
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:196
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:82
llvm::CmpInst::FCMP_UNO
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:732
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
SMLoc.h
llvm::MCCFIInstruction::createRestoreState
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:570
llvm::MIToken::kw_tied_def
@ kw_tied_def
Definition: MILexer.h:62
llvm::StringMap::clear
void clear()
Definition: StringMap.h:333
llvm::AtomicOrdering::Acquire
@ Acquire
llvm::MIToken::IRBlock
@ IRBlock
Definition: MILexer.h:161
llvm::APSInt
An arbitrary precision integer that knows its signedness.
Definition: APSInt.h:22
llvm::LaneBitmask::Type
uint64_t Type
Definition: LaneBitmask.h:41
llvm::SourceMgr::getMainFileID
unsigned getMainFileID() const
Definition: SourceMgr.h:129
llvm::MachineOperand::CreateFI
static MachineOperand CreateFI(int Idx)
Definition: MachineOperand.h:820
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:45
llvm::MIToken::HexLiteral
@ HexLiteral
Definition: MILexer.h:155
llvm::MIToken::kw_cfi_escape
@ kw_cfi_escape
Definition: MILexer.h:84
llvm::CmpInst::FCMP_OEQ
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:725
DebugLoc.h
llvm::LLT::vector
static LLT vector(uint16_t NumElements, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
Definition: LowLevelTypeImpl.h:58
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:26
llvm::CmpInst::FCMP_OLT
@ FCMP_OLT
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:728
llvm::MachineOperand::setTargetFlags
void setTargetFlags(unsigned F)
Definition: MachineOperand.h:221
llvm::PseudoSourceValue
Special value supplied for machine level alias analysis.
Definition: PseudoSourceValue.h:35
llvm::RegState::Implicit
@ Implicit
Not emitted register (e.g. carry, or temporary result).
Definition: MachineInstrBuilder.h:47
StringMap.h
llvm::MIToken::kw_heap_alloc_marker
@ kw_heap_alloc_marker
Definition: MILexer.h:126
llvm::MachineInstr::NoSWrap
@ NoSWrap
Definition: MachineInstr.h:104
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::MCCFIInstruction::createEscape
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:576
llvm::PerTargetMIParsingState::getRegClass
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
Definition: MIParser.cpp:305
llvm::StringRef::str
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:248
getUnsigned
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1790
llvm::MachineInstr::FmNsz
@ FmNsz
Definition: MachineInstr.h:92
llvm::None
const NoneType None
Definition: None.h:23
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:49
llvm::MIToken::StringConstant
@ StringConstant
Definition: MILexer.h:166
llvm::MachineInstr::NoFPExcept
@ NoFPExcept
Definition: MachineInstr.h:108
llvm::LLVMContext::getOrInsertSyncScopeID
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.
Definition: LLVMContext.cpp:290
SourceMgr.h
Type.h
BranchProbability.h
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:495
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
LowLevelTypeImpl.h
llvm::MIToken::kw_liveout
@ kw_liveout
Definition: MILexer.h:115
llvm::MIToken::kw_reassoc
@ kw_reassoc
Definition: MILexer.h:71
llvm::SourceMgr::getMemoryBuffer
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:122
llvm::MIToken::ConstantPoolItem
@ ConstantPoolItem
Definition: MILexer.h:158
llvm::Twine::str
std::string str() const
Return the twine contents as a std::string.
Definition: Twine.cpp:17
llvm::MemoryBuffer::getBufferIdentifier
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:75
ValueSymbolTable.h
llvm::CmpInst::FCMP_FALSE
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:724
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:78
llvm::MachineBasicBlock::setAlignment
void setAlignment(Align A)
Set alignment of the basic block.
Definition: MachineBasicBlock.h:431
llvm::MIToken::hasIntegerValue
bool hasIntegerValue() const
Definition: MILexer.h:225
llvm::function_ref
An efficient, type-erasing, non-owning reference to a callable.
Definition: STLExtras.h:176
llvm::LLT::pointer
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
Definition: LowLevelTypeImpl.h:50
llvm::MIToken::StackObject
@ StackObject
Definition: MILexer.h:145
llvm::AtomicOrdering
AtomicOrdering
Atomic ordering for LLVM's memory model.
Definition: AtomicOrdering.h:56
llvm::PerFunctionMIParsingState::VRegInfos
DenseMap< Register, VRegInfo * > VRegInfos
Definition: MIParser.h:168
llvm::RegState::EarlyClobber
@ EarlyClobber
Register definition happens before uses.
Definition: MachineInstrBuilder.h:55
BasicBlock.h
llvm::MIToken::kw_dead
@ kw_dead
Definition: MILexer.h:54
llvm::MIToken::kw_cfi_adjust_cfa_offset
@ kw_cfi_adjust_cfa_offset
Definition: MILexer.h:83
llvm::MachineOperand::CreateShuffleMask
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
Definition: MachineOperand.h:928
llvm::PerFunctionMIParsingState::getIRValue
const Value * getIRValue(unsigned Slot)
Definition: MIParser.cpp:369
llvm::RegisterBankInfo::getNumRegBanks
unsigned getNumRegBanks() const
Get the total number of register banks.
Definition: RegisterBankInfo.h:589
llvm::SlotMapping
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
Definition: SlotMapping.h:32
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MIToken::kw_cfi_window_save
@ kw_cfi_window_save
Definition: MILexer.h:91
llvm::TargetRegisterInfo::getRegClass
const TargetRegisterClass * getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
Definition: TargetRegisterInfo.h:723
isImplicitOperandIn
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:1185
llvm::isUInt< 16 >
constexpr bool isUInt< 16 >(uint64_t x)
Definition: MathExtras.h:408
llvm::MIToken::kw_pre_instr_symbol
@ kw_pre_instr_symbol
Definition: MILexer.h:124
Index
uint32_t Index
Definition: ELFObjHandler.cpp:84
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:318
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MachineOperand::CreateMBB
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
Definition: MachineOperand.h:813
llvm::PerFunctionMIParsingState::getVRegInfo
VRegInfo & getVRegInfo(Register Num)
Definition: MIParser.cpp:324
parseIRValue
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:2764
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:572
llvm::MCInstrDesc::isCall
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:280
llvm::tgtok::Int
@ Int
Definition: TGLexer.h:51
llvm::TargetRegisterInfo::getRegClassName
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
Definition: TargetRegisterInfo.h:729
llvm::MIToken::SubRegisterIndex
@ SubRegisterIndex
Definition: MILexer.h:165
llvm::MachineBasicBlock::setIsEHPad
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Definition: MachineBasicBlock.h:439
llvm::MIToken::kw_nnan
@ kw_nnan
Definition: MILexer.h:65
llvm::VRegInfo::NORMAL
@ NORMAL
Definition: MIParser.h:37
llvm::MachineInstr::FmReassoc
@ FmReassoc
Definition: MachineInstr.h:100
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:37
llvm::MIToken::kw_target_index
@ kw_target_index
Definition: MILexer.h:95
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
llvm::MCCFIInstruction::createNegateRAState
static MCCFIInstruction createNegateRAState(MCSymbol *L)
.cfi_negate_ra_state AArch64 negate RA state.
Definition: MCDwarf.h:541
llvm::MIToken::kw_fp128
@ kw_fp128
Definition: MILexer.h:100
MemoryLocation.h
llvm::DenseMap
Definition: DenseMap.h:714
llvm::SyncScope::ID
uint8_t ID
Definition: LLVMContext.h:47
llvm::StringRef::front
LLVM_NODISCARD char front() const
front - Get the first character in the string.
Definition: StringRef.h:164
llvm::AtomicOrdering::Unordered
@ Unordered
MIRPrinter.h
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:19
llvm::MIToken::MachineBasicBlock
@ MachineBasicBlock
Definition: MILexer.h:144
llvm::MIToken::Newline
@ Newline
Definition: MILexer.h:31
MCRegisterInfo.h
llvm::StringRef::lower
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:108
ArrayRef.h
llvm::MIToken::lbrace
@ lbrace
Definition: MILexer.h:43
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::MIToken::kw_half
@ kw_half
Definition: MILexer.h:96
llvm::MachineMemOperand::Flags
Flags
Flags values. These may be or'd together.
Definition: MachineMemOperand.h:130
llvm::MBBSectionID::ExceptionSectionID
const static MBBSectionID ExceptionSectionID
Definition: MachineBasicBlock.h:65
llvm::MIToken::IRValue
@ IRValue
Definition: MILexer.h:163
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MIToken::comma
@ comma
Definition: MILexer.h:34
llvm::MachineBasicBlock::setHasAddressTaken
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
Definition: MachineBasicBlock.h:215
llvm::CmpInst::FCMP_OGE
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:727
llvm::Function::lookupIntrinsicID
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:705
llvm::CmpInst::ICMP_UGE
@ ICMP_UGE
unsigned greater or equal
Definition: InstrTypes.h:746
MIRFormatter.h
llvm::MachineMemOperand::MONonTemporal
@ MONonTemporal
The memory access is non-temporal.
Definition: MachineMemOperand.h:140
llvm::MachineOperand::CreateBA
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:863
llvm::CmpInst::BAD_ICMP_PREDICATE
@ BAD_ICMP_PREDICATE
Definition: InstrTypes.h:755
llvm::MIToken::dot
@ dot
Definition: MILexer.h:39
APSInt.h
llvm::MCCFIInstruction::cfiDefCfa
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
Definition: MCDwarf.h:488
llvm::MIToken::JumpTableIndex
@ JumpTableIndex
Definition: MILexer.h:159
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:67
llvm::MDNode
Metadata node.
Definition: Metadata.h:897
llvm::MachineOperand::CreateMCSymbol
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
Definition: MachineOperand.h:901
llvm::MIToken::kw_constant_pool
@ kw_constant_pool
Definition: MILexer.h:112
initSlots2Values
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
Definition: MIParser.cpp:356
llvm::MachineOperand::setIsDebug
void setIsDebug(bool Val=true)
Definition: MachineOperand.h:525
llvm::irsymtab::storage::Word
support::ulittle32_t Word
Definition: IRSymtab.h:51
llvm::PerTargetMIParsingState::getRegisterByName
bool getRegisterByName(StringRef RegName, Register &Reg)
Try to convert a register name to a register number.
Definition: MIParser.cpp:124
llvm::MIToken::Eof
@ Eof
Definition: MILexer.h:29
llvm::TargetSubtargetInfo::getRegBankInfo
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
Definition: TargetSubtargetInfo.h:128
llvm::MachineBasicBlock::setIsEHFuncletEntry
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
Definition: MachineBasicBlock.h:464
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:71
llvm::MachineFunction
Definition: MachineFunction.h:227
llvm::CmpInst::ICMP_SLT
@ ICMP_SLT
signed less than
Definition: InstrTypes.h:751
llvm::CmpInst::isIntPredicate
bool isIntPredicate() const
Definition: InstrTypes.h:817
llvm::MIToken::kw_successors
@ kw_successors
Definition: MILexer.h:120
llvm::MachineInstr::IsExact
@ IsExact
Definition: MachineInstr.h:106
llvm::MIToken::md_dilocation
@ md_dilocation
Definition: MILexer.h:137
llvm::MIToken::kw_basealign
@ kw_basealign
Definition: MILexer.h:107
llvm::dwarf::getAttributeEncoding
unsigned getAttributeEncoding(StringRef EncodingString)
Definition: Dwarf.cpp:208
llvm::MIToken::kw_frame_setup
@ kw_frame_setup
Definition: MILexer.h:63
llvm::MIToken::kw_debug_location
@ kw_debug_location
Definition: MILexer.h:76
llvm::Sched::Source
@ Source
Definition: TargetLowering.h:98
llvm::MachineOperand::CreateIntrinsicID
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
Definition: MachineOperand.h:916
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:33
llvm::MIToken::kw_nsw
@ kw_nsw
Definition: MILexer.h:73
None.h
llvm::MachineOperand::CreateGA
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:847
DataLayout.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
llvm::MIToken::md_range
@ md_range
Definition: MILexer.h:135
llvm::RegState::Debug
@ Debug
Register 'use' is for debugging purpose.
Definition: MachineInstrBuilder.h:57
llvm::CmpInst::ICMP_ULT
@ ICMP_ULT
unsigned less than
Definition: InstrTypes.h:747
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:256
llvm::MIToken::kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_aarch64_negate_ra_sign_state
Definition: MILexer.h:92
llvm::SourceMgr
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
Definition: SourceMgr.h:31
Number
uint32_t Number
Definition: Profile.cpp:47
uint32_t
llvm::MIToken::kw_intrinsic
@ kw_intrinsic
Definition: MILexer.h:94
parse
static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Definition: LineTable.cpp:54
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MachinePointerInfo::AddrSpace
unsigned AddrSpace
Definition: MachineMemOperand.h:46
llvm::MachineOperand::isDef
bool isDef() const
Definition: MachineOperand.h:372
llvm::MIToken::kw_bbsections
@ kw_bbsections
Definition: MILexer.h:127
llvm::MIToken::kw_implicit_define
@ kw_implicit_define
Definition: MILexer.h:52
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::MCCFIInstruction::createAdjustCfaOffset
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:509
llvm::MIToken::kw_ppc_fp128
@ kw_ppc_fp128
Definition: MILexer.h:101
llvm::MachineOperand::CreateCImm
static MachineOperand CreateCImm(const ConstantInt *CI)
Definition: MachineOperand.h:776
llvm::PerTargetMIParsingState::setTarget
void setTarget(const TargetSubtargetInfo &NewSubtarget)
Definition: MIParser.cpp:86
LLVM_FALLTHROUGH
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:281
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::insert
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:207
llvm::MachineMemOperand::MOVolatile
@ MOVolatile
The memory access is volatile.
Definition: MachineMemOperand.h:138
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:59
MILexer.h
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:134
llvm::MIToken::kw_dereferenceable
@ kw_dereferenceable
Definition: MILexer.h:55
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MIToken::kw_jump_table
@ kw_jump_table
Definition: MILexer.h:111
llvm::AtomicOrdering::Release
@ Release
llvm::MIToken::kw_non_temporal
@ kw_non_temporal
Definition: MILexer.h:104
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MIToken::minus
@ minus
Definition: MILexer.h:46
llvm::MIToken::ExternalSymbol
@ ExternalSymbol
Definition: MILexer.h:149
llvm::PerFunctionMIParsingState
Definition: MIParser.h:160
llvm::MIToken::kw_target_flags
@ kw_target_flags
Definition: MILexer.h:102
llvm::CmpInst::FCMP_UGT
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:734
llvm::parseNamedRegisterReference
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3238
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
llvm::Function::getValueSymbolTable
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:760
llvm::PerFunctionMIParsingState::Slots2Values
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
Definition: MIParser.h:176
llvm::MIToken::NamedIRBlock
@ NamedIRBlock
Definition: MILexer.h:160
llvm::MemoryBuffer::getBufferStart
const char * getBufferStart() const
Definition: MemoryBuffer.h:65
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
llvm::MIToken::kw_floatpred
@ kw_floatpred
Definition: MILexer.h:121
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:521
llvm::StringRef::drop_front
LLVM_NODISCARD StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
Definition: StringRef.h:654
llvm::MIToken::coloncolon
@ coloncolon
Definition: MILexer.h:38
llvm::MIToken::rparen
@ rparen
Definition: MILexer.h:42
llvm::dwarf::getOperationEncoding
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:161
llvm::AAMDNodes::NoAlias
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:677
llvm::SlotMapping::GlobalValues
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:33
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:314
llvm::MBBSectionID::ColdSectionID
const static MBBSectionID ColdSectionID
Definition: MachineBasicBlock.h:64
llvm::MachineBasicBlock::insert
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Definition: MachineBasicBlock.cpp:1335
MachineFrameInfo.h
llvm::MIToken::kw_debug_instr_number
@ kw_debug_instr_number
Definition: MILexer.h:77
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
llvm::MIToken::kw_intpred
@ kw_intpred
Definition: MILexer.h:122
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:53
llvm::MIToken::MCSymbol
@ MCSymbol
Definition: MILexer.h:150
llvm::PerTargetMIParsingState::getSubRegIndex
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
Definition: MIParser.cpp:183
llvm::MIToken::greater
@ greater
Definition: MILexer.h:48
llvm::MIToken::exclaim
@ exclaim
Definition: MILexer.h:40
Casting.h
Function.h
llvm::MIToken::IntegerLiteral
@ IntegerLiteral
Definition: MILexer.h:153
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::MIToken::kw_align
@ kw_align
Definition: MILexer.h:106
llvm::SourceMgr::DK_Error
@ DK_Error
Definition: SourceMgr.h:34
llvm::MachineInstr::FmNoNans
@ FmNoNans
Definition: MachineInstr.h:88
llvm::MemoryLocation::UnknownSize
@ UnknownSize
Definition: MemoryLocation.h:214
StringSwitch.h
llvm::MachineInstr::FmContract
@ FmContract
Definition: MachineInstr.h:96
SlotMapping.h
llvm::PerFunctionMIParsingState::MF
MachineFunction & MF
Definition: MIParser.h:162
llvm::MIToken::TokenKind
TokenKind
Definition: MILexer.h:27
llvm::CmpInst::ICMP_SGE
@ ICMP_SGE
signed greater or equal
Definition: InstrTypes.h:750
llvm::TargetRegisterInfo::getNumRegClasses
unsigned getNumRegClasses() const
Definition: TargetRegisterInfo.h:717
llvm::SourceMgr::GetMessage
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:262
llvm::MachineBasicBlock::normalizeSuccProbs
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
Definition: MachineBasicBlock.h:563
llvm::MIToken::kind
TokenKind kind() const
Definition: MILexer.h:185
llvm::MachineMemOperand::MOStore
@ MOStore
The memory access writes data.
Definition: MachineMemOperand.h:136
parseGlobalValue
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1898
llvm::AAMDNodes::TBAA
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:668
llvm::parseVirtualRegisterReference
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3244
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:79
llvm::VRegInfo
Definition: MIParser.h:35
llvm::MIToken::QuotedIRValue
@ QuotedIRValue
Definition: MILexer.h:164
llvm::parseConstantValue
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:182
llvm::BranchProbability::getRaw
static BranchProbability getRaw(uint32_t N)
Definition: BranchProbability.h:54
llvm::PerTargetMIParsingState::getRegMask
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
Definition: MIParser.cpp:166
llvm::MIRFormatter
MIRFormater - Interface to format MIR operand based on target.
Definition: MIRFormatter.h:30
Instructions.h
llvm::MIToken::kw_custom
@ kw_custom
Definition: MILexer.h:114
llvm::MIToken::kw_stack
@ kw_stack
Definition: MILexer.h:109
llvm::MCCFIInstruction::createRegister
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:530
llvm::MIToken::kw_got
@ kw_got
Definition: MILexer.h:110
llvm::StringMapImpl::empty
bool empty() const
Definition: StringMap.h:92
SmallVector.h
llvm::MachineOperand::CreateRegMask
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
Definition: MachineOperand.h:883
llvm::MachineRegisterInfo::getType
LLT getType(Register Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.
Definition: MachineRegisterInfo.h:732
MachineInstrBuilder.h
llvm::MachineInstr::NoUWrap
@ NoUWrap
Definition: MachineInstr.h:102
llvm::MCCFIInstruction::createUndefined
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can't be restored anymore.
Definition: MCDwarf.h:554
llvm::VRegInfo::UNKNOWN
@ UNKNOWN
Definition: MIParser.h:37
RegisterBank.h
TargetIntrinsicInfo.h
llvm::CmpInst::ICMP_UGT
@ ICMP_UGT
unsigned greater than
Definition: InstrTypes.h:745
llvm::CmpInst::FCMP_UNE
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:738
llvm::MIToken::is
bool is(TokenKind K) const
Definition: MILexer.h:212
llvm::SyncScope::System
@ System
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:58
llvm::MIToken::location
StringRef::iterator location() const
Definition: MILexer.h:216
llvm::PerFunctionMIParsingState::MBBSlots
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:167
llvm::MachineInstr::BundledSucc
@ BundledSucc
Definition: MachineInstr.h:87
llvm::BlockAddress::get
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1808
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:163
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:350
LaneBitmask.h
initSlots2BasicBlocks
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3163
llvm::MIToken::Identifier
@ Identifier
Definition: MILexer.h:140
llvm::MachineInstr::FmArcp
@ FmArcp
Definition: MachineInstr.h:94
ModuleSlotTracker.h
MachineMemOperand.h
llvm::CmpInst::FCMP_OLE
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:729
llvm::SMLoc::getFromPointer
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:36
MachineOperand.h
llvm::MIToken::rbrace
@ rbrace
Definition: MILexer.h:44
RegName
#define RegName(no)
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:515
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:42
llvm::parseRegisterReference
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3232
llvm::ValueSymbolTable::lookup
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
Definition: ValueSymbolTable.h:74
llvm::MCCFIInstruction::createRememberState
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:565
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::MIToken::kw_cfi_def_cfa_offset
@ kw_cfi_def_cfa_offset
Definition: MILexer.h:82
llvm::MIToken::less
@ less
Definition: MILexer.h:47
llvm::MIToken::kw_volatile
@ kw_volatile
Definition: MILexer.h:103
llvm::MIToken::kw_def
@ kw_def
Definition: MILexer.h:53
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MIToken::kw_landing_pad
@ kw_landing_pad
Definition: MILexer.h:117
llvm::TargetRegisterInfo::getSubRegIndexName
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
Definition: TargetRegisterInfo.h:351
llvm::PerTargetMIParsingState::getBitmaskTargetFlag
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
Definition: MIParser.cpp:244
llvm::PerTargetMIParsingState::getDirectTargetFlag
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
Definition: MIParser.cpp:222
raw_ostream.h
llvm::VRegInfo::Explicit
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:39
llvm::MIToken::kw_nuw
@ kw_nuw
Definition: MILexer.h:72
llvm::MIToken::plus
@ plus
Definition: MILexer.h:45
llvm::StringRef::size
LLVM_NODISCARD size_t size() const
size - Get the string size.
Definition: StringRef.h:160
MachineFunction.h
llvm::MIToken::md_alias_scope
@ md_alias_scope
Definition: MILexer.h:133
llvm::MIToken::kw_cfi_same_value
@ kw_cfi_same_value
Definition: MILexer.h:78
llvm::MIToken::NamedVirtualRegister
@ NamedVirtualRegister
Definition: MILexer.h:142
llvm::MachineInstr::BundledPred
@ BundledPred
Definition: MachineInstr.h:86
llvm::parseMBBReference
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3226
llvm::MIToken::kw_ehfunclet_entry
@ kw_ehfunclet_entry
Definition: MILexer.h:118
llvm::CmpInst::FCMP_TRUE
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:739
llvm::VRegInfo::GENERIC
@ GENERIC
Definition: MIParser.h:37
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:64
llvm::LLT::scalar
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Definition: LowLevelTypeImpl.h:43
Value.h
llvm::MachineMemOperand::MONone
@ MONone
Definition: MachineMemOperand.h:132
llvm::MIToken::kw_liveins
@ kw_liveins
Definition: MILexer.h:119
llvm::MIToken::kw_contract
@ kw_contract
Definition: MILexer.h:69
llvm::MachineOperand::CreatePredicate
static MachineOperand CreatePredicate(unsigned Pred)
Definition: MachineOperand.h:922
llvm::lexMIToken
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
llvm::MIToken::kw_cfi_rel_offset
@ kw_cfi_rel_offset
Definition: MILexer.h:80
llvm::MIToken::md_diexpr
@ md_diexpr
Definition: MILexer.h:136
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
llvm::MIToken::lparen
@ lparen
Definition: MILexer.h:41
llvm::MIToken::kw_address_taken
@ kw_address_taken
Definition: MILexer.h:116
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:311
llvm::MIToken::kw_undef
@ kw_undef
Definition: MILexer.h:57
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
llvm::LaneBitmask::getAll
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:83
SubReg
unsigned SubReg
Definition: AArch64AdvSIMDScalarPass.cpp:104
llvm::CmpInst::BAD_FCMP_PREDICATE
@ BAD_FCMP_PREDICATE
Definition: InstrTypes.h:742
llvm::MachineOperand::CreateFPImm
static MachineOperand CreateFPImm(const ConstantFP *CFP)
Definition: MachineOperand.h:782
llvm::MCCFIInstruction::createWindowSave
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:536
llvm::MIToken::kw_blockaddress
@ kw_blockaddress
Definition: MILexer.h:93
llvm::MCInstrDesc::getImplicitUses
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction.
Definition: MCInstrDesc.h:560
llvm::MachineOperand::CreateTargetIndex
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:833
llvm::AtomicOrdering::NotAtomic
@ NotAtomic
llvm::Optional::getValue
constexpr const T & getValue() const LLVM_LVALUE_FUNCTION
Definition: Optional.h:280
llvm::CmpInst::FCMP_ORD
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:731
llvm::TargetRegisterInfo::getRegMasks
virtual ArrayRef< const uint32_t * > getRegMasks() const =0
Return all the call-preserved register masks defined for this target.
llvm::MachineInstr::setFlag
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:335
llvm::CmpInst::FCMP_UEQ
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:733
llvm::MachineOperand::isIdenticalTo
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
Definition: MachineOperand.cpp:282
MIParser.h
llvm::MachineOperand::CreateRegLiveOut
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
Definition: MachineOperand.h:889
llvm::MCInstrDesc::ImplicitDefs
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:206
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38
llvm::MCCFIInstruction::createRestore
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:548
getRegisterName
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
Definition: MIParser.cpp:1178
llvm::MIToken::kw_unknown_address
@ kw_unknown_address
Definition: MILexer.h:129
llvm::LLT
Definition: LowLevelTypeImpl.h:40