LLVM  16.0.0git
MIParser.cpp
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1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the parsing of machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "MILexer.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/APSInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/None.h"
20 #include "llvm/ADT/Optional.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringMap.h"
23 #include "llvm/ADT/StringRef.h"
24 #include "llvm/ADT/StringSwitch.h"
25 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
44 #include "llvm/IR/BasicBlock.h"
45 #include "llvm/IR/Constants.h"
46 #include "llvm/IR/DataLayout.h"
48 #include "llvm/IR/DebugLoc.h"
49 #include "llvm/IR/Function.h"
50 #include "llvm/IR/InstrTypes.h"
51 #include "llvm/IR/Instructions.h"
52 #include "llvm/IR/Intrinsics.h"
53 #include "llvm/IR/Metadata.h"
54 #include "llvm/IR/Module.h"
56 #include "llvm/IR/Type.h"
57 #include "llvm/IR/Value.h"
59 #include "llvm/MC/LaneBitmask.h"
60 #include "llvm/MC/MCContext.h"
61 #include "llvm/MC/MCDwarf.h"
62 #include "llvm/MC/MCInstrDesc.h"
65 #include "llvm/Support/Casting.h"
69 #include "llvm/Support/SMLoc.h"
70 #include "llvm/Support/SourceMgr.h"
73 #include <cassert>
74 #include <cctype>
75 #include <cstddef>
76 #include <cstdint>
77 #include <limits>
78 #include <string>
79 #include <utility>
80 
81 using namespace llvm;
82 
84  const TargetSubtargetInfo &NewSubtarget) {
85 
86  // If the subtarget changed, over conservatively assume everything is invalid.
87  if (&Subtarget == &NewSubtarget)
88  return;
89 
90  Names2InstrOpCodes.clear();
91  Names2Regs.clear();
92  Names2RegMasks.clear();
93  Names2SubRegIndices.clear();
94  Names2TargetIndices.clear();
95  Names2DirectTargetFlags.clear();
96  Names2BitmaskTargetFlags.clear();
97  Names2MMOTargetFlags.clear();
98 
99  initNames2RegClasses();
100  initNames2RegBanks();
101 }
102 
103 void PerTargetMIParsingState::initNames2Regs() {
104  if (!Names2Regs.empty())
105  return;
106 
107  // The '%noreg' register is the register 0.
108  Names2Regs.insert(std::make_pair("noreg", 0));
109  const auto *TRI = Subtarget.getRegisterInfo();
110  assert(TRI && "Expected target register info");
111 
112  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
113  bool WasInserted =
114  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
115  .second;
116  (void)WasInserted;
117  assert(WasInserted && "Expected registers to be unique case-insensitively");
118  }
119 }
120 
122  Register &Reg) {
123  initNames2Regs();
124  auto RegInfo = Names2Regs.find(RegName);
125  if (RegInfo == Names2Regs.end())
126  return true;
127  Reg = RegInfo->getValue();
128  return false;
129 }
130 
131 void PerTargetMIParsingState::initNames2InstrOpCodes() {
132  if (!Names2InstrOpCodes.empty())
133  return;
134  const auto *TII = Subtarget.getInstrInfo();
135  assert(TII && "Expected target instruction info");
136  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
137  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
138 }
139 
141  unsigned &OpCode) {
142  initNames2InstrOpCodes();
143  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
144  if (InstrInfo == Names2InstrOpCodes.end())
145  return true;
146  OpCode = InstrInfo->getValue();
147  return false;
148 }
149 
150 void PerTargetMIParsingState::initNames2RegMasks() {
151  if (!Names2RegMasks.empty())
152  return;
153  const auto *TRI = Subtarget.getRegisterInfo();
154  assert(TRI && "Expected target register info");
156  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
157  assert(RegMasks.size() == RegMaskNames.size());
158  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
159  Names2RegMasks.insert(
160  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
161 }
162 
164  initNames2RegMasks();
165  auto RegMaskInfo = Names2RegMasks.find(Identifier);
166  if (RegMaskInfo == Names2RegMasks.end())
167  return nullptr;
168  return RegMaskInfo->getValue();
169 }
170 
171 void PerTargetMIParsingState::initNames2SubRegIndices() {
172  if (!Names2SubRegIndices.empty())
173  return;
174  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
175  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
176  Names2SubRegIndices.insert(
177  std::make_pair(TRI->getSubRegIndexName(I), I));
178 }
179 
181  initNames2SubRegIndices();
182  auto SubRegInfo = Names2SubRegIndices.find(Name);
183  if (SubRegInfo == Names2SubRegIndices.end())
184  return 0;
185  return SubRegInfo->getValue();
186 }
187 
188 void PerTargetMIParsingState::initNames2TargetIndices() {
189  if (!Names2TargetIndices.empty())
190  return;
191  const auto *TII = Subtarget.getInstrInfo();
192  assert(TII && "Expected target instruction info");
193  auto Indices = TII->getSerializableTargetIndices();
194  for (const auto &I : Indices)
195  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
196 }
197 
199  initNames2TargetIndices();
200  auto IndexInfo = Names2TargetIndices.find(Name);
201  if (IndexInfo == Names2TargetIndices.end())
202  return true;
203  Index = IndexInfo->second;
204  return false;
205 }
206 
207 void PerTargetMIParsingState::initNames2DirectTargetFlags() {
208  if (!Names2DirectTargetFlags.empty())
209  return;
210 
211  const auto *TII = Subtarget.getInstrInfo();
212  assert(TII && "Expected target instruction info");
214  for (const auto &I : Flags)
215  Names2DirectTargetFlags.insert(
216  std::make_pair(StringRef(I.second), I.first));
217 }
218 
220  unsigned &Flag) {
221  initNames2DirectTargetFlags();
222  auto FlagInfo = Names2DirectTargetFlags.find(Name);
223  if (FlagInfo == Names2DirectTargetFlags.end())
224  return true;
225  Flag = FlagInfo->second;
226  return false;
227 }
228 
229 void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
230  if (!Names2BitmaskTargetFlags.empty())
231  return;
232 
233  const auto *TII = Subtarget.getInstrInfo();
234  assert(TII && "Expected target instruction info");
236  for (const auto &I : Flags)
237  Names2BitmaskTargetFlags.insert(
238  std::make_pair(StringRef(I.second), I.first));
239 }
240 
242  unsigned &Flag) {
243  initNames2BitmaskTargetFlags();
244  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
245  if (FlagInfo == Names2BitmaskTargetFlags.end())
246  return true;
247  Flag = FlagInfo->second;
248  return false;
249 }
250 
251 void PerTargetMIParsingState::initNames2MMOTargetFlags() {
252  if (!Names2MMOTargetFlags.empty())
253  return;
254 
255  const auto *TII = Subtarget.getInstrInfo();
256  assert(TII && "Expected target instruction info");
257  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
258  for (const auto &I : Flags)
259  Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));
260 }
261 
264  initNames2MMOTargetFlags();
265  auto FlagInfo = Names2MMOTargetFlags.find(Name);
266  if (FlagInfo == Names2MMOTargetFlags.end())
267  return true;
268  Flag = FlagInfo->second;
269  return false;
270 }
271 
272 void PerTargetMIParsingState::initNames2RegClasses() {
273  if (!Names2RegClasses.empty())
274  return;
275 
276  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
277  for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
278  const auto *RC = TRI->getRegClass(I);
279  Names2RegClasses.insert(
280  std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
281  }
282 }
283 
284 void PerTargetMIParsingState::initNames2RegBanks() {
285  if (!Names2RegBanks.empty())
286  return;
287 
288  const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
289  // If the target does not support GlobalISel, we may not have a
290  // register bank info.
291  if (!RBI)
292  return;
293 
294  for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
295  const auto &RegBank = RBI->getRegBank(I);
296  Names2RegBanks.insert(
297  std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
298  }
299 }
300 
301 const TargetRegisterClass *
303  auto RegClassInfo = Names2RegClasses.find(Name);
304  if (RegClassInfo == Names2RegClasses.end())
305  return nullptr;
306  return RegClassInfo->getValue();
307 }
308 
310  auto RegBankInfo = Names2RegBanks.find(Name);
311  if (RegBankInfo == Names2RegBanks.end())
312  return nullptr;
313  return RegBankInfo->getValue();
314 }
315 
317  SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &T)
318  : MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {
319 }
320 
322  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
323  if (I.second) {
325  VRegInfo *Info = new (Allocator) VRegInfo;
327  I.first->second = Info;
328  }
329  return *I.first->second;
330 }
331 
333  assert(RegName != "" && "Expected named reg.");
334 
335  auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
336  if (I.second) {
337  VRegInfo *Info = new (Allocator) VRegInfo;
339  I.first->second = Info;
340  }
341  return *I.first->second;
342 }
343 
344 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
345  DenseMap<unsigned, const Value *> &Slots2Values) {
346  int Slot = MST.getLocalSlot(V);
347  if (Slot == -1)
348  return;
349  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
350 }
351 
352 /// Creates the mapping from slot numbers to function's unnamed IR values.
353 static void initSlots2Values(const Function &F,
354  DenseMap<unsigned, const Value *> &Slots2Values) {
355  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
356  MST.incorporateFunction(F);
357  for (const auto &Arg : F.args())
358  mapValueToSlot(&Arg, MST, Slots2Values);
359  for (const auto &BB : F) {
360  mapValueToSlot(&BB, MST, Slots2Values);
361  for (const auto &I : BB)
362  mapValueToSlot(&I, MST, Slots2Values);
363  }
364 }
365 
367  if (Slots2Values.empty())
369  return Slots2Values.lookup(Slot);
370 }
371 
372 namespace {
373 
374 /// A wrapper struct around the 'MachineOperand' struct that includes a source
375 /// range and other attributes.
376 struct ParsedMachineOperand {
377  MachineOperand Operand;
378  StringRef::iterator Begin;
380  Optional<unsigned> TiedDefIdx;
381 
382  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
383  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
384  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
385  if (TiedDefIdx)
386  assert(Operand.isReg() && Operand.isUse() &&
387  "Only used register operands can be tied");
388  }
389 };
390 
391 class MIParser {
392  MachineFunction &MF;
394  StringRef Source, CurrentSource;
395  SMRange SourceRange;
396  MIToken Token;
398  /// Maps from slot numbers to function's unnamed basic blocks.
399  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
400 
401 public:
403  StringRef Source);
405  StringRef Source, SMRange SourceRange);
406 
407  /// \p SkipChar gives the number of characters to skip before looking
408  /// for the next token.
409  void lex(unsigned SkipChar = 0);
410 
411  /// Report an error at the current location with the given message.
412  ///
413  /// This function always return true.
414  bool error(const Twine &Msg);
415 
416  /// Report an error at the given location with the given message.
417  ///
418  /// This function always return true.
419  bool error(StringRef::iterator Loc, const Twine &Msg);
420 
421  bool
422  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
423  bool parseBasicBlocks();
424  bool parse(MachineInstr *&MI);
425  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
426  bool parseStandaloneNamedRegister(Register &Reg);
427  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
428  bool parseStandaloneRegister(Register &Reg);
429  bool parseStandaloneStackObject(int &FI);
430  bool parseStandaloneMDNode(MDNode *&Node);
431  bool parseMachineMetadata();
432  bool parseMDTuple(MDNode *&MD, bool IsDistinct);
433  bool parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts);
434  bool parseMetadata(Metadata *&MD);
435 
436  bool
437  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
438  bool parseBasicBlock(MachineBasicBlock &MBB,
439  MachineBasicBlock *&AddFalthroughFrom);
440  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
441  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
442 
443  bool parseNamedRegister(Register &Reg);
444  bool parseVirtualRegister(VRegInfo *&Info);
445  bool parseNamedVirtualRegister(VRegInfo *&Info);
446  bool parseRegister(Register &Reg, VRegInfo *&VRegInfo);
447  bool parseRegisterFlag(unsigned &Flags);
448  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
449  bool parseSubRegisterIndex(unsigned &SubReg);
450  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
451  bool parseRegisterOperand(MachineOperand &Dest,
452  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
453  bool parseImmediateOperand(MachineOperand &Dest);
454  bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
455  const Constant *&C);
456  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
457  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
458  bool parseTypedImmediateOperand(MachineOperand &Dest);
459  bool parseFPImmediateOperand(MachineOperand &Dest);
461  bool parseMBBOperand(MachineOperand &Dest);
462  bool parseStackFrameIndex(int &FI);
463  bool parseStackObjectOperand(MachineOperand &Dest);
464  bool parseFixedStackFrameIndex(int &FI);
465  bool parseFixedStackObjectOperand(MachineOperand &Dest);
466  bool parseGlobalValue(GlobalValue *&GV);
467  bool parseGlobalAddressOperand(MachineOperand &Dest);
468  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
469  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
470  bool parseJumpTableIndexOperand(MachineOperand &Dest);
471  bool parseExternalSymbolOperand(MachineOperand &Dest);
472  bool parseMCSymbolOperand(MachineOperand &Dest);
473  bool parseMDNode(MDNode *&Node);
474  bool parseDIExpression(MDNode *&Expr);
475  bool parseDILocation(MDNode *&Expr);
476  bool parseMetadataOperand(MachineOperand &Dest);
477  bool parseCFIOffset(int &Offset);
478  bool parseCFIRegister(Register &Reg);
479  bool parseCFIAddressSpace(unsigned &AddressSpace);
480  bool parseCFIEscapeValues(std::string& Values);
481  bool parseCFIOperand(MachineOperand &Dest);
482  bool parseIRBlock(BasicBlock *&BB, const Function &F);
483  bool parseBlockAddressOperand(MachineOperand &Dest);
484  bool parseIntrinsicOperand(MachineOperand &Dest);
485  bool parsePredicateOperand(MachineOperand &Dest);
486  bool parseShuffleMaskOperand(MachineOperand &Dest);
487  bool parseTargetIndexOperand(MachineOperand &Dest);
488  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
489  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
490  bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
491  MachineOperand &Dest,
492  Optional<unsigned> &TiedDefIdx);
493  bool parseMachineOperandAndTargetFlags(const unsigned OpCode,
494  const unsigned OpIdx,
495  MachineOperand &Dest,
496  Optional<unsigned> &TiedDefIdx);
497  bool parseOffset(int64_t &Offset);
498  bool parseIRBlockAddressTaken(BasicBlock *&BB);
499  bool parseAlignment(uint64_t &Alignment);
500  bool parseAddrspace(unsigned &Addrspace);
501  bool parseSectionID(Optional<MBBSectionID> &SID);
502  bool parseOperandsOffset(MachineOperand &Op);
503  bool parseIRValue(const Value *&V);
504  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
505  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
506  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
507  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
508  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
509  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
510  bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
511  bool parseHeapAllocMarker(MDNode *&Node);
512  bool parsePCSections(MDNode *&Node);
513 
514  bool parseTargetImmMnemonic(const unsigned OpCode, const unsigned OpIdx,
515  MachineOperand &Dest, const MIRFormatter &MF);
516 
517 private:
518  /// Convert the integer literal in the current token into an unsigned integer.
519  ///
520  /// Return true if an error occurred.
521  bool getUnsigned(unsigned &Result);
522 
523  /// Convert the integer literal in the current token into an uint64.
524  ///
525  /// Return true if an error occurred.
526  bool getUint64(uint64_t &Result);
527 
528  /// Convert the hexadecimal literal in the current token into an unsigned
529  /// APInt with a minimum bitwidth required to represent the value.
530  ///
531  /// Return true if the literal does not represent an integer value.
532  bool getHexUint(APInt &Result);
533 
534  /// If the current token is of the given kind, consume it and return false.
535  /// Otherwise report an error and return true.
536  bool expectAndConsume(MIToken::TokenKind TokenKind);
537 
538  /// If the current token is of the given kind, consume it and return true.
539  /// Otherwise return false.
540  bool consumeIfPresent(MIToken::TokenKind TokenKind);
541 
542  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
543 
544  bool assignRegisterTies(MachineInstr &MI,
546 
547  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
548  const MCInstrDesc &MCID);
549 
550  const BasicBlock *getIRBlock(unsigned Slot);
551  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
552 
553  /// Get or create an MCSymbol for a given name.
554  MCSymbol *getOrCreateMCSymbol(StringRef Name);
555 
556  /// parseStringConstant
557  /// ::= StringConstant
558  bool parseStringConstant(std::string &Result);
559 
560  /// Map the location in the MI string to the corresponding location specified
561  /// in `SourceRange`.
562  SMLoc mapSMLoc(StringRef::iterator Loc);
563 };
564 
565 } // end anonymous namespace
566 
567 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
569  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
570 {}
571 
572 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
573  StringRef Source, SMRange SourceRange)
574  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source),
575  SourceRange(SourceRange), PFS(PFS) {}
576 
577 void MIParser::lex(unsigned SkipChar) {
578  CurrentSource = lexMIToken(
579  CurrentSource.slice(SkipChar, StringRef::npos), Token,
580  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
581 }
582 
583 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
584 
585 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
586  const SourceMgr &SM = *PFS.SM;
587  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
588  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
589  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
590  // Create an ordinary diagnostic when the source manager's buffer is the
591  // source string.
593  return true;
594  }
595  // Create a diagnostic for a YAML string literal.
596  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
597  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
598  Source, None, None);
599  return true;
600 }
601 
602 SMLoc MIParser::mapSMLoc(StringRef::iterator Loc) {
603  assert(SourceRange.isValid() && "Invalid source range");
604  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
605  return SMLoc::getFromPointer(SourceRange.Start.getPointer() +
606  (Loc - Source.data()));
607 }
608 
609 typedef function_ref<bool(StringRef::iterator Loc, const Twine &)>
611 
612 static const char *toString(MIToken::TokenKind TokenKind) {
613  switch (TokenKind) {
614  case MIToken::comma:
615  return "','";
616  case MIToken::equal:
617  return "'='";
618  case MIToken::colon:
619  return "':'";
620  case MIToken::lparen:
621  return "'('";
622  case MIToken::rparen:
623  return "')'";
624  default:
625  return "<unknown token>";
626  }
627 }
628 
629 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
630  if (Token.isNot(TokenKind))
631  return error(Twine("expected ") + toString(TokenKind));
632  lex();
633  return false;
634 }
635 
636 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
637  if (Token.isNot(TokenKind))
638  return false;
639  lex();
640  return true;
641 }
642 
643 // Parse Machine Basic Block Section ID.
644 bool MIParser::parseSectionID(Optional<MBBSectionID> &SID) {
645  assert(Token.is(MIToken::kw_bbsections));
646  lex();
647  if (Token.is(MIToken::IntegerLiteral)) {
648  unsigned Value = 0;
649  if (getUnsigned(Value))
650  return error("Unknown Section ID");
651  SID = MBBSectionID{Value};
652  } else {
653  const StringRef &S = Token.stringValue();
654  if (S == "Exception")
656  else if (S == "Cold")
658  else
659  return error("Unknown Section ID");
660  }
661  lex();
662  return false;
663 }
664 
665 bool MIParser::parseBasicBlockDefinition(
668  unsigned ID = 0;
669  if (getUnsigned(ID))
670  return true;
671  auto Loc = Token.location();
672  auto Name = Token.stringValue();
673  lex();
674  bool MachineBlockAddressTaken = false;
675  BasicBlock *AddressTakenIRBlock = nullptr;
676  bool IsLandingPad = false;
677  bool IsInlineAsmBrIndirectTarget = false;
678  bool IsEHFuncletEntry = false;
679  Optional<MBBSectionID> SectionID;
680  uint64_t Alignment = 0;
681  BasicBlock *BB = nullptr;
682  if (consumeIfPresent(MIToken::lparen)) {
683  do {
684  // TODO: Report an error when multiple same attributes are specified.
685  switch (Token.kind()) {
687  MachineBlockAddressTaken = true;
688  lex();
689  break;
691  if (parseIRBlockAddressTaken(AddressTakenIRBlock))
692  return true;
693  break;
695  IsLandingPad = true;
696  lex();
697  break;
699  IsInlineAsmBrIndirectTarget = true;
700  lex();
701  break;
703  IsEHFuncletEntry = true;
704  lex();
705  break;
706  case MIToken::kw_align:
707  if (parseAlignment(Alignment))
708  return true;
709  break;
710  case MIToken::IRBlock:
712  // TODO: Report an error when both name and ir block are specified.
713  if (parseIRBlock(BB, MF.getFunction()))
714  return true;
715  lex();
716  break;
718  if (parseSectionID(SectionID))
719  return true;
720  break;
721  default:
722  break;
723  }
724  } while (consumeIfPresent(MIToken::comma));
725  if (expectAndConsume(MIToken::rparen))
726  return true;
727  }
728  if (expectAndConsume(MIToken::colon))
729  return true;
730 
731  if (!Name.empty()) {
732  BB = dyn_cast_or_null<BasicBlock>(
733  MF.getFunction().getValueSymbolTable()->lookup(Name));
734  if (!BB)
735  return error(Loc, Twine("basic block '") + Name +
736  "' is not defined in the function '" +
737  MF.getName() + "'");
738  }
739  auto *MBB = MF.CreateMachineBasicBlock(BB);
740  MF.insert(MF.end(), MBB);
741  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
742  if (!WasInserted)
743  return error(Loc, Twine("redefinition of machine basic block with id #") +
744  Twine(ID));
745  if (Alignment)
746  MBB->setAlignment(Align(Alignment));
747  if (MachineBlockAddressTaken)
749  if (AddressTakenIRBlock)
750  MBB->setAddressTakenIRBlock(AddressTakenIRBlock);
751  MBB->setIsEHPad(IsLandingPad);
752  MBB->setIsInlineAsmBrIndirectTarget(IsInlineAsmBrIndirectTarget);
753  MBB->setIsEHFuncletEntry(IsEHFuncletEntry);
754  if (SectionID) {
755  MBB->setSectionID(SectionID.value());
756  MF.setBBSectionsType(BasicBlockSection::List);
757  }
758  return false;
759 }
760 
761 bool MIParser::parseBasicBlockDefinitions(
763  lex();
764  // Skip until the first machine basic block.
765  while (Token.is(MIToken::Newline))
766  lex();
767  if (Token.isErrorOrEOF())
768  return Token.isError();
769  if (Token.isNot(MIToken::MachineBasicBlockLabel))
770  return error("expected a basic block definition before instructions");
771  unsigned BraceDepth = 0;
772  do {
773  if (parseBasicBlockDefinition(MBBSlots))
774  return true;
775  bool IsAfterNewline = false;
776  // Skip until the next machine basic block.
777  while (true) {
778  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
779  Token.isErrorOrEOF())
780  break;
781  else if (Token.is(MIToken::MachineBasicBlockLabel))
782  return error("basic block definition should be located at the start of "
783  "the line");
784  else if (consumeIfPresent(MIToken::Newline)) {
785  IsAfterNewline = true;
786  continue;
787  }
788  IsAfterNewline = false;
789  if (Token.is(MIToken::lbrace))
790  ++BraceDepth;
791  if (Token.is(MIToken::rbrace)) {
792  if (!BraceDepth)
793  return error("extraneous closing brace ('}')");
794  --BraceDepth;
795  }
796  lex();
797  }
798  // Verify that we closed all of the '{' at the end of a file or a block.
799  if (!Token.isError() && BraceDepth)
800  return error("expected '}'"); // FIXME: Report a note that shows '{'.
801  } while (!Token.isErrorOrEOF());
802  return Token.isError();
803 }
804 
805 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
806  assert(Token.is(MIToken::kw_liveins));
807  lex();
808  if (expectAndConsume(MIToken::colon))
809  return true;
810  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
811  return false;
812  do {
813  if (Token.isNot(MIToken::NamedRegister))
814  return error("expected a named register");
815  Register Reg;
816  if (parseNamedRegister(Reg))
817  return true;
818  lex();
820  if (consumeIfPresent(MIToken::colon)) {
821  // Parse lane mask.
822  if (Token.isNot(MIToken::IntegerLiteral) &&
823  Token.isNot(MIToken::HexLiteral))
824  return error("expected a lane mask");
825  static_assert(sizeof(LaneBitmask::Type) == sizeof(uint64_t),
826  "Use correct get-function for lane mask");
828  if (getUint64(V))
829  return error("invalid lane mask value");
830  Mask = LaneBitmask(V);
831  lex();
832  }
833  MBB.addLiveIn(Reg, Mask);
834  } while (consumeIfPresent(MIToken::comma));
835  return false;
836 }
837 
838 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
839  assert(Token.is(MIToken::kw_successors));
840  lex();
841  if (expectAndConsume(MIToken::colon))
842  return true;
843  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
844  return false;
845  do {
846  if (Token.isNot(MIToken::MachineBasicBlock))
847  return error("expected a machine basic block reference");
848  MachineBasicBlock *SuccMBB = nullptr;
849  if (parseMBBReference(SuccMBB))
850  return true;
851  lex();
852  unsigned Weight = 0;
853  if (consumeIfPresent(MIToken::lparen)) {
854  if (Token.isNot(MIToken::IntegerLiteral) &&
855  Token.isNot(MIToken::HexLiteral))
856  return error("expected an integer literal after '('");
857  if (getUnsigned(Weight))
858  return true;
859  lex();
860  if (expectAndConsume(MIToken::rparen))
861  return true;
862  }
863  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
864  } while (consumeIfPresent(MIToken::comma));
866  return false;
867 }
868 
869 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
870  MachineBasicBlock *&AddFalthroughFrom) {
871  // Skip the definition.
873  lex();
874  if (consumeIfPresent(MIToken::lparen)) {
875  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
876  lex();
877  consumeIfPresent(MIToken::rparen);
878  }
879  consumeIfPresent(MIToken::colon);
880 
881  // Parse the liveins and successors.
882  // N.B: Multiple lists of successors and liveins are allowed and they're
883  // merged into one.
884  // Example:
885  // liveins: $edi
886  // liveins: $esi
887  //
888  // is equivalent to
889  // liveins: $edi, $esi
890  bool ExplicitSuccessors = false;
891  while (true) {
892  if (Token.is(MIToken::kw_successors)) {
893  if (parseBasicBlockSuccessors(MBB))
894  return true;
895  ExplicitSuccessors = true;
896  } else if (Token.is(MIToken::kw_liveins)) {
897  if (parseBasicBlockLiveins(MBB))
898  return true;
899  } else if (consumeIfPresent(MIToken::Newline)) {
900  continue;
901  } else
902  break;
903  if (!Token.isNewlineOrEOF())
904  return error("expected line break at the end of a list");
905  lex();
906  }
907 
908  // Parse the instructions.
909  bool IsInBundle = false;
910  MachineInstr *PrevMI = nullptr;
911  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
912  !Token.is(MIToken::Eof)) {
913  if (consumeIfPresent(MIToken::Newline))
914  continue;
915  if (consumeIfPresent(MIToken::rbrace)) {
916  // The first parsing pass should verify that all closing '}' have an
917  // opening '{'.
918  assert(IsInBundle);
919  IsInBundle = false;
920  continue;
921  }
922  MachineInstr *MI = nullptr;
923  if (parse(MI))
924  return true;
925  MBB.insert(MBB.end(), MI);
926  if (IsInBundle) {
928  MI->setFlag(MachineInstr::BundledPred);
929  }
930  PrevMI = MI;
931  if (Token.is(MIToken::lbrace)) {
932  if (IsInBundle)
933  return error("nested instruction bundles are not allowed");
934  lex();
935  // This instruction is the start of the bundle.
936  MI->setFlag(MachineInstr::BundledSucc);
937  IsInBundle = true;
938  if (!Token.is(MIToken::Newline))
939  // The next instruction can be on the same line.
940  continue;
941  }
942  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
943  lex();
944  }
945 
946  // Construct successor list by searching for basic block machine operands.
947  if (!ExplicitSuccessors) {
949  bool IsFallthrough;
950  guessSuccessors(MBB, Successors, IsFallthrough);
951  for (MachineBasicBlock *Succ : Successors)
952  MBB.addSuccessor(Succ);
953 
954  if (IsFallthrough) {
955  AddFalthroughFrom = &MBB;
956  } else {
958  }
959  }
960 
961  return false;
962 }
963 
964 bool MIParser::parseBasicBlocks() {
965  lex();
966  // Skip until the first machine basic block.
967  while (Token.is(MIToken::Newline))
968  lex();
969  if (Token.isErrorOrEOF())
970  return Token.isError();
971  // The first parsing pass should have verified that this token is a MBB label
972  // in the 'parseBasicBlockDefinitions' method.
974  MachineBasicBlock *AddFalthroughFrom = nullptr;
975  do {
976  MachineBasicBlock *MBB = nullptr;
977  if (parseMBBReference(MBB))
978  return true;
979  if (AddFalthroughFrom) {
980  if (!AddFalthroughFrom->isSuccessor(MBB))
981  AddFalthroughFrom->addSuccessor(MBB);
982  AddFalthroughFrom->normalizeSuccProbs();
983  AddFalthroughFrom = nullptr;
984  }
985  if (parseBasicBlock(*MBB, AddFalthroughFrom))
986  return true;
987  // The method 'parseBasicBlock' should parse the whole block until the next
988  // block or the end of file.
989  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
990  } while (Token.isNot(MIToken::Eof));
991  return false;
992 }
993 
995  // Parse any register operands before '='
998  while (Token.isRegister() || Token.isRegisterFlag()) {
999  auto Loc = Token.location();
1000  Optional<unsigned> TiedDefIdx;
1001  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
1002  return true;
1003  Operands.push_back(
1004  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1005  if (Token.isNot(MIToken::comma))
1006  break;
1007  lex();
1008  }
1009  if (!Operands.empty() && expectAndConsume(MIToken::equal))
1010  return true;
1011 
1012  unsigned OpCode, Flags = 0;
1013  if (Token.isError() || parseInstruction(OpCode, Flags))
1014  return true;
1015 
1016  // Parse the remaining machine operands.
1017  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
1018  Token.isNot(MIToken::kw_post_instr_symbol) &&
1019  Token.isNot(MIToken::kw_heap_alloc_marker) &&
1020  Token.isNot(MIToken::kw_pcsections) &&
1021  Token.isNot(MIToken::kw_cfi_type) &&
1022  Token.isNot(MIToken::kw_debug_location) &&
1023  Token.isNot(MIToken::kw_debug_instr_number) &&
1024  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
1025  auto Loc = Token.location();
1026  Optional<unsigned> TiedDefIdx;
1027  if (parseMachineOperandAndTargetFlags(OpCode, Operands.size(), MO, TiedDefIdx))
1028  return true;
1029  Operands.push_back(
1030  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1031  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
1032  Token.is(MIToken::lbrace))
1033  break;
1034  if (Token.isNot(MIToken::comma))
1035  return error("expected ',' before the next machine operand");
1036  lex();
1037  }
1038 
1039  MCSymbol *PreInstrSymbol = nullptr;
1040  if (Token.is(MIToken::kw_pre_instr_symbol))
1041  if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1042  return true;
1043  MCSymbol *PostInstrSymbol = nullptr;
1044  if (Token.is(MIToken::kw_post_instr_symbol))
1045  if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1046  return true;
1047  MDNode *HeapAllocMarker = nullptr;
1048  if (Token.is(MIToken::kw_heap_alloc_marker))
1049  if (parseHeapAllocMarker(HeapAllocMarker))
1050  return true;
1051  MDNode *PCSections = nullptr;
1052  if (Token.is(MIToken::kw_pcsections))
1053  if (parsePCSections(PCSections))
1054  return true;
1055 
1056  unsigned CFIType = 0;
1057  if (Token.is(MIToken::kw_cfi_type)) {
1058  lex();
1059  if (Token.isNot(MIToken::IntegerLiteral))
1060  return error("expected an integer literal after 'cfi-type'");
1061  // getUnsigned is sufficient for 32-bit integers.
1062  if (getUnsigned(CFIType))
1063  return true;
1064  lex();
1065  // Lex past trailing comma if present.
1066  if (Token.is(MIToken::comma))
1067  lex();
1068  }
1069 
1070  unsigned InstrNum = 0;
1071  if (Token.is(MIToken::kw_debug_instr_number)) {
1072  lex();
1073  if (Token.isNot(MIToken::IntegerLiteral))
1074  return error("expected an integer literal after 'debug-instr-number'");
1075  if (getUnsigned(InstrNum))
1076  return true;
1077  lex();
1078  // Lex past trailing comma if present.
1079  if (Token.is(MIToken::comma))
1080  lex();
1081  }
1082 
1083  DebugLoc DebugLocation;
1084  if (Token.is(MIToken::kw_debug_location)) {
1085  lex();
1086  MDNode *Node = nullptr;
1087  if (Token.is(MIToken::exclaim)) {
1088  if (parseMDNode(Node))
1089  return true;
1090  } else if (Token.is(MIToken::md_dilocation)) {
1091  if (parseDILocation(Node))
1092  return true;
1093  } else
1094  return error("expected a metadata node after 'debug-location'");
1095  if (!isa<DILocation>(Node))
1096  return error("referenced metadata is not a DILocation");
1097  DebugLocation = DebugLoc(Node);
1098  }
1099 
1100  // Parse the machine memory operands.
1102  if (Token.is(MIToken::coloncolon)) {
1103  lex();
1104  while (!Token.isNewlineOrEOF()) {
1105  MachineMemOperand *MemOp = nullptr;
1106  if (parseMachineMemoryOperand(MemOp))
1107  return true;
1108  MemOperands.push_back(MemOp);
1109  if (Token.isNewlineOrEOF())
1110  break;
1111  if (Token.isNot(MIToken::comma))
1112  return error("expected ',' before the next machine memory operand");
1113  lex();
1114  }
1115  }
1116 
1117  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1118  if (!MCID.isVariadic()) {
1119  // FIXME: Move the implicit operand verification to the machine verifier.
1120  if (verifyImplicitOperands(Operands, MCID))
1121  return true;
1122  }
1123 
1124  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
1125  MI->setFlags(Flags);
1126 
1127  unsigned NumExplicitOps = 0;
1128  for (const auto &Operand : Operands) {
1129  bool IsImplicitOp = Operand.Operand.isReg() && Operand.Operand.isImplicit();
1130  if (!IsImplicitOp) {
1131  if (!MCID.isVariadic() && NumExplicitOps >= MCID.getNumOperands() &&
1132  !Operand.Operand.isValidExcessOperand())
1133  return error(Operand.Begin, "too many operands for instruction");
1134 
1135  ++NumExplicitOps;
1136  }
1137 
1138  MI->addOperand(MF, Operand.Operand);
1139  }
1140 
1141  if (assignRegisterTies(*MI, Operands))
1142  return true;
1143  if (PreInstrSymbol)
1144  MI->setPreInstrSymbol(MF, PreInstrSymbol);
1145  if (PostInstrSymbol)
1146  MI->setPostInstrSymbol(MF, PostInstrSymbol);
1147  if (HeapAllocMarker)
1148  MI->setHeapAllocMarker(MF, HeapAllocMarker);
1149  if (PCSections)
1150  MI->setPCSections(MF, PCSections);
1151  if (CFIType)
1152  MI->setCFIType(MF, CFIType);
1153  if (!MemOperands.empty())
1154  MI->setMemRefs(MF, MemOperands);
1155  if (InstrNum)
1156  MI->setDebugInstrNum(InstrNum);
1157  return false;
1158 }
1159 
1160 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
1161  lex();
1162  if (Token.isNot(MIToken::MachineBasicBlock))
1163  return error("expected a machine basic block reference");
1164  if (parseMBBReference(MBB))
1165  return true;
1166  lex();
1167  if (Token.isNot(MIToken::Eof))
1168  return error(
1169  "expected end of string after the machine basic block reference");
1170  return false;
1171 }
1172 
1173 bool MIParser::parseStandaloneNamedRegister(Register &Reg) {
1174  lex();
1175  if (Token.isNot(MIToken::NamedRegister))
1176  return error("expected a named register");
1177  if (parseNamedRegister(Reg))
1178  return true;
1179  lex();
1180  if (Token.isNot(MIToken::Eof))
1181  return error("expected end of string after the register reference");
1182  return false;
1183 }
1184 
1185 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
1186  lex();
1187  if (Token.isNot(MIToken::VirtualRegister))
1188  return error("expected a virtual register");
1189  if (parseVirtualRegister(Info))
1190  return true;
1191  lex();
1192  if (Token.isNot(MIToken::Eof))
1193  return error("expected end of string after the register reference");
1194  return false;
1195 }
1196 
1197 bool MIParser::parseStandaloneRegister(Register &Reg) {
1198  lex();
1199  if (Token.isNot(MIToken::NamedRegister) &&
1200  Token.isNot(MIToken::VirtualRegister))
1201  return error("expected either a named or virtual register");
1202 
1203  VRegInfo *Info;
1204  if (parseRegister(Reg, Info))
1205  return true;
1206 
1207  lex();
1208  if (Token.isNot(MIToken::Eof))
1209  return error("expected end of string after the register reference");
1210  return false;
1211 }
1212 
1213 bool MIParser::parseStandaloneStackObject(int &FI) {
1214  lex();
1215  if (Token.isNot(MIToken::StackObject))
1216  return error("expected a stack object");
1217  if (parseStackFrameIndex(FI))
1218  return true;
1219  if (Token.isNot(MIToken::Eof))
1220  return error("expected end of string after the stack object reference");
1221  return false;
1222 }
1223 
1224 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
1225  lex();
1226  if (Token.is(MIToken::exclaim)) {
1227  if (parseMDNode(Node))
1228  return true;
1229  } else if (Token.is(MIToken::md_diexpr)) {
1230  if (parseDIExpression(Node))
1231  return true;
1232  } else if (Token.is(MIToken::md_dilocation)) {
1233  if (parseDILocation(Node))
1234  return true;
1235  } else
1236  return error("expected a metadata node");
1237  if (Token.isNot(MIToken::Eof))
1238  return error("expected end of string after the metadata node");
1239  return false;
1240 }
1241 
1243  lex();
1244  if (Token.isNot(MIToken::exclaim))
1245  return error("expected a metadata node");
1246 
1247  lex();
1248  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1249  return error("expected metadata id after '!'");
1250  unsigned ID = 0;
1251  if (getUnsigned(ID))
1252  return true;
1253  lex();
1254  if (expectAndConsume(MIToken::equal))
1255  return true;
1256  bool IsDistinct = Token.is(MIToken::kw_distinct);
1257  if (IsDistinct)
1258  lex();
1259  if (Token.isNot(MIToken::exclaim))
1260  return error("expected a metadata node");
1261  lex();
1262 
1263  MDNode *MD;
1264  if (parseMDTuple(MD, IsDistinct))
1265  return true;
1266 
1267  auto FI = PFS.MachineForwardRefMDNodes.find(ID);
1268  if (FI != PFS.MachineForwardRefMDNodes.end()) {
1269  FI->second.first->replaceAllUsesWith(MD);
1270  PFS.MachineForwardRefMDNodes.erase(FI);
1271 
1272  assert(PFS.MachineMetadataNodes[ID] == MD && "Tracking VH didn't work");
1273  } else {
1274  if (PFS.MachineMetadataNodes.count(ID))
1275  return error("Metadata id is already used");
1276  PFS.MachineMetadataNodes[ID].reset(MD);
1277  }
1278 
1279  return false;
1280 }
1281 
1282 bool MIParser::parseMDTuple(MDNode *&MD, bool IsDistinct) {
1284  if (parseMDNodeVector(Elts))
1285  return true;
1286  MD = (IsDistinct ? MDTuple::getDistinct
1287  : MDTuple::get)(MF.getFunction().getContext(), Elts);
1288  return false;
1289 }
1290 
1291 bool MIParser::parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts) {
1292  if (Token.isNot(MIToken::lbrace))
1293  return error("expected '{' here");
1294  lex();
1295 
1296  if (Token.is(MIToken::rbrace)) {
1297  lex();
1298  return false;
1299  }
1300 
1301  do {
1302  Metadata *MD;
1303  if (parseMetadata(MD))
1304  return true;
1305 
1306  Elts.push_back(MD);
1307 
1308  if (Token.isNot(MIToken::comma))
1309  break;
1310  lex();
1311  } while (true);
1312 
1313  if (Token.isNot(MIToken::rbrace))
1314  return error("expected end of metadata node");
1315  lex();
1316 
1317  return false;
1318 }
1319 
1320 // ::= !42
1321 // ::= !"string"
1322 bool MIParser::parseMetadata(Metadata *&MD) {
1323  if (Token.isNot(MIToken::exclaim))
1324  return error("expected '!' here");
1325  lex();
1326 
1327  if (Token.is(MIToken::StringConstant)) {
1328  std::string Str;
1329  if (parseStringConstant(Str))
1330  return true;
1331  MD = MDString::get(MF.getFunction().getContext(), Str);
1332  return false;
1333  }
1334 
1335  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1336  return error("expected metadata id after '!'");
1337 
1338  SMLoc Loc = mapSMLoc(Token.location());
1339 
1340  unsigned ID = 0;
1341  if (getUnsigned(ID))
1342  return true;
1343  lex();
1344 
1345  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1346  if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
1347  MD = NodeInfo->second.get();
1348  return false;
1349  }
1350  // Check machine metadata.
1351  NodeInfo = PFS.MachineMetadataNodes.find(ID);
1352  if (NodeInfo != PFS.MachineMetadataNodes.end()) {
1353  MD = NodeInfo->second.get();
1354  return false;
1355  }
1356  // Forward reference.
1357  auto &FwdRef = PFS.MachineForwardRefMDNodes[ID];
1358  FwdRef = std::make_pair(
1359  MDTuple::getTemporary(MF.getFunction().getContext(), None), Loc);
1360  PFS.MachineMetadataNodes[ID].reset(FwdRef.first.get());
1361  MD = FwdRef.first.get();
1362 
1363  return false;
1364 }
1365 
1366 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
1367  assert(MO.isImplicit());
1368  return MO.isDef() ? "implicit-def" : "implicit";
1369 }
1370 
1371 static std::string getRegisterName(const TargetRegisterInfo *TRI,
1372  Register Reg) {
1373  assert(Register::isPhysicalRegister(Reg) && "expected phys reg");
1374  return StringRef(TRI->getName(Reg)).lower();
1375 }
1376 
1377 /// Return true if the parsed machine operands contain a given machine operand.
1378 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
1380  for (const auto &I : Operands) {
1381  if (ImplicitOperand.isIdenticalTo(I.Operand))
1382  return true;
1383  }
1384  return false;
1385 }
1386 
1387 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
1388  const MCInstrDesc &MCID) {
1389  if (MCID.isCall())
1390  // We can't verify call instructions as they can contain arbitrary implicit
1391  // register and register mask operands.
1392  return false;
1393 
1394  // Gather all the expected implicit operands.
1395  SmallVector<MachineOperand, 4> ImplicitOperands;
1396  if (MCID.ImplicitDefs)
1397  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
1398  ImplicitOperands.push_back(
1399  MachineOperand::CreateReg(*ImpDefs, true, true));
1400  if (MCID.ImplicitUses)
1401  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
1402  ImplicitOperands.push_back(
1403  MachineOperand::CreateReg(*ImpUses, false, true));
1404 
1405  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1406  assert(TRI && "Expected target register info");
1407  for (const auto &I : ImplicitOperands) {
1409  continue;
1410  return error(Operands.empty() ? Token.location() : Operands.back().End,
1411  Twine("missing implicit register operand '") +
1412  printImplicitRegisterFlag(I) + " $" +
1413  getRegisterName(TRI, I.getReg()) + "'");
1414  }
1415  return false;
1416 }
1417 
1418 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
1419  // Allow frame and fast math flags for OPCODE
1420  while (Token.is(MIToken::kw_frame_setup) ||
1421  Token.is(MIToken::kw_frame_destroy) ||
1422  Token.is(MIToken::kw_nnan) ||
1423  Token.is(MIToken::kw_ninf) ||
1424  Token.is(MIToken::kw_nsz) ||
1425  Token.is(MIToken::kw_arcp) ||
1426  Token.is(MIToken::kw_contract) ||
1427  Token.is(MIToken::kw_afn) ||
1428  Token.is(MIToken::kw_reassoc) ||
1429  Token.is(MIToken::kw_nuw) ||
1430  Token.is(MIToken::kw_nsw) ||
1431  Token.is(MIToken::kw_exact) ||
1432  Token.is(MIToken::kw_nofpexcept)) {
1433  // Mine frame and fast math flags
1434  if (Token.is(MIToken::kw_frame_setup))
1436  if (Token.is(MIToken::kw_frame_destroy))
1438  if (Token.is(MIToken::kw_nnan))
1440  if (Token.is(MIToken::kw_ninf))
1442  if (Token.is(MIToken::kw_nsz))
1444  if (Token.is(MIToken::kw_arcp))
1446  if (Token.is(MIToken::kw_contract))
1448  if (Token.is(MIToken::kw_afn))
1450  if (Token.is(MIToken::kw_reassoc))
1452  if (Token.is(MIToken::kw_nuw))
1454  if (Token.is(MIToken::kw_nsw))
1456  if (Token.is(MIToken::kw_exact))
1458  if (Token.is(MIToken::kw_nofpexcept))
1460 
1461  lex();
1462  }
1463  if (Token.isNot(MIToken::Identifier))
1464  return error("expected a machine instruction");
1465  StringRef InstrName = Token.stringValue();
1466  if (PFS.Target.parseInstrName(InstrName, OpCode))
1467  return error(Twine("unknown machine instruction name '") + InstrName + "'");
1468  lex();
1469  return false;
1470 }
1471 
1472 bool MIParser::parseNamedRegister(Register &Reg) {
1473  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
1474  StringRef Name = Token.stringValue();
1475  if (PFS.Target.getRegisterByName(Name, Reg))
1476  return error(Twine("unknown register name '") + Name + "'");
1477  return false;
1478 }
1479 
1480 bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
1481  assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
1482  StringRef Name = Token.stringValue();
1483  // TODO: Check that the VReg name is not the same as a physical register name.
1484  // If it is, then print a warning (when warnings are implemented).
1485  Info = &PFS.getVRegInfoNamed(Name);
1486  return false;
1487 }
1488 
1489 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
1490  if (Token.is(MIToken::NamedVirtualRegister))
1491  return parseNamedVirtualRegister(Info);
1492  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
1493  unsigned ID;
1494  if (getUnsigned(ID))
1495  return true;
1496  Info = &PFS.getVRegInfo(ID);
1497  return false;
1498 }
1499 
1500 bool MIParser::parseRegister(Register &Reg, VRegInfo *&Info) {
1501  switch (Token.kind()) {
1502  case MIToken::underscore:
1503  Reg = 0;
1504  return false;
1506  return parseNamedRegister(Reg);
1509  if (parseVirtualRegister(Info))
1510  return true;
1511  Reg = Info->VReg;
1512  return false;
1513  // TODO: Parse other register kinds.
1514  default:
1515  llvm_unreachable("The current token should be a register");
1516  }
1517 }
1518 
1519 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
1520  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
1521  return error("expected '_', register class, or register bank name");
1522  StringRef::iterator Loc = Token.location();
1523  StringRef Name = Token.stringValue();
1524 
1525  // Was it a register class?
1526  const TargetRegisterClass *RC = PFS.Target.getRegClass(Name);
1527  if (RC) {
1528  lex();
1529 
1530  switch (RegInfo.Kind) {
1531  case VRegInfo::UNKNOWN:
1532  case VRegInfo::NORMAL:
1533  RegInfo.Kind = VRegInfo::NORMAL;
1534  if (RegInfo.Explicit && RegInfo.D.RC != RC) {
1535  const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
1536  return error(Loc, Twine("conflicting register classes, previously: ") +
1537  Twine(TRI.getRegClassName(RegInfo.D.RC)));
1538  }
1539  RegInfo.D.RC = RC;
1540  RegInfo.Explicit = true;
1541  return false;
1542 
1543  case VRegInfo::GENERIC:
1544  case VRegInfo::REGBANK:
1545  return error(Loc, "register class specification on generic register");
1546  }
1547  llvm_unreachable("Unexpected register kind");
1548  }
1549 
1550  // Should be a register bank or a generic register.
1551  const RegisterBank *RegBank = nullptr;
1552  if (Name != "_") {
1553  RegBank = PFS.Target.getRegBank(Name);
1554  if (!RegBank)
1555  return error(Loc, "expected '_', register class, or register bank name");
1556  }
1557 
1558  lex();
1559 
1560  switch (RegInfo.Kind) {
1561  case VRegInfo::UNKNOWN:
1562  case VRegInfo::GENERIC:
1563  case VRegInfo::REGBANK:
1564  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1565  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1566  return error(Loc, "conflicting generic register banks");
1567  RegInfo.D.RegBank = RegBank;
1568  RegInfo.Explicit = true;
1569  return false;
1570 
1571  case VRegInfo::NORMAL:
1572  return error(Loc, "register bank specification on normal register");
1573  }
1574  llvm_unreachable("Unexpected register kind");
1575 }
1576 
1577 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1578  const unsigned OldFlags = Flags;
1579  switch (Token.kind()) {
1580  case MIToken::kw_implicit:
1582  break;
1585  break;
1586  case MIToken::kw_def:
1588  break;
1589  case MIToken::kw_dead:
1590  Flags |= RegState::Dead;
1591  break;
1592  case MIToken::kw_killed:
1593  Flags |= RegState::Kill;
1594  break;
1595  case MIToken::kw_undef:
1597  break;
1598  case MIToken::kw_internal:
1600  break;
1603  break;
1604  case MIToken::kw_debug_use:
1606  break;
1607  case MIToken::kw_renamable:
1609  break;
1610  default:
1611  llvm_unreachable("The current token should be a register flag");
1612  }
1613  if (OldFlags == Flags)
1614  // We know that the same flag is specified more than once when the flags
1615  // weren't modified.
1616  return error("duplicate '" + Token.stringValue() + "' register flag");
1617  lex();
1618  return false;
1619 }
1620 
1621 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1622  assert(Token.is(MIToken::dot));
1623  lex();
1624  if (Token.isNot(MIToken::Identifier))
1625  return error("expected a subregister index after '.'");
1626  auto Name = Token.stringValue();
1627  SubReg = PFS.Target.getSubRegIndex(Name);
1628  if (!SubReg)
1629  return error(Twine("use of unknown subregister index '") + Name + "'");
1630  lex();
1631  return false;
1632 }
1633 
1634 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1635  if (!consumeIfPresent(MIToken::kw_tied_def))
1636  return true;
1637  if (Token.isNot(MIToken::IntegerLiteral))
1638  return error("expected an integer literal after 'tied-def'");
1639  if (getUnsigned(TiedDefIdx))
1640  return true;
1641  lex();
1642  if (expectAndConsume(MIToken::rparen))
1643  return true;
1644  return false;
1645 }
1646 
1647 bool MIParser::assignRegisterTies(MachineInstr &MI,
1649  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1650  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1651  if (!Operands[I].TiedDefIdx)
1652  continue;
1653  // The parser ensures that this operand is a register use, so we just have
1654  // to check the tied-def operand.
1655  unsigned DefIdx = *Operands[I].TiedDefIdx;
1656  if (DefIdx >= E)
1657  return error(Operands[I].Begin,
1658  Twine("use of invalid tied-def operand index '" +
1659  Twine(DefIdx) + "'; instruction has only ") +
1660  Twine(E) + " operands");
1661  const auto &DefOperand = Operands[DefIdx].Operand;
1662  if (!DefOperand.isReg() || !DefOperand.isDef())
1663  // FIXME: add note with the def operand.
1664  return error(Operands[I].Begin,
1665  Twine("use of invalid tied-def operand index '") +
1666  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1667  " isn't a defined register");
1668  // Check that the tied-def operand wasn't tied elsewhere.
1669  for (const auto &TiedPair : TiedRegisterPairs) {
1670  if (TiedPair.first == DefIdx)
1671  return error(Operands[I].Begin,
1672  Twine("the tied-def operand #") + Twine(DefIdx) +
1673  " is already tied with another register operand");
1674  }
1675  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1676  }
1677  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1678  // indices must be less than tied max.
1679  for (const auto &TiedPair : TiedRegisterPairs)
1680  MI.tieOperands(TiedPair.first, TiedPair.second);
1681  return false;
1682 }
1683 
1684 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1685  Optional<unsigned> &TiedDefIdx,
1686  bool IsDef) {
1687  unsigned Flags = IsDef ? RegState::Define : 0;
1688  while (Token.isRegisterFlag()) {
1689  if (parseRegisterFlag(Flags))
1690  return true;
1691  }
1692  if (!Token.isRegister())
1693  return error("expected a register after register flags");
1694  Register Reg;
1695  VRegInfo *RegInfo;
1696  if (parseRegister(Reg, RegInfo))
1697  return true;
1698  lex();
1699  unsigned SubReg = 0;
1700  if (Token.is(MIToken::dot)) {
1701  if (parseSubRegisterIndex(SubReg))
1702  return true;
1704  return error("subregister index expects a virtual register");
1705  }
1706  if (Token.is(MIToken::colon)) {
1708  return error("register class specification expects a virtual register");
1709  lex();
1710  if (parseRegisterClassOrBank(*RegInfo))
1711  return true;
1712  }
1713  MachineRegisterInfo &MRI = MF.getRegInfo();
1714  if ((Flags & RegState::Define) == 0) {
1715  if (consumeIfPresent(MIToken::lparen)) {
1716  unsigned Idx;
1717  if (!parseRegisterTiedDefIndex(Idx))
1718  TiedDefIdx = Idx;
1719  else {
1720  // Try a redundant low-level type.
1721  LLT Ty;
1722  if (parseLowLevelType(Token.location(), Ty))
1723  return error("expected tied-def or low-level type after '('");
1724 
1725  if (expectAndConsume(MIToken::rparen))
1726  return true;
1727 
1728  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1729  return error("inconsistent type for generic virtual register");
1730 
1731  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1732  MRI.setType(Reg, Ty);
1733  }
1734  }
1735  } else if (consumeIfPresent(MIToken::lparen)) {
1736  // Virtual registers may have a tpe with GlobalISel.
1738  return error("unexpected type on physical register");
1739 
1740  LLT Ty;
1741  if (parseLowLevelType(Token.location(), Ty))
1742  return true;
1743 
1744  if (expectAndConsume(MIToken::rparen))
1745  return true;
1746 
1747  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1748  return error("inconsistent type for generic virtual register");
1749 
1750  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1751  MRI.setType(Reg, Ty);
1752  } else if (Register::isVirtualRegister(Reg)) {
1753  // Generic virtual registers must have a type.
1754  // If we end up here this means the type hasn't been specified and
1755  // this is bad!
1756  if (RegInfo->Kind == VRegInfo::GENERIC ||
1757  RegInfo->Kind == VRegInfo::REGBANK)
1758  return error("generic virtual registers must have a type");
1759  }
1760 
1761  if (Flags & RegState::Define) {
1762  if (Flags & RegState::Kill)
1763  return error("cannot have a killed def operand");
1764  } else {
1765  if (Flags & RegState::Dead)
1766  return error("cannot have a dead use operand");
1767  }
1768 
1770  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1771  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1772  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1773  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1774 
1775  return false;
1776 }
1777 
1778 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1779  assert(Token.is(MIToken::IntegerLiteral));
1780  const APSInt &Int = Token.integerValue();
1781  if (Int.getMinSignedBits() > 64)
1782  return error("integer literal is too large to be an immediate operand");
1783  Dest = MachineOperand::CreateImm(Int.getExtValue());
1784  lex();
1785  return false;
1786 }
1787 
1788 bool MIParser::parseTargetImmMnemonic(const unsigned OpCode,
1789  const unsigned OpIdx,
1790  MachineOperand &Dest,
1791  const MIRFormatter &MF) {
1792  assert(Token.is(MIToken::dot));
1793  auto Loc = Token.location(); // record start position
1794  size_t Len = 1; // for "."
1795  lex();
1796 
1797  // Handle the case that mnemonic starts with number.
1798  if (Token.is(MIToken::IntegerLiteral)) {
1799  Len += Token.range().size();
1800  lex();
1801  }
1802 
1803  StringRef Src;
1804  if (Token.is(MIToken::comma))
1805  Src = StringRef(Loc, Len);
1806  else {
1807  assert(Token.is(MIToken::Identifier));
1808  Src = StringRef(Loc, Len + Token.stringValue().size());
1809  }
1810  int64_t Val;
1811  if (MF.parseImmMnemonic(OpCode, OpIdx, Src, Val,
1812  [this](StringRef::iterator Loc, const Twine &Msg)
1813  -> bool { return error(Loc, Msg); }))
1814  return true;
1815 
1816  Dest = MachineOperand::CreateImm(Val);
1817  if (!Token.is(MIToken::comma))
1818  lex();
1819  return false;
1820 }
1821 
1822 static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1823  PerFunctionMIParsingState &PFS, const Constant *&C,
1824  ErrorCallbackType ErrCB) {
1825  auto Source = StringValue.str(); // The source has to be null terminated.
1826  SMDiagnostic Err;
1828  &PFS.IRSlots);
1829  if (!C)
1830  return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
1831  return false;
1832 }
1833 
1835  const Constant *&C) {
1837  Loc, StringValue, PFS, C,
1838  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1839  return error(Loc, Msg);
1840  });
1841 }
1842 
1844  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1845  return true;
1846  lex();
1847  return false;
1848 }
1849 
1850 // See LLT implemntation for bit size limits.
1851 static bool verifyScalarSize(uint64_t Size) {
1852  return Size != 0 && isUInt<16>(Size);
1853 }
1854 
1855 static bool verifyVectorElementCount(uint64_t NumElts) {
1856  return NumElts != 0 && isUInt<16>(NumElts);
1857 }
1858 
1859 static bool verifyAddrSpace(uint64_t AddrSpace) {
1860  return isUInt<24>(AddrSpace);
1861 }
1862 
1863 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1864  if (Token.range().front() == 's' || Token.range().front() == 'p') {
1865  StringRef SizeStr = Token.range().drop_front();
1866  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1867  return error("expected integers after 's'/'p' type character");
1868  }
1869 
1870  if (Token.range().front() == 's') {
1871  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1872  if (!verifyScalarSize(ScalarSize))
1873  return error("invalid size for scalar type");
1874 
1875  Ty = LLT::scalar(ScalarSize);
1876  lex();
1877  return false;
1878  } else if (Token.range().front() == 'p') {
1879  const DataLayout &DL = MF.getDataLayout();
1880  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1881  if (!verifyAddrSpace(AS))
1882  return error("invalid address space number");
1883 
1884  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1885  lex();
1886  return false;
1887  }
1888 
1889  // Now we're looking for a vector.
1890  if (Token.isNot(MIToken::less))
1891  return error(Loc,
1892  "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1893  lex();
1894 
1895  if (Token.isNot(MIToken::IntegerLiteral))
1896  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1897  uint64_t NumElements = Token.integerValue().getZExtValue();
1898  if (!verifyVectorElementCount(NumElements))
1899  return error("invalid number of vector elements");
1900 
1901  lex();
1902 
1903  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1904  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1905  lex();
1906 
1907  if (Token.range().front() != 's' && Token.range().front() != 'p')
1908  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1909  StringRef SizeStr = Token.range().drop_front();
1910  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1911  return error("expected integers after 's'/'p' type character");
1912 
1913  if (Token.range().front() == 's') {
1914  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1915  if (!verifyScalarSize(ScalarSize))
1916  return error("invalid size for scalar type");
1917  Ty = LLT::scalar(ScalarSize);
1918  } else if (Token.range().front() == 'p') {
1919  const DataLayout &DL = MF.getDataLayout();
1920  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1921  if (!verifyAddrSpace(AS))
1922  return error("invalid address space number");
1923 
1924  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1925  } else
1926  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1927  lex();
1928 
1929  if (Token.isNot(MIToken::greater))
1930  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1931  lex();
1932 
1933  Ty = LLT::fixed_vector(NumElements, Ty);
1934  return false;
1935 }
1936 
1937 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1938  assert(Token.is(MIToken::Identifier));
1939  StringRef TypeStr = Token.range();
1940  if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
1941  TypeStr.front() != 'p')
1942  return error(
1943  "a typed immediate operand should start with one of 'i', 's', or 'p'");
1944  StringRef SizeStr = Token.range().drop_front();
1945  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1946  return error("expected integers after 'i'/'s'/'p' type character");
1947 
1948  auto Loc = Token.location();
1949  lex();
1950  if (Token.isNot(MIToken::IntegerLiteral)) {
1951  if (Token.isNot(MIToken::Identifier) ||
1952  !(Token.range() == "true" || Token.range() == "false"))
1953  return error("expected an integer literal");
1954  }
1955  const Constant *C = nullptr;
1956  if (parseIRConstant(Loc, C))
1957  return true;
1958  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1959  return false;
1960 }
1961 
1962 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1963  auto Loc = Token.location();
1964  lex();
1965  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1966  Token.isNot(MIToken::HexLiteral))
1967  return error("expected a floating point literal");
1968  const Constant *C = nullptr;
1969  if (parseIRConstant(Loc, C))
1970  return true;
1971  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1972  return false;
1973 }
1974 
1975 static bool getHexUint(const MIToken &Token, APInt &Result) {
1976  assert(Token.is(MIToken::HexLiteral));
1977  StringRef S = Token.range();
1978  assert(S[0] == '0' && tolower(S[1]) == 'x');
1979  // This could be a floating point literal with a special prefix.
1980  if (!isxdigit(S[2]))
1981  return true;
1982  StringRef V = S.substr(2);
1983  APInt A(V.size()*4, V, 16);
1984 
1985  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
1986  // sure it isn't the case before constructing result.
1987  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
1988  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
1989  return false;
1990 }
1991 
1992 static bool getUnsigned(const MIToken &Token, unsigned &Result,
1993  ErrorCallbackType ErrCB) {
1994  if (Token.hasIntegerValue()) {
1996  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1997  if (Val64 == Limit)
1998  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
1999  Result = Val64;
2000  return false;
2001  }
2002  if (Token.is(MIToken::HexLiteral)) {
2003  APInt A;
2004  if (getHexUint(Token, A))
2005  return true;
2006  if (A.getBitWidth() > 32)
2007  return ErrCB(Token.location(), "expected 32-bit integer (too large)");
2008  Result = A.getZExtValue();
2009  return false;
2010  }
2011  return true;
2012 }
2013 
2014 bool MIParser::getUnsigned(unsigned &Result) {
2016  Token, Result, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2017  return error(Loc, Msg);
2018  });
2019 }
2020 
2022  assert(Token.is(MIToken::MachineBasicBlock) ||
2024  unsigned Number;
2025  if (getUnsigned(Number))
2026  return true;
2027  auto MBBInfo = PFS.MBBSlots.find(Number);
2028  if (MBBInfo == PFS.MBBSlots.end())
2029  return error(Twine("use of undefined machine basic block #") +
2030  Twine(Number));
2031  MBB = MBBInfo->second;
2032  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
2033  // we drop the <irname> from the bb.<id>.<irname> format.
2034  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
2035  return error(Twine("the name of machine basic block #") + Twine(Number) +
2036  " isn't '" + Token.stringValue() + "'");
2037  return false;
2038 }
2039 
2040 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
2042  if (parseMBBReference(MBB))
2043  return true;
2045  lex();
2046  return false;
2047 }
2048 
2049 bool MIParser::parseStackFrameIndex(int &FI) {
2050  assert(Token.is(MIToken::StackObject));
2051  unsigned ID;
2052  if (getUnsigned(ID))
2053  return true;
2054  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
2055  if (ObjectInfo == PFS.StackObjectSlots.end())
2056  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
2057  "'");
2058  StringRef Name;
2059  if (const auto *Alloca =
2060  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2061  Name = Alloca->getName();
2062  if (!Token.stringValue().empty() && Token.stringValue() != Name)
2063  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
2064  "' isn't '" + Token.stringValue() + "'");
2065  lex();
2066  FI = ObjectInfo->second;
2067  return false;
2068 }
2069 
2070 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
2071  int FI;
2072  if (parseStackFrameIndex(FI))
2073  return true;
2074  Dest = MachineOperand::CreateFI(FI);
2075  return false;
2076 }
2077 
2078 bool MIParser::parseFixedStackFrameIndex(int &FI) {
2079  assert(Token.is(MIToken::FixedStackObject));
2080  unsigned ID;
2081  if (getUnsigned(ID))
2082  return true;
2083  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
2084  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
2085  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
2086  Twine(ID) + "'");
2087  lex();
2088  FI = ObjectInfo->second;
2089  return false;
2090 }
2091 
2092 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
2093  int FI;
2094  if (parseFixedStackFrameIndex(FI))
2095  return true;
2096  Dest = MachineOperand::CreateFI(FI);
2097  return false;
2098 }
2099 
2100 static bool parseGlobalValue(const MIToken &Token,
2102  ErrorCallbackType ErrCB) {
2103  switch (Token.kind()) {
2105  const Module *M = PFS.MF.getFunction().getParent();
2106  GV = M->getNamedValue(Token.stringValue());
2107  if (!GV)
2108  return ErrCB(Token.location(), Twine("use of undefined global value '") +
2109  Token.range() + "'");
2110  break;
2111  }
2112  case MIToken::GlobalValue: {
2113  unsigned GVIdx;
2114  if (getUnsigned(Token, GVIdx, ErrCB))
2115  return true;
2116  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
2117  return ErrCB(Token.location(), Twine("use of undefined global value '@") +
2118  Twine(GVIdx) + "'");
2119  GV = PFS.IRSlots.GlobalValues[GVIdx];
2120  break;
2121  }
2122  default:
2123  llvm_unreachable("The current token should be a global value");
2124  }
2125  return false;
2126 }
2127 
2130  Token, PFS, GV,
2131  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2132  return error(Loc, Msg);
2133  });
2134 }
2135 
2136 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
2137  GlobalValue *GV = nullptr;
2138  if (parseGlobalValue(GV))
2139  return true;
2140  lex();
2141  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
2142  if (parseOperandsOffset(Dest))
2143  return true;
2144  return false;
2145 }
2146 
2147 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
2148  assert(Token.is(MIToken::ConstantPoolItem));
2149  unsigned ID;
2150  if (getUnsigned(ID))
2151  return true;
2152  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
2153  if (ConstantInfo == PFS.ConstantPoolSlots.end())
2154  return error("use of undefined constant '%const." + Twine(ID) + "'");
2155  lex();
2156  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
2157  if (parseOperandsOffset(Dest))
2158  return true;
2159  return false;
2160 }
2161 
2162 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
2163  assert(Token.is(MIToken::JumpTableIndex));
2164  unsigned ID;
2165  if (getUnsigned(ID))
2166  return true;
2167  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
2168  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
2169  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
2170  lex();
2171  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
2172  return false;
2173 }
2174 
2175 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
2176  assert(Token.is(MIToken::ExternalSymbol));
2177  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
2178  lex();
2179  Dest = MachineOperand::CreateES(Symbol);
2180  if (parseOperandsOffset(Dest))
2181  return true;
2182  return false;
2183 }
2184 
2185 bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
2186  assert(Token.is(MIToken::MCSymbol));
2187  MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
2188  lex();
2189  Dest = MachineOperand::CreateMCSymbol(Symbol);
2190  if (parseOperandsOffset(Dest))
2191  return true;
2192  return false;
2193 }
2194 
2195 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
2196  assert(Token.is(MIToken::SubRegisterIndex));
2197  StringRef Name = Token.stringValue();
2198  unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
2199  if (SubRegIndex == 0)
2200  return error(Twine("unknown subregister index '") + Name + "'");
2201  lex();
2202  Dest = MachineOperand::CreateImm(SubRegIndex);
2203  return false;
2204 }
2205 
2206 bool MIParser::parseMDNode(MDNode *&Node) {
2207  assert(Token.is(MIToken::exclaim));
2208 
2209  auto Loc = Token.location();
2210  lex();
2211  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2212  return error("expected metadata id after '!'");
2213  unsigned ID;
2214  if (getUnsigned(ID))
2215  return true;
2216  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
2217  if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
2218  NodeInfo = PFS.MachineMetadataNodes.find(ID);
2219  if (NodeInfo == PFS.MachineMetadataNodes.end())
2220  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
2221  }
2222  lex();
2223  Node = NodeInfo->second.get();
2224  return false;
2225 }
2226 
2227 bool MIParser::parseDIExpression(MDNode *&Expr) {
2228  assert(Token.is(MIToken::md_diexpr));
2229  lex();
2230 
2231  // FIXME: Share this parsing with the IL parser.
2233 
2234  if (expectAndConsume(MIToken::lparen))
2235  return true;
2236 
2237  if (Token.isNot(MIToken::rparen)) {
2238  do {
2239  if (Token.is(MIToken::Identifier)) {
2240  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
2241  lex();
2242  Elements.push_back(Op);
2243  continue;
2244  }
2245  if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) {
2246  lex();
2247  Elements.push_back(Enc);
2248  continue;
2249  }
2250  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
2251  }
2252 
2253  if (Token.isNot(MIToken::IntegerLiteral) ||
2254  Token.integerValue().isSigned())
2255  return error("expected unsigned integer");
2256 
2257  auto &U = Token.integerValue();
2258  if (U.ugt(UINT64_MAX))
2259  return error("element too large, limit is " + Twine(UINT64_MAX));
2260  Elements.push_back(U.getZExtValue());
2261  lex();
2262 
2263  } while (consumeIfPresent(MIToken::comma));
2264  }
2265 
2266  if (expectAndConsume(MIToken::rparen))
2267  return true;
2268 
2269  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
2270  return false;
2271 }
2272 
2273 bool MIParser::parseDILocation(MDNode *&Loc) {
2274  assert(Token.is(MIToken::md_dilocation));
2275  lex();
2276 
2277  bool HaveLine = false;
2278  unsigned Line = 0;
2279  unsigned Column = 0;
2280  MDNode *Scope = nullptr;
2281  MDNode *InlinedAt = nullptr;
2282  bool ImplicitCode = false;
2283 
2284  if (expectAndConsume(MIToken::lparen))
2285  return true;
2286 
2287  if (Token.isNot(MIToken::rparen)) {
2288  do {
2289  if (Token.is(MIToken::Identifier)) {
2290  if (Token.stringValue() == "line") {
2291  lex();
2292  if (expectAndConsume(MIToken::colon))
2293  return true;
2294  if (Token.isNot(MIToken::IntegerLiteral) ||
2295  Token.integerValue().isSigned())
2296  return error("expected unsigned integer");
2297  Line = Token.integerValue().getZExtValue();
2298  HaveLine = true;
2299  lex();
2300  continue;
2301  }
2302  if (Token.stringValue() == "column") {
2303  lex();
2304  if (expectAndConsume(MIToken::colon))
2305  return true;
2306  if (Token.isNot(MIToken::IntegerLiteral) ||
2307  Token.integerValue().isSigned())
2308  return error("expected unsigned integer");
2309  Column = Token.integerValue().getZExtValue();
2310  lex();
2311  continue;
2312  }
2313  if (Token.stringValue() == "scope") {
2314  lex();
2315  if (expectAndConsume(MIToken::colon))
2316  return true;
2317  if (parseMDNode(Scope))
2318  return error("expected metadata node");
2319  if (!isa<DIScope>(Scope))
2320  return error("expected DIScope node");
2321  continue;
2322  }
2323  if (Token.stringValue() == "inlinedAt") {
2324  lex();
2325  if (expectAndConsume(MIToken::colon))
2326  return true;
2327  if (Token.is(MIToken::exclaim)) {
2328  if (parseMDNode(InlinedAt))
2329  return true;
2330  } else if (Token.is(MIToken::md_dilocation)) {
2331  if (parseDILocation(InlinedAt))
2332  return true;
2333  } else
2334  return error("expected metadata node");
2335  if (!isa<DILocation>(InlinedAt))
2336  return error("expected DILocation node");
2337  continue;
2338  }
2339  if (Token.stringValue() == "isImplicitCode") {
2340  lex();
2341  if (expectAndConsume(MIToken::colon))
2342  return true;
2343  if (!Token.is(MIToken::Identifier))
2344  return error("expected true/false");
2345  // As far as I can see, we don't have any existing need for parsing
2346  // true/false in MIR yet. Do it ad-hoc until there's something else
2347  // that needs it.
2348  if (Token.stringValue() == "true")
2349  ImplicitCode = true;
2350  else if (Token.stringValue() == "false")
2351  ImplicitCode = false;
2352  else
2353  return error("expected true/false");
2354  lex();
2355  continue;
2356  }
2357  }
2358  return error(Twine("invalid DILocation argument '") +
2359  Token.stringValue() + "'");
2360  } while (consumeIfPresent(MIToken::comma));
2361  }
2362 
2363  if (expectAndConsume(MIToken::rparen))
2364  return true;
2365 
2366  if (!HaveLine)
2367  return error("DILocation requires line number");
2368  if (!Scope)
2369  return error("DILocation requires a scope");
2370 
2371  Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
2372  InlinedAt, ImplicitCode);
2373  return false;
2374 }
2375 
2376 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
2377  MDNode *Node = nullptr;
2378  if (Token.is(MIToken::exclaim)) {
2379  if (parseMDNode(Node))
2380  return true;
2381  } else if (Token.is(MIToken::md_diexpr)) {
2382  if (parseDIExpression(Node))
2383  return true;
2384  }
2385  Dest = MachineOperand::CreateMetadata(Node);
2386  return false;
2387 }
2388 
2389 bool MIParser::parseCFIOffset(int &Offset) {
2390  if (Token.isNot(MIToken::IntegerLiteral))
2391  return error("expected a cfi offset");
2392  if (Token.integerValue().getMinSignedBits() > 32)
2393  return error("expected a 32 bit integer (the cfi offset is too large)");
2394  Offset = (int)Token.integerValue().getExtValue();
2395  lex();
2396  return false;
2397 }
2398 
2399 bool MIParser::parseCFIRegister(Register &Reg) {
2400  if (Token.isNot(MIToken::NamedRegister))
2401  return error("expected a cfi register");
2402  Register LLVMReg;
2403  if (parseNamedRegister(LLVMReg))
2404  return true;
2405  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2406  assert(TRI && "Expected target register info");
2407  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
2408  if (DwarfReg < 0)
2409  return error("invalid DWARF register");
2410  Reg = (unsigned)DwarfReg;
2411  lex();
2412  return false;
2413 }
2414 
2415 bool MIParser::parseCFIAddressSpace(unsigned &AddressSpace) {
2416  if (Token.isNot(MIToken::IntegerLiteral))
2417  return error("expected a cfi address space literal");
2418  if (Token.integerValue().isSigned())
2419  return error("expected an unsigned integer (cfi address space)");
2420  AddressSpace = Token.integerValue().getZExtValue();
2421  lex();
2422  return false;
2423 }
2424 
2425 bool MIParser::parseCFIEscapeValues(std::string &Values) {
2426  do {
2427  if (Token.isNot(MIToken::HexLiteral))
2428  return error("expected a hexadecimal literal");
2429  unsigned Value;
2430  if (getUnsigned(Value))
2431  return true;
2432  if (Value > UINT8_MAX)
2433  return error("expected a 8-bit integer (too large)");
2434  Values.push_back(static_cast<uint8_t>(Value));
2435  lex();
2436  } while (consumeIfPresent(MIToken::comma));
2437  return false;
2438 }
2439 
2440 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
2441  auto Kind = Token.kind();
2442  lex();
2443  int Offset;
2444  Register Reg;
2445  unsigned AddressSpace;
2446  unsigned CFIIndex;
2447  switch (Kind) {
2449  if (parseCFIRegister(Reg))
2450  return true;
2451  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
2452  break;
2454  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2455  parseCFIOffset(Offset))
2456  return true;
2457  CFIIndex =
2458  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
2459  break;
2461  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2462  parseCFIOffset(Offset))
2463  return true;
2464  CFIIndex = MF.addFrameInst(
2465  MCCFIInstruction::createRelOffset(nullptr, Reg, Offset));
2466  break;
2468  if (parseCFIRegister(Reg))
2469  return true;
2470  CFIIndex =
2471  MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
2472  break;
2474  if (parseCFIOffset(Offset))
2475  return true;
2476  CFIIndex =
2477  MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, Offset));
2478  break;
2480  if (parseCFIOffset(Offset))
2481  return true;
2482  CFIIndex = MF.addFrameInst(
2483  MCCFIInstruction::createAdjustCfaOffset(nullptr, Offset));
2484  break;
2486  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2487  parseCFIOffset(Offset))
2488  return true;
2489  CFIIndex =
2490  MF.addFrameInst(MCCFIInstruction::cfiDefCfa(nullptr, Reg, Offset));
2491  break;
2493  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2494  parseCFIOffset(Offset) || expectAndConsume(MIToken::comma) ||
2495  parseCFIAddressSpace(AddressSpace))
2496  return true;
2497  CFIIndex = MF.addFrameInst(MCCFIInstruction::createLLVMDefAspaceCfa(
2498  nullptr, Reg, Offset, AddressSpace));
2499  break;
2501  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRememberState(nullptr));
2502  break;
2504  if (parseCFIRegister(Reg))
2505  return true;
2506  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
2507  break;
2509  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestoreState(nullptr));
2510  break;
2512  if (parseCFIRegister(Reg))
2513  return true;
2514  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
2515  break;
2516  case MIToken::kw_cfi_register: {
2517  Register Reg2;
2518  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2519  parseCFIRegister(Reg2))
2520  return true;
2521 
2522  CFIIndex =
2523  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
2524  break;
2525  }
2527  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
2528  break;
2530  CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
2531  break;
2532  case MIToken::kw_cfi_escape: {
2533  std::string Values;
2534  if (parseCFIEscapeValues(Values))
2535  return true;
2536  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
2537  break;
2538  }
2539  default:
2540  // TODO: Parse the other CFI operands.
2541  llvm_unreachable("The current token should be a cfi operand");
2542  }
2543  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
2544  return false;
2545 }
2546 
2547 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
2548  switch (Token.kind()) {
2549  case MIToken::NamedIRBlock: {
2550  BB = dyn_cast_or_null<BasicBlock>(
2551  F.getValueSymbolTable()->lookup(Token.stringValue()));
2552  if (!BB)
2553  return error(Twine("use of undefined IR block '") + Token.range() + "'");
2554  break;
2555  }
2556  case MIToken::IRBlock: {
2557  unsigned SlotNumber = 0;
2558  if (getUnsigned(SlotNumber))
2559  return true;
2560  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
2561  if (!BB)
2562  return error(Twine("use of undefined IR block '%ir-block.") +
2563  Twine(SlotNumber) + "'");
2564  break;
2565  }
2566  default:
2567  llvm_unreachable("The current token should be an IR block reference");
2568  }
2569  return false;
2570 }
2571 
2572 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
2573  assert(Token.is(MIToken::kw_blockaddress));
2574  lex();
2575  if (expectAndConsume(MIToken::lparen))
2576  return true;
2577  if (Token.isNot(MIToken::GlobalValue) &&
2578  Token.isNot(MIToken::NamedGlobalValue))
2579  return error("expected a global value");
2580  GlobalValue *GV = nullptr;
2581  if (parseGlobalValue(GV))
2582  return true;
2583  auto *F = dyn_cast<Function>(GV);
2584  if (!F)
2585  return error("expected an IR function reference");
2586  lex();
2587  if (expectAndConsume(MIToken::comma))
2588  return true;
2589  BasicBlock *BB = nullptr;
2590  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
2591  return error("expected an IR block reference");
2592  if (parseIRBlock(BB, *F))
2593  return true;
2594  lex();
2595  if (expectAndConsume(MIToken::rparen))
2596  return true;
2597  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
2598  if (parseOperandsOffset(Dest))
2599  return true;
2600  return false;
2601 }
2602 
2603 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
2604  assert(Token.is(MIToken::kw_intrinsic));
2605  lex();
2606  if (expectAndConsume(MIToken::lparen))
2607  return error("expected syntax intrinsic(@llvm.whatever)");
2608 
2609  if (Token.isNot(MIToken::NamedGlobalValue))
2610  return error("expected syntax intrinsic(@llvm.whatever)");
2611 
2612  std::string Name = std::string(Token.stringValue());
2613  lex();
2614 
2615  if (expectAndConsume(MIToken::rparen))
2616  return error("expected ')' to terminate intrinsic name");
2617 
2618  // Find out what intrinsic we're dealing with, first try the global namespace
2619  // and then the target's private intrinsics if that fails.
2620  const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo();
2622  if (ID == Intrinsic::not_intrinsic && TII)
2623  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
2624 
2626  return error("unknown intrinsic name");
2628 
2629  return false;
2630 }
2631 
2632 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
2633  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
2634  bool IsFloat = Token.is(MIToken::kw_floatpred);
2635  lex();
2636 
2637  if (expectAndConsume(MIToken::lparen))
2638  return error("expected syntax intpred(whatever) or floatpred(whatever");
2639 
2640  if (Token.isNot(MIToken::Identifier))
2641  return error("whatever");
2642 
2643  CmpInst::Predicate Pred;
2644  if (IsFloat) {
2645  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2646  .Case("false", CmpInst::FCMP_FALSE)
2647  .Case("oeq", CmpInst::FCMP_OEQ)
2648  .Case("ogt", CmpInst::FCMP_OGT)
2649  .Case("oge", CmpInst::FCMP_OGE)
2650  .Case("olt", CmpInst::FCMP_OLT)
2651  .Case("ole", CmpInst::FCMP_OLE)
2652  .Case("one", CmpInst::FCMP_ONE)
2653  .Case("ord", CmpInst::FCMP_ORD)
2654  .Case("uno", CmpInst::FCMP_UNO)
2655  .Case("ueq", CmpInst::FCMP_UEQ)
2656  .Case("ugt", CmpInst::FCMP_UGT)
2657  .Case("uge", CmpInst::FCMP_UGE)
2658  .Case("ult", CmpInst::FCMP_ULT)
2659  .Case("ule", CmpInst::FCMP_ULE)
2660  .Case("une", CmpInst::FCMP_UNE)
2661  .Case("true", CmpInst::FCMP_TRUE)
2663  if (!CmpInst::isFPPredicate(Pred))
2664  return error("invalid floating-point predicate");
2665  } else {
2666  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2667  .Case("eq", CmpInst::ICMP_EQ)
2668  .Case("ne", CmpInst::ICMP_NE)
2669  .Case("sgt", CmpInst::ICMP_SGT)
2670  .Case("sge", CmpInst::ICMP_SGE)
2671  .Case("slt", CmpInst::ICMP_SLT)
2672  .Case("sle", CmpInst::ICMP_SLE)
2673  .Case("ugt", CmpInst::ICMP_UGT)
2674  .Case("uge", CmpInst::ICMP_UGE)
2675  .Case("ult", CmpInst::ICMP_ULT)
2676  .Case("ule", CmpInst::ICMP_ULE)
2678  if (!CmpInst::isIntPredicate(Pred))
2679  return error("invalid integer predicate");
2680  }
2681 
2682  lex();
2683  Dest = MachineOperand::CreatePredicate(Pred);
2684  if (expectAndConsume(MIToken::rparen))
2685  return error("predicate should be terminated by ')'.");
2686 
2687  return false;
2688 }
2689 
2690 bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {
2691  assert(Token.is(MIToken::kw_shufflemask));
2692 
2693  lex();
2694  if (expectAndConsume(MIToken::lparen))
2695  return error("expected syntax shufflemask(<integer or undef>, ...)");
2696 
2697  SmallVector<int, 32> ShufMask;
2698  do {
2699  if (Token.is(MIToken::kw_undef)) {
2700  ShufMask.push_back(-1);
2701  } else if (Token.is(MIToken::IntegerLiteral)) {
2702  const APSInt &Int = Token.integerValue();
2703  ShufMask.push_back(Int.getExtValue());
2704  } else
2705  return error("expected integer constant");
2706 
2707  lex();
2708  } while (consumeIfPresent(MIToken::comma));
2709 
2710  if (expectAndConsume(MIToken::rparen))
2711  return error("shufflemask should be terminated by ')'.");
2712 
2713  ArrayRef<int> MaskAlloc = MF.allocateShuffleMask(ShufMask);
2714  Dest = MachineOperand::CreateShuffleMask(MaskAlloc);
2715  return false;
2716 }
2717 
2718 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
2719  assert(Token.is(MIToken::kw_target_index));
2720  lex();
2721  if (expectAndConsume(MIToken::lparen))
2722  return true;
2723  if (Token.isNot(MIToken::Identifier))
2724  return error("expected the name of the target index");
2725  int Index = 0;
2726  if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2727  return error("use of undefined target index '" + Token.stringValue() + "'");
2728  lex();
2729  if (expectAndConsume(MIToken::rparen))
2730  return true;
2731  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
2732  if (parseOperandsOffset(Dest))
2733  return true;
2734  return false;
2735 }
2736 
2737 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
2738  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2739  lex();
2740  if (expectAndConsume(MIToken::lparen))
2741  return true;
2742 
2743  uint32_t *Mask = MF.allocateRegMask();
2744  do {
2745  if (Token.isNot(MIToken::rparen)) {
2746  if (Token.isNot(MIToken::NamedRegister))
2747  return error("expected a named register");
2748  Register Reg;
2749  if (parseNamedRegister(Reg))
2750  return true;
2751  lex();
2752  Mask[Reg / 32] |= 1U << (Reg % 32);
2753  }
2754 
2755  // TODO: Report an error if the same register is used more than once.
2756  } while (consumeIfPresent(MIToken::comma));
2757 
2758  if (expectAndConsume(MIToken::rparen))
2759  return true;
2761  return false;
2762 }
2763 
2764 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
2765  assert(Token.is(MIToken::kw_liveout));
2766  uint32_t *Mask = MF.allocateRegMask();
2767  lex();
2768  if (expectAndConsume(MIToken::lparen))
2769  return true;
2770  while (true) {
2771  if (Token.isNot(MIToken::NamedRegister))
2772  return error("expected a named register");
2773  Register Reg;
2774  if (parseNamedRegister(Reg))
2775  return true;
2776  lex();
2777  Mask[Reg / 32] |= 1U << (Reg % 32);
2778  // TODO: Report an error if the same register is used more than once.
2779  if (Token.isNot(MIToken::comma))
2780  break;
2781  lex();
2782  }
2783  if (expectAndConsume(MIToken::rparen))
2784  return true;
2786  return false;
2787 }
2788 
2789 bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
2790  MachineOperand &Dest,
2791  Optional<unsigned> &TiedDefIdx) {
2792  switch (Token.kind()) {
2793  case MIToken::kw_implicit:
2795  case MIToken::kw_def:
2796  case MIToken::kw_dead:
2797  case MIToken::kw_killed:
2798  case MIToken::kw_undef:
2799  case MIToken::kw_internal:
2801  case MIToken::kw_debug_use:
2802  case MIToken::kw_renamable:
2803  case MIToken::underscore:
2807  return parseRegisterOperand(Dest, TiedDefIdx);
2809  return parseImmediateOperand(Dest);
2810  case MIToken::kw_half:
2811  case MIToken::kw_float:
2812  case MIToken::kw_double:
2813  case MIToken::kw_x86_fp80:
2814  case MIToken::kw_fp128:
2815  case MIToken::kw_ppc_fp128:
2816  return parseFPImmediateOperand(Dest);
2818  return parseMBBOperand(Dest);
2819  case MIToken::StackObject:
2820  return parseStackObjectOperand(Dest);
2822  return parseFixedStackObjectOperand(Dest);
2823  case MIToken::GlobalValue:
2825  return parseGlobalAddressOperand(Dest);
2827  return parseConstantPoolIndexOperand(Dest);
2829  return parseJumpTableIndexOperand(Dest);
2831  return parseExternalSymbolOperand(Dest);
2832  case MIToken::MCSymbol:
2833  return parseMCSymbolOperand(Dest);
2835  return parseSubRegisterIndexOperand(Dest);
2836  case MIToken::md_diexpr:
2837  case MIToken::exclaim:
2838  return parseMetadataOperand(Dest);
2855  return parseCFIOperand(Dest);
2857  return parseBlockAddressOperand(Dest);
2858  case MIToken::kw_intrinsic:
2859  return parseIntrinsicOperand(Dest);
2861  return parseTargetIndexOperand(Dest);
2862  case MIToken::kw_liveout:
2863  return parseLiveoutRegisterMaskOperand(Dest);
2864  case MIToken::kw_floatpred:
2865  case MIToken::kw_intpred:
2866  return parsePredicateOperand(Dest);
2868  return parseShuffleMaskOperand(Dest);
2869  case MIToken::Error:
2870  return true;
2871  case MIToken::Identifier:
2872  if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2873  Dest = MachineOperand::CreateRegMask(RegMask);
2874  lex();
2875  break;
2876  } else if (Token.stringValue() == "CustomRegMask") {
2877  return parseCustomRegisterMaskOperand(Dest);
2878  } else
2879  return parseTypedImmediateOperand(Dest);
2880  case MIToken::dot: {
2881  const auto *TII = MF.getSubtarget().getInstrInfo();
2882  if (const auto *Formatter = TII->getMIRFormatter()) {
2883  return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
2884  }
2885  [[fallthrough]];
2886  }
2887  default:
2888  // FIXME: Parse the MCSymbol machine operand.
2889  return error("expected a machine operand");
2890  }
2891  return false;
2892 }
2893 
2894 bool MIParser::parseMachineOperandAndTargetFlags(
2895  const unsigned OpCode, const unsigned OpIdx, MachineOperand &Dest,
2896  Optional<unsigned> &TiedDefIdx) {
2897  unsigned TF = 0;
2898  bool HasTargetFlags = false;
2899  if (Token.is(MIToken::kw_target_flags)) {
2900  HasTargetFlags = true;
2901  lex();
2902  if (expectAndConsume(MIToken::lparen))
2903  return true;
2904  if (Token.isNot(MIToken::Identifier))
2905  return error("expected the name of the target flag");
2906  if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2907  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2908  return error("use of undefined target flag '" + Token.stringValue() +
2909  "'");
2910  }
2911  lex();
2912  while (Token.is(MIToken::comma)) {
2913  lex();
2914  if (Token.isNot(MIToken::Identifier))
2915  return error("expected the name of the target flag");
2916  unsigned BitFlag = 0;
2917  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2918  return error("use of undefined target flag '" + Token.stringValue() +
2919  "'");
2920  // TODO: Report an error when using a duplicate bit target flag.
2921  TF |= BitFlag;
2922  lex();
2923  }
2924  if (expectAndConsume(MIToken::rparen))
2925  return true;
2926  }
2927  auto Loc = Token.location();
2928  if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
2929  return true;
2930  if (!HasTargetFlags)
2931  return false;
2932  if (Dest.isReg())
2933  return error(Loc, "register operands can't have target flags");
2934  Dest.setTargetFlags(TF);
2935  return false;
2936 }
2937 
2938 bool MIParser::parseOffset(int64_t &Offset) {
2939  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2940  return false;
2941  StringRef Sign = Token.range();
2942  bool IsNegative = Token.is(MIToken::minus);
2943  lex();
2944  if (Token.isNot(MIToken::IntegerLiteral))
2945  return error("expected an integer literal after '" + Sign + "'");
2946  if (Token.integerValue().getMinSignedBits() > 64)
2947  return error("expected 64-bit integer (too large)");
2948  Offset = Token.integerValue().getExtValue();
2949  if (IsNegative)
2950  Offset = -Offset;
2951  lex();
2952  return false;
2953 }
2954 
2955 bool MIParser::parseIRBlockAddressTaken(BasicBlock *&BB) {
2957  lex();
2958  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
2959  return error("expected basic block after 'ir_block_address_taken'");
2960 
2961  if (parseIRBlock(BB, MF.getFunction()))
2962  return true;
2963 
2964  lex();
2965  return false;
2966 }
2967 
2968 bool MIParser::parseAlignment(uint64_t &Alignment) {
2969  assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
2970  lex();
2971  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2972  return error("expected an integer literal after 'align'");
2973  if (getUint64(Alignment))
2974  return true;
2975  lex();
2976 
2977  if (!isPowerOf2_64(Alignment))
2978  return error("expected a power-of-2 literal after 'align'");
2979 
2980  return false;
2981 }
2982 
2983 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2984  assert(Token.is(MIToken::kw_addrspace));
2985  lex();
2986  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2987  return error("expected an integer literal after 'addrspace'");
2988  if (getUnsigned(Addrspace))
2989  return true;
2990  lex();
2991  return false;
2992 }
2993 
2994 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2995  int64_t Offset = 0;
2996  if (parseOffset(Offset))
2997  return true;
2998  Op.setOffset(Offset);
2999  return false;
3000 }
3001 
3002 static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS,
3003  const Value *&V, ErrorCallbackType ErrCB) {
3004  switch (Token.kind()) {
3005  case MIToken::NamedIRValue: {
3006  V = PFS.MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
3007  break;
3008  }
3009  case MIToken::IRValue: {
3010  unsigned SlotNumber = 0;
3011  if (getUnsigned(Token, SlotNumber, ErrCB))
3012  return true;
3013  V = PFS.getIRValue(SlotNumber);
3014  break;
3015  }
3017  case MIToken::GlobalValue: {
3018  GlobalValue *GV = nullptr;
3019  if (parseGlobalValue(Token, PFS, GV, ErrCB))
3020  return true;
3021  V = GV;
3022  break;
3023  }
3024  case MIToken::QuotedIRValue: {
3025  const Constant *C = nullptr;
3026  if (parseIRConstant(Token.location(), Token.stringValue(), PFS, C, ErrCB))
3027  return true;
3028  V = C;
3029  break;
3030  }
3032  V = nullptr;
3033  return false;
3034  default:
3035  llvm_unreachable("The current token should be an IR block reference");
3036  }
3037  if (!V)
3038  return ErrCB(Token.location(), Twine("use of undefined IR value '") + Token.range() + "'");
3039  return false;
3040 }
3041 
3042 bool MIParser::parseIRValue(const Value *&V) {
3044  Token, PFS, V, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
3045  return error(Loc, Msg);
3046  });
3047 }
3048 
3049 bool MIParser::getUint64(uint64_t &Result) {
3050  if (Token.hasIntegerValue()) {
3051  if (Token.integerValue().getActiveBits() > 64)
3052  return error("expected 64-bit integer (too large)");
3053  Result = Token.integerValue().getZExtValue();
3054  return false;
3055  }
3056  if (Token.is(MIToken::HexLiteral)) {
3057  APInt A;
3058  if (getHexUint(A))
3059  return true;
3060  if (A.getBitWidth() > 64)
3061  return error("expected 64-bit integer (too large)");
3062  Result = A.getZExtValue();
3063  return false;
3064  }
3065  return true;
3066 }
3067 
3068 bool MIParser::getHexUint(APInt &Result) {
3069  return ::getHexUint(Token, Result);
3070 }
3071 
3072 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
3073  const auto OldFlags = Flags;
3074  switch (Token.kind()) {
3075  case MIToken::kw_volatile:
3077  break;
3080  break;
3083  break;
3084  case MIToken::kw_invariant:
3086  break;
3087  case MIToken::StringConstant: {
3089  if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
3090  return error("use of undefined target MMO flag '" + Token.stringValue() +
3091  "'");
3092  Flags |= TF;
3093  break;
3094  }
3095  default:
3096  llvm_unreachable("The current token should be a memory operand flag");
3097  }
3098  if (OldFlags == Flags)
3099  // We know that the same flag is specified more than once when the flags
3100  // weren't modified.
3101  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
3102  lex();
3103  return false;
3104 }
3105 
3106 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
3107  switch (Token.kind()) {
3108  case MIToken::kw_stack:
3109  PSV = MF.getPSVManager().getStack();
3110  break;
3111  case MIToken::kw_got:
3112  PSV = MF.getPSVManager().getGOT();
3113  break;
3115  PSV = MF.getPSVManager().getJumpTable();
3116  break;
3118  PSV = MF.getPSVManager().getConstantPool();
3119  break;
3121  int FI;
3122  if (parseFixedStackFrameIndex(FI))
3123  return true;
3124  PSV = MF.getPSVManager().getFixedStack(FI);
3125  // The token was already consumed, so use return here instead of break.
3126  return false;
3127  }
3128  case MIToken::StackObject: {
3129  int FI;
3130  if (parseStackFrameIndex(FI))
3131  return true;
3132  PSV = MF.getPSVManager().getFixedStack(FI);
3133  // The token was already consumed, so use return here instead of break.
3134  return false;
3135  }
3137  lex();
3138  switch (Token.kind()) {
3139  case MIToken::GlobalValue:
3141  GlobalValue *GV = nullptr;
3142  if (parseGlobalValue(GV))
3143  return true;
3144  PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
3145  break;
3146  }
3148  PSV = MF.getPSVManager().getExternalSymbolCallEntry(
3149  MF.createExternalSymbolName(Token.stringValue()));
3150  break;
3151  default:
3152  return error(
3153  "expected a global value or an external symbol after 'call-entry'");
3154  }
3155  break;
3156  case MIToken::kw_custom: {
3157  lex();
3158  const auto *TII = MF.getSubtarget().getInstrInfo();
3159  if (const auto *Formatter = TII->getMIRFormatter()) {
3160  if (Formatter->parseCustomPseudoSourceValue(
3161  Token.stringValue(), MF, PFS, PSV,
3162  [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
3163  return error(Loc, Msg);
3164  }))
3165  return true;
3166  } else
3167  return error("unable to parse target custom pseudo source value");
3168  break;
3169  }
3170  default:
3171  llvm_unreachable("The current token should be pseudo source value");
3172  }
3173  lex();
3174  return false;
3175 }
3176 
3177 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
3178  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
3179  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
3180  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
3181  Token.is(MIToken::kw_call_entry) || Token.is(MIToken::kw_custom)) {
3182  const PseudoSourceValue *PSV = nullptr;
3183  if (parseMemoryPseudoSourceValue(PSV))
3184  return true;
3185  int64_t Offset = 0;
3186  if (parseOffset(Offset))
3187  return true;
3188  Dest = MachinePointerInfo(PSV, Offset);
3189  return false;
3190  }
3191  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
3192  Token.isNot(MIToken::GlobalValue) &&
3193  Token.isNot(MIToken::NamedGlobalValue) &&
3194  Token.isNot(MIToken::QuotedIRValue) &&
3195  Token.isNot(MIToken::kw_unknown_address))
3196  return error("expected an IR value reference");
3197  const Value *V = nullptr;
3198  if (parseIRValue(V))
3199  return true;
3200  if (V && !V->getType()->isPointerTy())
3201  return error("expected a pointer IR value");
3202  lex();
3203  int64_t Offset = 0;
3204  if (parseOffset(Offset))
3205  return true;
3206  Dest = MachinePointerInfo(V, Offset);
3207  return false;
3208 }
3209 
3210 bool MIParser::parseOptionalScope(LLVMContext &Context,
3211  SyncScope::ID &SSID) {
3212  SSID = SyncScope::System;
3213  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
3214  lex();
3215  if (expectAndConsume(MIToken::lparen))
3216  return error("expected '(' in syncscope");
3217 
3218  std::string SSN;
3219  if (parseStringConstant(SSN))
3220  return true;
3221 
3222  SSID = Context.getOrInsertSyncScopeID(SSN);
3223  if (expectAndConsume(MIToken::rparen))
3224  return error("expected ')' in syncscope");
3225  }
3226 
3227  return false;
3228 }
3229 
3230 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
3231  Order = AtomicOrdering::NotAtomic;
3232  if (Token.isNot(MIToken::Identifier))
3233  return false;
3234 
3235  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
3236  .Case("unordered", AtomicOrdering::Unordered)
3237  .Case("monotonic", AtomicOrdering::Monotonic)
3238  .Case("acquire", AtomicOrdering::Acquire)
3239  .Case("release", AtomicOrdering::Release)
3243 
3244  if (Order != AtomicOrdering::NotAtomic) {
3245  lex();
3246  return false;
3247  }
3248 
3249  return error("expected an atomic scope, ordering or a size specification");
3250 }
3251 
3252 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
3253  if (expectAndConsume(MIToken::lparen))
3254  return true;
3256  while (Token.isMemoryOperandFlag()) {
3257  if (parseMemoryOperandFlag(Flags))
3258  return true;
3259  }
3260  if (Token.isNot(MIToken::Identifier) ||
3261  (Token.stringValue() != "load" && Token.stringValue() != "store"))
3262  return error("expected 'load' or 'store' memory operation");
3263  if (Token.stringValue() == "load")
3265  else
3267  lex();
3268 
3269  // Optional 'store' for operands that both load and store.
3270  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
3272  lex();
3273  }
3274 
3275  // Optional synchronization scope.
3276  SyncScope::ID SSID;
3277  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3278  return true;
3279 
3280  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
3281  AtomicOrdering Order, FailureOrder;
3282  if (parseOptionalAtomicOrdering(Order))
3283  return true;
3284 
3285  if (parseOptionalAtomicOrdering(FailureOrder))
3286  return true;
3287 
3288  LLT MemoryType;
3289  if (Token.isNot(MIToken::IntegerLiteral) &&
3290  Token.isNot(MIToken::kw_unknown_size) &&
3291  Token.isNot(MIToken::lparen))
3292  return error("expected memory LLT, the size integer literal or 'unknown-size' after "
3293  "memory operation");
3294 
3296  if (Token.is(MIToken::IntegerLiteral)) {
3297  if (getUint64(Size))
3298  return true;
3299 
3300  // Convert from bytes to bits for storage.
3301  MemoryType = LLT::scalar(8 * Size);
3302  lex();
3303  } else if (Token.is(MIToken::kw_unknown_size)) {
3305  lex();
3306  } else {
3307  if (expectAndConsume(MIToken::lparen))
3308  return true;
3309  if (parseLowLevelType(Token.location(), MemoryType))
3310  return true;
3311  if (expectAndConsume(MIToken::rparen))
3312  return true;
3313 
3314  Size = MemoryType.getSizeInBytes();
3315  }
3316 
3318  if (Token.is(MIToken::Identifier)) {
3319  const char *Word =
3321  (Flags & MachineMemOperand::MOStore))
3322  ? "on"
3323  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
3324  if (Token.stringValue() != Word)
3325  return error(Twine("expected '") + Word + "'");
3326  lex();
3327 
3328  if (parseMachinePointerInfo(Ptr))
3329  return true;
3330  }
3331  uint64_t BaseAlignment =
3333  AAMDNodes AAInfo;
3334  MDNode *Range = nullptr;
3335  while (consumeIfPresent(MIToken::comma)) {
3336  switch (Token.kind()) {
3337  case MIToken::kw_align: {
3338  // align is printed if it is different than size.
3339  uint64_t Alignment;
3340  if (parseAlignment(Alignment))
3341  return true;
3342  if (Ptr.Offset & (Alignment - 1)) {
3343  // MachineMemOperand::getAlign never returns a value greater than the
3344  // alignment of offset, so this just guards against hand-written MIR
3345  // that specifies a large "align" value when it should probably use
3346  // "basealign" instead.
3347  return error("specified alignment is more aligned than offset");
3348  }
3349  BaseAlignment = Alignment;
3350  break;
3351  }
3352  case MIToken::kw_basealign:
3353  // basealign is printed if it is different than align.
3354  if (parseAlignment(BaseAlignment))
3355  return true;
3356  break;
3357  case MIToken::kw_addrspace:
3358  if (parseAddrspace(Ptr.AddrSpace))
3359  return true;
3360  break;
3361  case MIToken::md_tbaa:
3362  lex();
3363  if (parseMDNode(AAInfo.TBAA))
3364  return true;
3365  break;
3367  lex();
3368  if (parseMDNode(AAInfo.Scope))
3369  return true;
3370  break;
3371  case MIToken::md_noalias:
3372  lex();
3373  if (parseMDNode(AAInfo.NoAlias))
3374  return true;
3375  break;
3376  case MIToken::md_range:
3377  lex();
3378  if (parseMDNode(Range))
3379  return true;
3380  break;
3381  // TODO: Report an error on duplicate metadata nodes.
3382  default:
3383  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
3384  "'!noalias' or '!range'");
3385  }
3386  }
3387  if (expectAndConsume(MIToken::rparen))
3388  return true;
3389  Dest = MF.getMachineMemOperand(Ptr, Flags, MemoryType, Align(BaseAlignment),
3390  AAInfo, Range, SSID, Order, FailureOrder);
3391  return false;
3392 }
3393 
3394 bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
3395  assert((Token.is(MIToken::kw_pre_instr_symbol) ||
3396  Token.is(MIToken::kw_post_instr_symbol)) &&
3397  "Invalid token for a pre- post-instruction symbol!");
3398  lex();
3399  if (Token.isNot(MIToken::MCSymbol))
3400  return error("expected a symbol after 'pre-instr-symbol'");
3401  Symbol = getOrCreateMCSymbol(Token.stringValue());
3402  lex();
3403  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3404  Token.is(MIToken::lbrace))
3405  return false;
3406  if (Token.isNot(MIToken::comma))
3407  return error("expected ',' before the next machine operand");
3408  lex();
3409  return false;
3410 }
3411 
3412 bool MIParser::parseHeapAllocMarker(MDNode *&Node) {
3414  "Invalid token for a heap alloc marker!");
3415  lex();
3416  parseMDNode(Node);
3417  if (!Node)
3418  return error("expected a MDNode after 'heap-alloc-marker'");
3419  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3420  Token.is(MIToken::lbrace))
3421  return false;
3422  if (Token.isNot(MIToken::comma))
3423  return error("expected ',' before the next machine operand");
3424  lex();
3425  return false;
3426 }
3427 
3428 bool MIParser::parsePCSections(MDNode *&Node) {
3429  assert(Token.is(MIToken::kw_pcsections) &&
3430  "Invalid token for a PC sections!");
3431  lex();
3432  parseMDNode(Node);
3433  if (!Node)
3434  return error("expected a MDNode after 'pcsections'");
3435  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
3436  Token.is(MIToken::lbrace))
3437  return false;
3438  if (Token.isNot(MIToken::comma))
3439  return error("expected ',' before the next machine operand");
3440  lex();
3441  return false;
3442 }
3443 
3445  const Function &F,
3446  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3447  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
3448  MST.incorporateFunction(F);
3449  for (const auto &BB : F) {
3450  if (BB.hasName())
3451  continue;
3452  int Slot = MST.getLocalSlot(&BB);
3453  if (Slot == -1)
3454  continue;
3455  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
3456  }
3457 }
3458 
3460  unsigned Slot,
3461  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
3462  return Slots2BasicBlocks.lookup(Slot);
3463 }
3464 
3465 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
3466  if (Slots2BasicBlocks.empty())
3467  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
3468  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
3469 }
3470 
3471 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
3472  if (&F == &MF.getFunction())
3473  return getIRBlock(Slot);
3474  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
3475  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
3476  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
3477 }
3478 
3479 MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
3480  // FIXME: Currently we can't recognize temporary or local symbols and call all
3481  // of the appropriate forms to create them. However, this handles basic cases
3482  // well as most of the special aspects are recognized by a prefix on their
3483  // name, and the input names should already be unique. For test cases, keeping
3484  // the symbol name out of the symbol table isn't terribly important.
3485  return MF.getContext().getOrCreateSymbol(Name);
3486 }
3487 
3488 bool MIParser::parseStringConstant(std::string &Result) {
3489  if (Token.isNot(MIToken::StringConstant))
3490  return error("expected string constant");
3491  Result = std::string(Token.stringValue());
3492  lex();
3493  return false;
3494 }
3495 
3497  StringRef Src,
3498  SMDiagnostic &Error) {
3499  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
3500 }
3501 
3503  StringRef Src, SMDiagnostic &Error) {
3504  return MIParser(PFS, Error, Src).parseBasicBlocks();
3505 }
3506 
3509  SMDiagnostic &Error) {
3510  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
3511 }
3512 
3514  Register &Reg, StringRef Src,
3515  SMDiagnostic &Error) {
3516  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
3517 }
3518 
3520  Register &Reg, StringRef Src,
3521  SMDiagnostic &Error) {
3522  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
3523 }
3524 
3526  VRegInfo *&Info, StringRef Src,
3527  SMDiagnostic &Error) {
3528  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
3529 }
3530 
3532  int &FI, StringRef Src,
3533  SMDiagnostic &Error) {
3534  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
3535 }
3536 
3538  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
3539  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
3540 }
3541 
3543  SMRange SrcRange, SMDiagnostic &Error) {
3544  return MIParser(PFS, Error, Src, SrcRange).parseMachineMetadata();
3545 }
3546 
3548  PerFunctionMIParsingState &PFS, const Value *&V,
3549  ErrorCallbackType ErrorCallback) {
3550  MIToken Token;
3551  Src = lexMIToken(Src, Token, [&](StringRef::iterator Loc, const Twine &Msg) {
3552  ErrorCallback(Loc, Msg);
3553  });
3554  V = nullptr;
3555 
3556  return ::parseIRValue(Token, PFS, V, ErrorCallback);
3557 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:77
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:69
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm::MachineOperand::CreateCPI
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:837
MemoryBuffer.h
llvm::CmpInst::FCMP_ULE
@ FCMP_ULE
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:734
llvm::MachineOperand::CreateJTI
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Definition: MachineOperand.h:853
llvm::MIToken::kw_float
@ kw_float
Definition: MILexer.h:98
llvm::AtomicOrdering::AcquireRelease
@ AcquireRelease
llvm::MIToken::NamedRegister
@ NamedRegister
Definition: MILexer.h:149
llvm::MIToken::kw_cfi_offset
@ kw_cfi_offset
Definition: MILexer.h:79
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:108
ErrorCallbackType
function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
Definition: MIParser.cpp:610
MachineInstr.h
llvm::ModuleSlotTracker::getLocalSlot
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:875
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::MCRegisterInfo::getName
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
Definition: MCRegisterInfo.h:485
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::CmpInst::ICMP_EQ
@ ICMP_EQ
equal
Definition: InstrTypes.h:740
llvm::MachineRegisterInfo::createIncompleteVirtualRegister
Register createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
Definition: MachineRegisterInfo.cpp:144
Optional.h
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::MachineOperand::CreateReg
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition: MachineOperand.h:800
getIRBlockFromSlot
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3459
llvm::MIToken::kw_exact
@ kw_exact
Definition: MILexer.h:74
llvm::MIToken::kw_unknown_size
@ kw_unknown_size
Definition: MILexer.h:131
llvm::MIToken::colon
@ colon
Definition: MILexer.h:37
Metadata.h
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:719
llvm::MIToken::FixedStackObject
@ FixedStackObject
Definition: MILexer.h:154
llvm::MIToken::kw_nsz
@ kw_nsz
Definition: MILexer.h:67
llvm::Type::isPointerTy
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:237
llvm::MIToken::GlobalValue
@ GlobalValue
Definition: MILexer.h:156
llvm::MIToken::VirtualRegister
@ VirtualRegister
Definition: MILexer.h:165
AtomicOrdering.h
DebugInfoMetadata.h
MCInstrDesc.h
llvm::MIToken::kw_cfi_restore_state
@ kw_cfi_restore_state
Definition: MILexer.h:90
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::StringRef::front
char front() const
front - Get the first character in the string.
Definition: StringRef.h:140
llvm::Function
Definition: Function.h:60
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::lookup
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
Definition: DenseMap.h:197
llvm::MIToken::md_noalias
@ md_noalias
Definition: MILexer.h:142
StringRef.h
llvm::MIToken::Error
@ Error
Definition: MILexer.h:30
llvm::MIToken::kw_call_entry
@ kw_call_entry
Definition: MILexer.h:114
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:95
llvm::VRegInfo::RegBank
const RegisterBank * RegBank
Definition: MIParser.h:44
llvm::PerTargetMIParsingState::getRegBank
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
Definition: MIParser.cpp:309
llvm::MIToken::kw_early_clobber
@ kw_early_clobber
Definition: MILexer.h:59
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:149
llvm::MIToken::integerValue
const APSInt & integerValue() const
Definition: MILexer.h:231
llvm::TargetRegisterInfo::getRegMaskNames
virtual ArrayRef< const char * > getRegMaskNames() const =0
llvm::StringRef::npos
static constexpr size_t npos
Definition: StringRef.h:52
llvm::PerTargetMIParsingState
Definition: MIParser.h:53
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1199
llvm::MIToken::kw_cfi_def_cfa
@ kw_cfi_def_cfa
Definition: MILexer.h:85
llvm::CmpInst::FCMP_ONE
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:727
mapValueToSlot
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
Definition: MIParser.cpp:344
llvm::VRegInfo::Kind
enum llvm::VRegInfo::uint8_t Kind
llvm::RegisterBankInfo::getRegBank
RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
Definition: RegisterBankInfo.h:431
ErrorHandling.h
llvm::MCRegisterInfo::getDwarfRegNum
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
Definition: MCRegisterInfo.cpp:68
llvm::PerFunctionMIParsingState::PerFunctionMIParsingState
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
Definition: MIParser.cpp:316
llvm::MCRegisterInfo::getNumRegs
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Definition: MCRegisterInfo.h:491
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::MIToken::kw_double
@ kw_double
Definition: MILexer.h:99
llvm::MachineMemOperand::MOInvariant
@ MOInvariant
The memory access always returns the same value (or traps).
Definition: MachineMemOperand.h:144
RegisterBankInfo.h
llvm::CmpInst::ICMP_NE
@ ICMP_NE
not equal
Definition: InstrTypes.h:741
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:44
llvm::AtomicOrdering::SequentiallyConsistent
@ SequentiallyConsistent
llvm::MIToken::kw_post_instr_symbol
@ kw_post_instr_symbol
Definition: MILexer.h:126
MachineBasicBlock.h
llvm::lltok::APSInt
@ APSInt
Definition: LLToken.h:460
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:127
llvm::MIToken::kw_afn
@ kw_afn
Definition: MILexer.h:70
llvm::MemOp
Definition: TargetLowering.h:111
APInt.h
llvm::MIToken::NamedGlobalValue
@ NamedGlobalValue
Definition: MILexer.h:155
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:237
llvm::CmpInst::ICMP_SGT
@ ICMP_SGT
signed greater than
Definition: InstrTypes.h:746
llvm::AAMDNodes
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:652
llvm::MCCFIInstruction::createRelOffset
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
Definition: MCDwarf.h:578
llvm::StringMap::end
iterator end()
Definition: StringMap.h:204
llvm::HexagonInstrInfo::getSerializableBitmaskMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
Definition: HexagonInstrInfo.cpp:2084
DenseMap.h
llvm::MachineOperand::CreateMetadata
static MachineOperand CreateMetadata(const MDNode *Meta)
Definition: MachineOperand.h:907
Module.h
llvm::parseMachineInstructions
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:3502
llvm::MachineOperand::CreateCFIIndex
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
Definition: MachineOperand.h:922
llvm::MIToken::kw_renamable
@ kw_renamable
Definition: MILexer.h:61
TargetInstrInfo.h
llvm::MachineInstr::FmAfn
@ FmAfn
Definition: MachineInstr.h:100
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::MIToken::underscore
@ underscore
Definition: MILexer.h:36
llvm::MIToken::kw_nofpexcept
@ kw_nofpexcept
Definition: MILexer.h:75
getHexUint
static bool getHexUint(const MIToken &Token, APInt &Result)
Definition: MIParser.cpp:1975
llvm::VRegInfo::REGBANK
@ REGBANK
Definition: MIParser.h:39
llvm::MachineMemOperand::MODereferenceable
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
Definition: MachineMemOperand.h:142
llvm::LLT::isValid
bool isValid() const
Definition: LowLevelTypeImpl.h:116
llvm::MIToken::kw_frame_destroy
@ kw_frame_destroy
Definition: MILexer.h:64
error
#define error(X)
Definition: SymbolRecordMapping.cpp:14
llvm::PerFunctionMIParsingState::VRegInfosNamed
StringMap< VRegInfo * > VRegInfosNamed
Definition: MIParser.h:174
llvm::HexagonInstrInfo::getSerializableDirectMachineOperandTargetFlags
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
Definition: HexagonInstrInfo.cpp:2065
llvm::MIToken::kw_inlineasm_br_indirect_target
@ kw_inlineasm_br_indirect_target
Definition: MILexer.h:118
llvm::Optional< unsigned >
T
#define T
Definition: Mips16ISelLowering.cpp:341
printImplicitRegisterFlag
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:1366
llvm::MIToken::kw_ninf
@ kw_ninf
Definition: MILexer.h:66
llvm::CmpInst::ICMP_SLE
@ ICMP_SLE
signed less or equal
Definition: InstrTypes.h:749
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
llvm::MIToken::kw_addrspace
@ kw_addrspace
Definition: MILexer.h:109
llvm::PerFunctionMIParsingState::getVRegInfoNamed
VRegInfo & getVRegInfoNamed(StringRef RegName)
Definition: MIParser.cpp:332
llvm::Intrinsic::not_intrinsic
@ not_intrinsic
Definition: Intrinsics.h:45
llvm::MIToken::kw_cfi_register
@ kw_cfi_register
Definition: MILexer.h:87
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:861
llvm::PowerOf2Ceil
uint64_t PowerOf2Ceil(uint64_t A)
Returns the power of two which is greater than or equal to the given value.
Definition: MathExtras.h:630
llvm::StringMap::find
iterator find(StringRef Key)
Definition: StringMap.h:217
llvm::MBBSectionID
Definition: MachineBasicBlock.h:51
llvm::AAMDNodes::Scope
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:675
llvm::minidump::MemoryType
MemoryType
Definition: Minidump.h:98
llvm::PerTargetMIParsingState::getMMOTargetFlag
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.
Definition: MIParser.cpp:262
llvm::VRegInfo::RC
const TargetRegisterClass * RC
Definition: MIParser.h:43
llvm::CmpInst::FCMP_OGT
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:723
llvm::MCCFIInstruction::createSameValue
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:615
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:44
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::BasicBlockSection::List
@ List
llvm::MIToken::range
StringRef range() const
Definition: MILexer.h:226
llvm::MCRegisterInfo::getNumSubRegIndices
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
Definition: MCRegisterInfo.h:498
llvm::MIToken::kw_internal
@ kw_internal
Definition: MILexer.h:58
llvm::MemoryBuffer
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:51
llvm::MIToken
A token produced by the machine instruction lexer.
Definition: MILexer.h:26
llvm::MCCFIInstruction::createLLVMDefAspaceCfa
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int Offset, unsigned AddressSpace)
.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...
Definition: MCDwarf.h:561
llvm::MDNode::get
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1400
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:546
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:86
llvm::MachineOperand::CreateES
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
Definition: MachineOperand.h:867
llvm::AtomicOrdering::Monotonic
@ Monotonic
llvm::parseMachineBasicBlockDefinitions
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:3496
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::PerTargetMIParsingState::parseInstrName
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
Definition: MIParser.cpp:140
llvm::PerFunctionMIParsingState::Allocator
BumpPtrAllocator Allocator
Definition: MIParser.h:163
llvm::MIToken::kw_cfi_def_cfa_register
@ kw_cfi_def_cfa_register
Definition: MILexer.h:81
llvm::TargetIntrinsicInfo
TargetIntrinsicInfo - Interface to description of machine instruction set.
Definition: TargetIntrinsicInfo.h:29
llvm::MDTuple::getDistinct
static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a distinct node.
Definition: Metadata.h:1368
llvm::MIToken::kw_killed
@ kw_killed
Definition: MILexer.h:56
parseIRConstant
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1822
llvm::MIToken::NamedIRValue
@ NamedIRValue
Definition: MILexer.h:170
llvm::MIToken::stringValue
StringRef stringValue() const
Return the token's string value.
Definition: MILexer.h:229
llvm::CmpInst::FCMP_ULT
@ FCMP_ULT
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:733
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::MIToken::kw_arcp
@ kw_arcp
Definition: MILexer.h:68
llvm::ConstantInfo
Definition: ConstantsContext.h:318
llvm::MIToken::kw_debug_use
@ kw_debug_use
Definition: MILexer.h:60
llvm::LLT::fixed_vector
static LLT fixed_vector(unsigned NumElements, unsigned ScalarSizeInBits)
Get a low-level fixed-width vector of some number of elements and element width.
Definition: LowLevelTypeImpl.h:74
llvm::MIToken::MachineBasicBlockLabel
@ MachineBasicBlockLabel
Definition: MILexer.h:151
llvm::MachineBasicBlock::setSectionID
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
Definition: MachineBasicBlock.h:633
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:187
llvm::MIToken::kw_cfi_llvm_def_aspace_cfa
@ kw_cfi_llvm_def_aspace_cfa
Definition: MILexer.h:86
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:762
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
llvm::RegState::InternalRead
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
Definition: MachineInstrBuilder.h:59
verifyScalarSize
static bool verifyScalarSize(uint64_t Size)
Definition: MIParser.cpp:1851
llvm::MachineBasicBlock::setIsInlineAsmBrIndirectTarget
void setIsInlineAsmBrIndirectTarget(bool V=true)
Indicates if this is the indirect dest of an INLINEASM_BR.
Definition: MachineBasicBlock.h:649
llvm::all_of
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1709
verifyVectorElementCount
static bool verifyVectorElementCount(uint64_t NumElts)
Definition: MIParser.cpp:1855
verifyAddrSpace
static bool verifyAddrSpace(uint64_t AddrSpace)
Definition: MIParser.cpp:1859
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:667
InstrInfo
return InstrInfo
Definition: RISCVInsertVSETVLI.cpp:668
llvm::MachineOperand::isImplicit
bool isImplicit() const
Definition: MachineOperand.h:379
llvm::MIToken::kw_cfi_remember_state
@ kw_cfi_remember_state
Definition: MILexer.h:88
llvm::parseStackObjectReference
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3531
llvm::parseMDNode
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3537
llvm::MIToken::kw_invariant
@ kw_invariant
Definition: MILexer.h:106
TargetMachine.h
llvm::RegisterBank
This class implements the register bank concept.
Definition: RegisterBank.h:28
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::CmpInst::isFPPredicate
bool isFPPredicate() const
Definition: InstrTypes.h:826
llvm::MIRFormatter::parseIRValue
static bool parseIRValue(StringRef Src, MachineFunction &MF, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrorCallback)
Helper functions to parse IR value from MIR serialization format which will be useful for target spec...
Definition: MIParser.cpp:3547
llvm::MachineRegisterInfo::setRegClassOrRegBank
void setRegClassOrRegBank(Register Reg, const RegClassOrRegBank &RCOrRB)
Definition: MachineRegisterInfo.h:691
llvm::MCInstrDesc::ImplicitUses
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:206
Constants.h
llvm::MachineRegisterInfo::setType
void setType(Register VReg, LLT Ty)
Set the low-level type of VReg to Ty.
Definition: MachineRegisterInfo.cpp:180
llvm::MIToken::kw_shufflemask
@ kw_shufflemask
Definition: MILexer.h:124
llvm::MemoryBuffer::getBufferEnd
const char * getBufferEnd() const
Definition: MemoryBuffer.h:67
llvm::MachineOperand::CreateImm
static MachineOperand CreateImm(int64_t Val)
Definition: MachineOperand.h:782
llvm::PerFunctionMIParsingState::IRSlots
const SlotMapping & IRSlots
Definition: MIParser.h:166
llvm::PerTargetMIParsingState::getTargetIndex
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
Definition: MIParser.cpp:198
llvm::MIRFormatter::parseImmMnemonic
virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, StringRef Src, int64_t &Imm, ErrorCallbackType ErrorCallback) const
Implement target specific parsing of immediate mnemonics.
Definition: MIRFormatter.h:46
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::isUse
bool isUse() const
Definition: MachineOperand.h:369
Intrinsics.h
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::CmpInst::ICMP_ULE
@ ICMP_ULE
unsigned less or equal
Definition: InstrTypes.h:745
llvm::ARM_PROC::A
@ A
Definition: ARMBaseInfo.h:34
Twine.h
InstrTypes.h
llvm::MIToken::equal
@ equal
Definition: MILexer.h:35
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::StringMap::insert
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
Definition: StringMap.h:275
MCContext.h
llvm::MachineBasicBlock::isSuccessor
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Definition: MachineBasicBlock.cpp:924
llvm::MIToken::kw_cfi_restore
@ kw_cfi_restore
Definition: MILexer.h:89
llvm::MIToken::kw_implicit
@ kw_implicit
Definition: MILexer.h:51
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::guessSuccessors
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:603
llvm::MIToken::FloatingPointLiteral
@ FloatingPointLiteral
Definition: MILexer.h:162
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::CmpInst::FCMP_UGE
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:732
llvm::MIToken::md_tbaa
@ md_tbaa
Definition: MILexer.h:140
llvm::SMDiagnostic
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
llvm::ms_demangle::QualifierMangleMode::Result
@ Result
llvm::MIToken::kw_x86_fp80
@ kw_x86_fp80
Definition: MILexer.h:100
llvm::StringRef::iterator
const char * iterator
Definition: StringRef.h:54
llvm::MCInstrDesc::getImplicitDefs
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
Definition: MCInstrDesc.h:587
UINT64_MAX
#define UINT64_MAX
Definition: DataTypes.h:77
llvm::APInt::getLimitedValue
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
Definition: APInt.h:456
llvm::MachineInstr::FmNoInfs
@ FmNoInfs
Definition: MachineInstr.h:92
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::dwarf::Index
Index
Definition: Dwarf.h:472
llvm::MIToken::kw_cfi_undefined
@ kw_cfi_undefined
Definition: MILexer.h:91
llvm::MIToken::kw_distinct
@ kw_distinct
Definition: MILexer.h:137
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:197
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::logicalview::LVSortMode::Line
@ Line
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:84
llvm::CmpInst::FCMP_UNO
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:729
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
SMLoc.h
llvm::MCCFIInstruction::createRestoreState
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:625
llvm::MIToken::kw_tied_def
@ kw_tied_def
Definition: MILexer.h:62
llvm::StringMap::clear
void clear()
Definition: StringMap.h:348
llvm::AtomicOrdering::Acquire
@ Acquire
llvm::MIToken::IRBlock
@ IRBlock
Definition: MILexer.h:169
llvm::APSInt
An arbitrary precision integer that knows its signedness.
Definition: APSInt.h:23
llvm::SourceMgr::getMainFileID
unsigned getMainFileID() const
Definition: SourceMgr.h:132
llvm::MachineOperand::CreateFI
static MachineOperand CreateFI(int Idx)
Definition: MachineOperand.h:832
llvm::MIToken::HexLiteral
@ HexLiteral
Definition: MILexer.h:163
llvm::MIToken::kw_cfi_escape
@ kw_cfi_escape
Definition: MILexer.h:84
llvm::CmpInst::FCMP_OEQ
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:722
DebugLoc.h
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::CmpInst::FCMP_OLT
@ FCMP_OLT
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:725
llvm::MachineOperand::setTargetFlags
void setTargetFlags(unsigned F)
Definition: MachineOperand.h:223
llvm::PseudoSourceValue
Special value supplied for machine level alias analysis.
Definition: PseudoSourceValue.h:35
llvm::MIToken::kw_heap_alloc_marker
@ kw_heap_alloc_marker
Definition: MILexer.h:127
llvm::MachineInstr::NoSWrap
@ NoSWrap
Definition: MachineInstr.h:106
Align
uint64_t Align
Definition: ELFObjHandler.cpp:82
llvm::MCCFIInstruction::createEscape
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:631
llvm::Metadata
Root of the metadata hierarchy.
Definition: Metadata.h:62
llvm::PerTargetMIParsingState::getRegClass
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
Definition: MIParser.cpp:302
llvm::AddressSpace
AddressSpace
Definition: NVPTXBaseInfo.h:21
getUnsigned
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:1992
llvm::MachineInstr::FmNsz
@ FmNsz
Definition: MachineInstr.h:94
parseMetadata
static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)
Parse Input that contains metadata.
Definition: SampleProfReader.cpp:180
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::MIToken::StringConstant
@ StringConstant
Definition: MILexer.h:174
llvm::MachineInstr::NoFPExcept
@ NoFPExcept
Definition: MachineInstr.h:110
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::LLVMContext::getOrInsertSyncScopeID
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.
Definition: LLVMContext.cpp:310
SourceMgr.h
Type.h
BranchProbability.h
llvm::omp::RTLDependInfoFields::Len
@ Len
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:539
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
LowLevelTypeImpl.h
llvm::MIToken::kw_liveout
@ kw_liveout
Definition: MILexer.h:116
Int
@ Int
Definition: TargetLibraryInfo.cpp:48
llvm::MIToken::kw_reassoc
@ kw_reassoc
Definition: MILexer.h:71
llvm::SourceMgr::getMemoryBuffer
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:125
llvm::MIToken::ConstantPoolItem
@ ConstantPoolItem
Definition: MILexer.h:166
llvm::MemoryBuffer::getBufferIdentifier
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:76
ValueSymbolTable.h
llvm::CmpInst::FCMP_FALSE
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:721
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:74
llvm::MIToken::kw_pcsections
@ kw_pcsections
Definition: MILexer.h:128
llvm::MachineBasicBlock::setAlignment
void setAlignment(Align A)
Set alignment of the basic block.
Definition: MachineBasicBlock.h:559
llvm::MIToken::hasIntegerValue
bool hasIntegerValue() const
Definition: MILexer.h:233
llvm::function_ref
An efficient, type-erasing, non-owning reference to a callable.
Definition: STLFunctionalExtras.h:36
llvm::LLT::pointer
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
Definition: LowLevelTypeImpl.h:49
llvm::MIToken::StackObject
@ StackObject
Definition: MILexer.h:153
llvm::AtomicOrdering
AtomicOrdering
Atomic ordering for LLVM's memory model.
Definition: AtomicOrdering.h:56
llvm::PerFunctionMIParsingState::VRegInfos
DenseMap< Register, VRegInfo * > VRegInfos
Definition: MIParser.h:173
BasicBlock.h
llvm::MIToken::kw_dead
@ kw_dead
Definition: MILexer.h:54
llvm::MIToken::kw_cfi_adjust_cfa_offset
@ kw_cfi_adjust_cfa_offset
Definition: MILexer.h:83
llvm::MachineOperand::CreateShuffleMask
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
Definition: MachineOperand.h:940
llvm::PerFunctionMIParsingState::getIRValue
const Value * getIRValue(unsigned Slot)
Definition: MIParser.cpp:366
llvm::RegisterBankInfo::getNumRegBanks
unsigned getNumRegBanks() const
Get the total number of register banks.
Definition: RegisterBankInfo.h:588
llvm::SlotMapping
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
Definition: SlotMapping.h:32
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MIToken::kw_cfi_window_save
@ kw_cfi_window_save
Definition: MILexer.h:92
llvm::MachineBasicBlock::setAddressTakenIRBlock
void setAddressTakenIRBlock(BasicBlock *BB)
Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.
Definition: MachineBasicBlock.h:251
llvm::parseMachineMetadata
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)
Definition: MIParser.cpp:3542
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:52
llvm::TargetRegisterInfo::getRegClass
const TargetRegisterClass * getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
Definition: TargetRegisterInfo.h:771
llvm::AMDGPU::Hwreg::Offset
Offset
Definition: SIDefines.h:416
isImplicitOperandIn
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:1378
llvm::MIToken::kw_pre_instr_symbol
@ kw_pre_instr_symbol
Definition: MILexer.h:125
llvm::SyncScope::System
@ System
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:57
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:320
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
uint64_t
llvm::MachineOperand::CreateMBB
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
Definition: MachineOperand.h:825
llvm::PerFunctionMIParsingState::getVRegInfo
VRegInfo & getVRegInfo(Register Num)
Definition: MIParser.cpp:321
parseIRValue
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:3002
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:650
llvm::MCInstrDesc::isCall
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:285
llvm::TargetRegisterInfo::getRegClassName
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
Definition: TargetRegisterInfo.h:777
llvm::MIToken::SubRegisterIndex
@ SubRegisterIndex
Definition: MILexer.h:173
llvm::MachineBasicBlock::setIsEHPad
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Definition: MachineBasicBlock.h:580
llvm::MIToken::kw_nnan
@ kw_nnan
Definition: MILexer.h:65
llvm::VRegInfo::NORMAL
@ NORMAL
Definition: MIParser.h:39
llvm::MachineInstr::FmReassoc
@ FmReassoc
Definition: MachineInstr.h:102
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:39
llvm::MIToken::kw_target_index
@ kw_target_index
Definition: MILexer.h:96
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
llvm::MCCFIInstruction::createNegateRAState
static MCCFIInstruction createNegateRAState(MCSymbol *L)
.cfi_negate_ra_state AArch64 negate RA state.
Definition: MCDwarf.h:596
llvm::MIToken::kw_fp128
@ kw_fp128
Definition: MILexer.h:101
MemoryLocation.h
llvm::DenseMap
Definition: DenseMap.h:714
llvm::SyncScope::ID
uint8_t ID
Definition: LLVMContext.h:46
llvm::logicalview::LVPrintKind::Elements
@ Elements
llvm::AtomicOrdering::Unordered
@ Unordered
MIRPrinter.h
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:21
llvm::MIToken::MachineBasicBlock
@ MachineBasicBlock
Definition: MILexer.h:152
llvm::MIToken::Newline
@ Newline
Definition: MILexer.h:31
llvm::RegState::Renamable
@ Renamable
Register that may be renamed.
Definition: MachineInstrBuilder.h:61
llvm::StringRef::lower
std::string lower() const
Definition: StringRef.cpp:112
ArrayRef.h
llvm::MIToken::lbrace
@ lbrace
Definition: MILexer.h:43
llvm::MDString::get
static MDString * get(LLVMContext &Context, StringRef Str)
Definition: Metadata.cpp:498
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::MIToken::kw_half
@ kw_half
Definition: MILexer.h:97
llvm::MachineMemOperand::Flags
Flags
Flags values. These may be or'd together.
Definition: MachineMemOperand.h:130
llvm::MBBSectionID::ExceptionSectionID
const static MBBSectionID ExceptionSectionID
Definition: MachineBasicBlock.h:64
llvm::MIToken::IRValue
@ IRValue
Definition: MILexer.h:171
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MIToken::comma
@ comma
Definition: MILexer.h:34
llvm::CmpInst::FCMP_OGE
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:724
llvm::Function::lookupIntrinsicID
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:832
llvm::CmpInst::ICMP_UGE
@ ICMP_UGE
unsigned greater or equal
Definition: InstrTypes.h:743
MIRFormatter.h
llvm::MachineMemOperand::MONonTemporal
@ MONonTemporal
The memory access is non-temporal.
Definition: MachineMemOperand.h:140
Ptr
@ Ptr
Definition: TargetLibraryInfo.cpp:60
llvm::MachineOperand::CreateBA
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:875
llvm::CmpInst::BAD_ICMP_PREDICATE
@ BAD_ICMP_PREDICATE
Definition: InstrTypes.h:752
llvm::MIToken::dot
@ dot
Definition: MILexer.h:39
APSInt.h
llvm::MDTuple::get
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1357
llvm::MCCFIInstruction::cfiDefCfa
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
Definition: MCDwarf.h:532
llvm::MIToken::JumpTableIndex
@ JumpTableIndex
Definition: MILexer.h:167
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::MDNode
Metadata node.
Definition: Metadata.h:944
llvm::MachineOperand::CreateMCSymbol
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
Definition: MachineOperand.h:913
llvm::MIToken::kw_constant_pool
@ kw_constant_pool
Definition: MILexer.h:113
initSlots2Values
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
Definition: MIParser.cpp:353
llvm::irsymtab::storage::Word
support::ulittle32_t Word
Definition: IRSymtab.h:52
llvm::PerTargetMIParsingState::getRegisterByName
bool getRegisterByName(StringRef RegName, Register &Reg)
Try to convert a register name to a register number.
Definition: MIParser.cpp:121
llvm::MIToken::Eof
@ Eof
Definition: MILexer.h:29
llvm::TargetSubtargetInfo::getRegBankInfo
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
Definition: TargetSubtargetInfo.h:131
llvm::MachineBasicBlock::setIsEHFuncletEntry
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
Definition: MachineBasicBlock.h:605
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::CmpInst::ICMP_SLT
@ ICMP_SLT
signed less than
Definition: InstrTypes.h:748
llvm::CmpInst::isIntPredicate
bool isIntPredicate() const
Definition: InstrTypes.h:827
llvm::MIToken::kw_successors
@ kw_successors
Definition: MILexer.h:121
llvm::MachineInstr::IsExact
@ IsExact
Definition: MachineInstr.h:108
llvm::MIToken::md_dilocation
@ md_dilocation
Definition: MILexer.h:145
llvm::MIToken::kw_basealign
@ kw_basealign
Definition: MILexer.h:108
llvm::dwarf::getAttributeEncoding
unsigned getAttributeEncoding(StringRef EncodingString)
Definition: Dwarf.cpp:208
llvm::MIToken::kw_frame_setup
@ kw_frame_setup
Definition: MILexer.h:63
llvm::MIToken::kw_debug_location
@ kw_debug_location
Definition: MILexer.h:76
llvm::Sched::Source
@ Source
Definition: TargetLowering.h:99
llvm::MachineOperand::CreateIntrinsicID
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
Definition: MachineOperand.h:928
llvm::MachineBasicBlock::setMachineBlockAddressTaken
void setMachineBlockAddressTaken()
Set this block to indicate that its address is used as something other than the target of a terminato...
Definition: MachineBasicBlock.h:247
llvm::VRegInfo::D
union llvm::VRegInfo::@203 D
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MIToken::kw_nsw
@ kw_nsw
Definition: MILexer.h:73
None.h
llvm::MachineOperand::CreateGA
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:859
DataLayout.h
llvm::logicalview::LVAttributeKind::Range
@ Range
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::MIToken::md_range
@ md_range
Definition: MILexer.h:143
llvm::CmpInst::ICMP_ULT
@ ICMP_ULT
unsigned less than
Definition: InstrTypes.h:744
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
llvm::MIToken::kw_ir_block_address_taken
@ kw_ir_block_address_taken
Definition: MILexer.h:133
llvm::MIToken::kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_aarch64_negate_ra_sign_state
Definition: MILexer.h:93
llvm::RegState::Implicit
@ Implicit
Not emitted register (e.g. carry, or temporary result).
Definition: MachineInstrBuilder.h:46
llvm::SourceMgr
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
Definition: SourceMgr.h:31
Number
uint32_t Number
Definition: Profile.cpp:47
uint32_t
llvm::MIToken::kw_intrinsic
@ kw_intrinsic
Definition: MILexer.h:95
parse
static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Definition: LineTable.cpp:54
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MachineOperand::isDef
bool isDef() const
Definition: MachineOperand.h:374
llvm::MIToken::kw_bbsections
@ kw_bbsections
Definition: MILexer.h:130
llvm::MIToken::kw_implicit_define
@ kw_implicit_define
Definition: MILexer.h:52
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::MCCFIInstruction::createAdjustCfaOffset
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:553
llvm::MIToken::kw_machine_block_address_taken
@ kw_machine_block_address_taken
Definition: MILexer.h:134
llvm::MIToken::kw_ppc_fp128
@ kw_ppc_fp128
Definition: MILexer.h:102
llvm::MachineOperand::CreateCImm
static MachineOperand CreateCImm(const ConstantInt *CI)
Definition: MachineOperand.h:788
llvm::MDTuple::getTemporary
static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a temporary node.
Definition: Metadata.h:1377
llvm::PerTargetMIParsingState::setTarget
void setTarget(const TargetSubtargetInfo &NewSubtarget)
Definition: MIParser.cpp:83
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::insert
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:207
llvm::MachineMemOperand::MOVolatile
@ MOVolatile
The memory access is volatile.
Definition: MachineMemOperand.h:138
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:62
MILexer.h
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:134
llvm::MIToken::kw_dereferenceable
@ kw_dereferenceable
Definition: MILexer.h:55
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
Parser.h
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:404
llvm::MIToken::kw_jump_table
@ kw_jump_table
Definition: MILexer.h:112
llvm::AMDGPU::SendMsg::Msg
const CustomOperand< const MCSubtargetInfo & > Msg[]
Definition: AMDGPUAsmUtils.cpp:39
llvm::AtomicOrdering::Release
@ Release
llvm::MIToken::kw_non_temporal
@ kw_non_temporal
Definition: MILexer.h:105
llvm::StringRef::size
constexpr size_t size() const
size - Get the string size.
Definition: StringRef.h:137
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MIToken::minus
@ minus
Definition: MILexer.h:46
llvm::MIToken::ExternalSymbol
@ ExternalSymbol
Definition: MILexer.h:157
llvm::PerFunctionMIParsingState
Definition: MIParser.h:162
llvm::MIToken::kw_target_flags
@ kw_target_flags
Definition: MILexer.h:103
llvm::CmpInst::FCMP_UGT
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:731
llvm::parseNamedRegisterReference
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3519
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
llvm::MDNode::replaceAllUsesWith
void replaceAllUsesWith(Metadata *MD)
RAUW a temporary.
Definition: Metadata.h:1133
llvm::Function::getValueSymbolTable
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:699
llvm::PerFunctionMIParsingState::Slots2Values
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
Definition: MIParser.h:181
llvm::MIToken::NamedIRBlock
@ NamedIRBlock
Definition: MILexer.h:168
llvm::MemoryBuffer::getBufferStart
const char * getBufferStart() const
Definition: MemoryBuffer.h:66
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:63
llvm::MIToken::kw_floatpred
@ kw_floatpred
Definition: MILexer.h:122
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:623
llvm::MIToken::coloncolon
@ coloncolon
Definition: MILexer.h:38
llvm::MIToken::rparen
@ rparen
Definition: MILexer.h:42
llvm::None
constexpr std::nullopt_t None
Definition: None.h:27
llvm::dwarf::getOperationEncoding
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:161
llvm::AAMDNodes::NoAlias
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:678
llvm::SlotMapping::GlobalValues
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:33
llvm::toString
const char * toString(DWARFSectionKind Kind)
Definition: DWARFUnitIndex.h:67
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::MBBSectionID::ColdSectionID
const static MBBSectionID ColdSectionID
Definition: MachineBasicBlock.h:63
llvm::MachineBasicBlock::insert
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Definition: MachineBasicBlock.cpp:1327
MachineFrameInfo.h
llvm::MIToken::kw_debug_instr_number
@ kw_debug_instr_number
Definition: MILexer.h:77
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:155
llvm::MIToken::kw_intpred
@ kw_intpred
Definition: MILexer.h:123
llvm::MIToken::MCSymbol
@ MCSymbol
Definition: MILexer.h:158
llvm::PerTargetMIParsingState::getSubRegIndex
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
Definition: MIParser.cpp:180
llvm::MIToken::greater
@ greater
Definition: MILexer.h:48
llvm::MIToken::exclaim
@ exclaim
Definition: MILexer.h:40
Casting.h
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
Function.h
llvm::MIToken::IntegerLiteral
@ IntegerLiteral
Definition: MILexer.h:161
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::MIToken::kw_align
@ kw_align
Definition: MILexer.h:107
llvm::SourceMgr::DK_Error
@ DK_Error
Definition: SourceMgr.h:34
llvm::MachineInstr::FmNoNans
@ FmNoNans
Definition: MachineInstr.h:90
StringSwitch.h
llvm::MachineInstr::FmContract
@ FmContract
Definition: MachineInstr.h:98
SlotMapping.h
llvm::PerFunctionMIParsingState::MF
MachineFunction & MF
Definition: MIParser.h:164
llvm::MIToken::TokenKind
TokenKind
Definition: MILexer.h:27
llvm::CmpInst::ICMP_SGE
@ ICMP_SGE
signed greater or equal
Definition: InstrTypes.h:747
llvm::TargetRegisterInfo::getNumRegClasses
unsigned getNumRegClasses() const
Definition: TargetRegisterInfo.h:765
llvm::SourceMgr::GetMessage
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:270
llvm::MachineBasicBlock::normalizeSuccProbs
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
Definition: MachineBasicBlock.h:704
llvm::MIToken::kind
TokenKind kind() const
Definition: MILexer.h:193
llvm::MachineMemOperand::MOStore
@ MOStore
The memory access writes data.
Definition: MachineMemOperand.h:136
llvm::MIToken::kw_cfi_type
@ kw_cfi_type
Definition: MILexer.h:129
parseGlobalValue
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
Definition: MIParser.cpp:2100
llvm::AAMDNodes::TBAA
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:669
llvm::parseVirtualRegisterReference
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3525
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:83
llvm::VRegInfo
Definition: MIParser.h:37
llvm::MIToken::QuotedIRValue
@ QuotedIRValue
Definition: MILexer.h:172
llvm::parseConstantValue
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:186
llvm::BranchProbability::getRaw
static BranchProbability getRaw(uint32_t N)
Definition: BranchProbability.h:54
llvm::PerTargetMIParsingState::getRegMask
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
Definition: MIParser.cpp:163
llvm::MIRFormatter
MIRFormater - Interface to format MIR operand based on target.
Definition: MIRFormatter.h:28
Instructions.h
llvm::MIToken::kw_custom
@ kw_custom
Definition: MILexer.h:115
llvm::MemoryLocation::UnknownSize
@ UnknownSize
Definition: MemoryLocation.h:215
llvm::MIToken::kw_stack
@ kw_stack
Definition: MILexer.h:110
llvm::MCCFIInstruction::createRegister
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:585
llvm::MIToken::kw_got
@ kw_got
Definition: MILexer.h:111
llvm::StringMapImpl::empty
bool empty() const
Definition: StringMap.h:94
SmallVector.h
llvm::MachineOperand::CreateRegMask
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
Definition: MachineOperand.h:895
llvm::MachineRegisterInfo::getType
LLT getType(Register Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.
Definition: MachineRegisterInfo.h:745
MachineInstrBuilder.h
llvm::MachineInstr::NoUWrap
@ NoUWrap
Definition: MachineInstr.h:104
llvm::MCCFIInstruction::createUndefined
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can't be restored anymore.
Definition: MCDwarf.h:609
llvm::VRegInfo::UNKNOWN
@ UNKNOWN
Definition: MIParser.h:39
RegisterBank.h
TargetIntrinsicInfo.h
llvm::CmpInst::ICMP_UGT
@ ICMP_UGT
unsigned greater than
Definition: InstrTypes.h:742
llvm::SMRange
Represents a range in source code.
Definition: SMLoc.h:48
llvm::CmpInst::FCMP_UNE
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:735
llvm::MIToken::is
bool is(TokenKind K) const
Definition: MILexer.h:220
llvm::MIToken::location
StringRef::iterator location() const
Definition: MILexer.h:224
llvm::PerFunctionMIParsingState::MBBSlots
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:172
llvm::MachineInstr::BundledSucc
@ BundledSucc
Definition: MachineInstr.h:89
llvm::BlockAddress::get
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1751
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:164
LaneBitmask.h
initSlots2BasicBlocks
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
Definition: MIParser.cpp:3444
llvm::MIToken::Identifier
@ Identifier
Definition: MILexer.h:148
llvm::Optional::value
constexpr const T & value() const &
Definition: Optional.h:281
llvm::MachineInstr::FmArcp
@ FmArcp
Definition: MachineInstr.h:96
ModuleSlotTracker.h
MachineMemOperand.h
llvm::CmpInst::FCMP_OLE
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:726
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::SMLoc::getFromPointer
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:36
MachineOperand.h
llvm::MIToken::rbrace
@ rbrace
Definition: MILexer.h:44
RegName
#define RegName(no)
llvm::StringSwitch::Default
R Default(T Value)
Definition: StringSwitch.h:182
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:570
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44
llvm::parseRegisterReference
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3513
llvm::StringRef::str
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:221
llvm::ValueSymbolTable::lookup
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
Definition: ValueSymbolTable.h:74
llvm::MCCFIInstruction::createRememberState
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:620
llvm::RegState::Dead
@ Dead
Unused definition.
Definition: MachineInstrBuilder.h:50
llvm::omp::RTLDependInfoFields::Flags
@ Flags
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::RegState::Debug
@ Debug
Register 'use' is for debugging purpose.
Definition: MachineInstrBuilder.h:56
llvm::MIToken::kw_cfi_def_cfa_offset
@ kw_cfi_def_cfa_offset
Definition: MILexer.h:82
StringMap.h
llvm::MIToken::less
@ less
Definition: MILexer.h:47
llvm::MIToken::kw_volatile
@ kw_volatile
Definition: MILexer.h:104
llvm::MIToken::kw_def
@ kw_def
Definition: MILexer.h:53
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MIToken::kw_landing_pad
@ kw_landing_pad
Definition: MILexer.h:117
llvm::TargetRegisterInfo::getSubRegIndexName
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
Definition: TargetRegisterInfo.h:371
llvm::PerTargetMIParsingState::getBitmaskTargetFlag
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
Definition: MIParser.cpp:241
llvm::PerTargetMIParsingState::getDirectTargetFlag
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
Definition: MIParser.cpp:219
llvm::VRegInfo::Explicit
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:41
llvm::MIToken::kw_nuw
@ kw_nuw
Definition: MILexer.h:72
llvm::MIToken::plus
@ plus
Definition: MILexer.h:45
MachineFunction.h
llvm::MIToken::md_alias_scope
@ md_alias_scope
Definition: MILexer.h:141
llvm::MIToken::kw_cfi_same_value
@ kw_cfi_same_value
Definition: MILexer.h:78
llvm::MIToken::NamedVirtualRegister
@ NamedVirtualRegister
Definition: MILexer.h:150
llvm::MachineInstr::BundledPred
@ BundledPred
Definition: MachineInstr.h:88
llvm::parseMBBReference
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3507
llvm::MIToken::kw_ehfunclet_entry
@ kw_ehfunclet_entry
Definition: MILexer.h:119
llvm::CmpInst::FCMP_TRUE
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:736
llvm::isPowerOf2_64
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
Definition: MathExtras.h:463
llvm::VRegInfo::GENERIC
@ GENERIC
Definition: MIParser.h:39
llvm::LLT::scalar
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Definition: LowLevelTypeImpl.h:42
Value.h
llvm::MachineMemOperand::MONone
@ MONone
Definition: MachineMemOperand.h:132
llvm::MIToken::kw_liveins
@ kw_liveins
Definition: MILexer.h:120
llvm::MIToken::kw_contract
@ kw_contract
Definition: MILexer.h:69
llvm::MachineOperand::CreatePredicate
static MachineOperand CreatePredicate(unsigned Pred)
Definition: MachineOperand.h:934
llvm::lexMIToken
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
llvm::MIToken::kw_cfi_rel_offset
@ kw_cfi_rel_offset
Definition: MILexer.h:80
llvm::MIToken::md_diexpr
@ md_diexpr
Definition: MILexer.h:144
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::MIToken::lparen
@ lparen
Definition: MILexer.h:41
llvm::RegState::EarlyClobber
@ EarlyClobber
Register definition happens before uses.
Definition: MachineInstrBuilder.h:54
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:311
llvm::MIToken::kw_undef
@ kw_undef
Definition: MILexer.h:57
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:307
llvm::LaneBitmask::getAll
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84
SubReg
unsigned SubReg
Definition: AArch64AdvSIMDScalarPass.cpp:104
llvm::CmpInst::BAD_FCMP_PREDICATE
@ BAD_FCMP_PREDICATE
Definition: InstrTypes.h:739
llvm::MachineOperand::CreateFPImm
static MachineOperand CreateFPImm(const ConstantFP *CFP)
Definition: MachineOperand.h:794
llvm::MCCFIInstruction::createWindowSave
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:591
llvm::MIToken::kw_blockaddress
@ kw_blockaddress
Definition: MILexer.h:94
llvm::MCInstrDesc::getImplicitUses
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction.
Definition: MCInstrDesc.h:565
llvm::MachineOperand::CreateTargetIndex
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:845
llvm::StringRef::drop_front
StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
Definition: StringRef.h:601
llvm::AtomicOrdering::NotAtomic
@ NotAtomic
llvm::CmpInst::FCMP_ORD
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:728
llvm::TargetRegisterInfo::getRegMasks
virtual ArrayRef< const uint32_t * > getRegMasks() const =0
Return all the call-preserved register masks defined for this target.
llvm::MachineInstr::setFlag
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:362
llvm::CmpInst::FCMP_UEQ
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:730
llvm::MachineOperand::isIdenticalTo
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
Definition: MachineOperand.cpp:287
MIParser.h
llvm::MachineOperand::CreateRegLiveOut
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
Definition: MachineOperand.h:901
llvm::MCInstrDesc::ImplicitDefs
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:207
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38
llvm::MCCFIInstruction::createRestore
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:603
getRegisterName
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
Definition: MIParser.cpp:1371
llvm::MIToken::kw_unknown_address
@ kw_unknown_address
Definition: MILexer.h:132
llvm::LLT
Definition: LowLevelTypeImpl.h:39