LLVM  13.0.0git
RISCVFrameLowering.cpp
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1 //===-- RISCVFrameLowering.cpp - RISCV Frame Information ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the RISCV implementation of TargetFrameLowering class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "RISCVFrameLowering.h"
15 #include "RISCVSubtarget.h"
21 #include "llvm/IR/DiagnosticInfo.h"
22 #include "llvm/MC/MCDwarf.h"
23 
24 using namespace llvm;
25 
26 // For now we use x18, a.k.a s2, as pointer to shadow call stack.
27 // User should explicitly set -ffixed-x18 and not use x18 in their asm.
30  const DebugLoc &DL) {
31  if (!MF.getFunction().hasFnAttribute(Attribute::ShadowCallStack))
32  return;
33 
34  const auto &STI = MF.getSubtarget<RISCVSubtarget>();
35  Register RAReg = STI.getRegisterInfo()->getRARegister();
36 
37  // Do not save RA to the SCS if it's not saved to the regular stack,
38  // i.e. RA is not at risk of being overwritten.
39  std::vector<CalleeSavedInfo> &CSI = MF.getFrameInfo().getCalleeSavedInfo();
40  if (std::none_of(CSI.begin(), CSI.end(),
41  [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; }))
42  return;
43 
44  Register SCSPReg = RISCVABI::getSCSPReg();
45 
46  auto &Ctx = MF.getFunction().getContext();
47  if (!STI.isRegisterReservedByUser(SCSPReg)) {
49  MF.getFunction(), "x18 not reserved by user for Shadow Call Stack."});
50  return;
51  }
52 
53  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
54  if (RVFI->useSaveRestoreLibCalls(MF)) {
55  Ctx.diagnose(DiagnosticInfoUnsupported{
56  MF.getFunction(),
57  "Shadow Call Stack cannot be combined with Save/Restore LibCalls."});
58  return;
59  }
60 
61  const RISCVInstrInfo *TII = STI.getInstrInfo();
62  bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit);
63  int64_t SlotSize = STI.getXLen() / 8;
64  // Store return address to shadow call stack
65  // s[w|d] ra, 0(s2)
66  // addi s2, s2, [4|8]
67  BuildMI(MBB, MI, DL, TII->get(IsRV64 ? RISCV::SD : RISCV::SW))
68  .addReg(RAReg)
69  .addReg(SCSPReg)
70  .addImm(0);
71  BuildMI(MBB, MI, DL, TII->get(RISCV::ADDI))
72  .addReg(SCSPReg, RegState::Define)
73  .addReg(SCSPReg)
74  .addImm(SlotSize);
75 }
76 
79  const DebugLoc &DL) {
80  if (!MF.getFunction().hasFnAttribute(Attribute::ShadowCallStack))
81  return;
82 
83  const auto &STI = MF.getSubtarget<RISCVSubtarget>();
84  Register RAReg = STI.getRegisterInfo()->getRARegister();
85 
86  // See emitSCSPrologue() above.
87  std::vector<CalleeSavedInfo> &CSI = MF.getFrameInfo().getCalleeSavedInfo();
88  if (std::none_of(CSI.begin(), CSI.end(),
89  [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; }))
90  return;
91 
92  Register SCSPReg = RISCVABI::getSCSPReg();
93 
94  auto &Ctx = MF.getFunction().getContext();
95  if (!STI.isRegisterReservedByUser(SCSPReg)) {
97  MF.getFunction(), "x18 not reserved by user for Shadow Call Stack."});
98  return;
99  }
100 
101  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
102  if (RVFI->useSaveRestoreLibCalls(MF)) {
103  Ctx.diagnose(DiagnosticInfoUnsupported{
104  MF.getFunction(),
105  "Shadow Call Stack cannot be combined with Save/Restore LibCalls."});
106  return;
107  }
108 
109  const RISCVInstrInfo *TII = STI.getInstrInfo();
110  bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit);
111  int64_t SlotSize = STI.getXLen() / 8;
112  // Load return address from shadow call stack
113  // l[w|d] ra, -[4|8](s2)
114  // addi s2, s2, -[4|8]
115  BuildMI(MBB, MI, DL, TII->get(IsRV64 ? RISCV::LD : RISCV::LW))
116  .addReg(RAReg, RegState::Define)
117  .addReg(SCSPReg)
118  .addImm(-SlotSize);
119  BuildMI(MBB, MI, DL, TII->get(RISCV::ADDI))
120  .addReg(SCSPReg, RegState::Define)
121  .addReg(SCSPReg)
122  .addImm(-SlotSize);
123 }
124 
125 // Get the ID of the libcall used for spilling and restoring callee saved
126 // registers. The ID is representative of the number of registers saved or
127 // restored by the libcall, except it is zero-indexed - ID 0 corresponds to a
128 // single register.
129 static int getLibCallID(const MachineFunction &MF,
130  const std::vector<CalleeSavedInfo> &CSI) {
131  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
132 
133  if (CSI.empty() || !RVFI->useSaveRestoreLibCalls(MF))
134  return -1;
135 
136  Register MaxReg = RISCV::NoRegister;
137  for (auto &CS : CSI)
138  // RISCVRegisterInfo::hasReservedSpillSlot assigns negative frame indexes to
139  // registers which can be saved by libcall.
140  if (CS.getFrameIdx() < 0)
141  MaxReg = std::max(MaxReg.id(), CS.getReg().id());
142 
143  if (MaxReg == RISCV::NoRegister)
144  return -1;
145 
146  switch (MaxReg) {
147  default:
148  llvm_unreachable("Something has gone wrong!");
149  case /*s11*/ RISCV::X27: return 12;
150  case /*s10*/ RISCV::X26: return 11;
151  case /*s9*/ RISCV::X25: return 10;
152  case /*s8*/ RISCV::X24: return 9;
153  case /*s7*/ RISCV::X23: return 8;
154  case /*s6*/ RISCV::X22: return 7;
155  case /*s5*/ RISCV::X21: return 6;
156  case /*s4*/ RISCV::X20: return 5;
157  case /*s3*/ RISCV::X19: return 4;
158  case /*s2*/ RISCV::X18: return 3;
159  case /*s1*/ RISCV::X9: return 2;
160  case /*s0*/ RISCV::X8: return 1;
161  case /*ra*/ RISCV::X1: return 0;
162  }
163 }
164 
165 // Get the name of the libcall used for spilling callee saved registers.
166 // If this function will not use save/restore libcalls, then return a nullptr.
167 static const char *
169  const std::vector<CalleeSavedInfo> &CSI) {
170  static const char *const SpillLibCalls[] = {
171  "__riscv_save_0",
172  "__riscv_save_1",
173  "__riscv_save_2",
174  "__riscv_save_3",
175  "__riscv_save_4",
176  "__riscv_save_5",
177  "__riscv_save_6",
178  "__riscv_save_7",
179  "__riscv_save_8",
180  "__riscv_save_9",
181  "__riscv_save_10",
182  "__riscv_save_11",
183  "__riscv_save_12"
184  };
185 
186  int LibCallID = getLibCallID(MF, CSI);
187  if (LibCallID == -1)
188  return nullptr;
189  return SpillLibCalls[LibCallID];
190 }
191 
192 // Get the name of the libcall used for restoring callee saved registers.
193 // If this function will not use save/restore libcalls, then return a nullptr.
194 static const char *
196  const std::vector<CalleeSavedInfo> &CSI) {
197  static const char *const RestoreLibCalls[] = {
198  "__riscv_restore_0",
199  "__riscv_restore_1",
200  "__riscv_restore_2",
201  "__riscv_restore_3",
202  "__riscv_restore_4",
203  "__riscv_restore_5",
204  "__riscv_restore_6",
205  "__riscv_restore_7",
206  "__riscv_restore_8",
207  "__riscv_restore_9",
208  "__riscv_restore_10",
209  "__riscv_restore_11",
210  "__riscv_restore_12"
211  };
212 
213  int LibCallID = getLibCallID(MF, CSI);
214  if (LibCallID == -1)
215  return nullptr;
216  return RestoreLibCalls[LibCallID];
217 }
218 
220  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
221 
222  const MachineFrameInfo &MFI = MF.getFrameInfo();
223  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
224  RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
225  MFI.isFrameAddressTaken();
226 }
227 
229  const MachineFrameInfo &MFI = MF.getFrameInfo();
231 
232  return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
233 }
234 
235 // Determines the size of the frame and maximum call frame size.
236 void RISCVFrameLowering::determineFrameLayout(MachineFunction &MF) const {
237  MachineFrameInfo &MFI = MF.getFrameInfo();
238 
239  // Get the number of bytes to allocate from the FrameInfo.
240  uint64_t FrameSize = MFI.getStackSize();
241 
242  // Get the alignment.
244 
245  // Make sure the frame is aligned.
246  FrameSize = alignTo(FrameSize, StackAlign);
247 
248  // Update frame info.
249  MFI.setStackSize(FrameSize);
250 }
251 
252 void RISCVFrameLowering::adjustReg(MachineBasicBlock &MBB,
254  const DebugLoc &DL, Register DestReg,
255  Register SrcReg, int64_t Val,
256  MachineInstr::MIFlag Flag) const {
258  const RISCVInstrInfo *TII = STI.getInstrInfo();
259 
260  if (DestReg == SrcReg && Val == 0)
261  return;
262 
263  if (isInt<12>(Val)) {
264  BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg)
265  .addReg(SrcReg)
266  .addImm(Val)
267  .setMIFlag(Flag);
268  } else {
269  unsigned Opc = RISCV::ADD;
270  bool isSub = Val < 0;
271  if (isSub) {
272  Val = -Val;
273  Opc = RISCV::SUB;
274  }
275 
276  Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
277  TII->movImm(MBB, MBBI, DL, ScratchReg, Val, Flag);
278  BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg)
279  .addReg(SrcReg)
280  .addReg(ScratchReg, RegState::Kill)
281  .setMIFlag(Flag);
282  }
283 }
284 
285 // Returns the register used to hold the frame pointer.
286 static Register getFPReg(const RISCVSubtarget &STI) { return RISCV::X8; }
287 
288 // Returns the register used to hold the stack pointer.
289 static Register getSPReg(const RISCVSubtarget &STI) { return RISCV::X2; }
290 
293  const std::vector<CalleeSavedInfo> &CSI) {
294  const MachineFrameInfo &MFI = MF.getFrameInfo();
295  SmallVector<CalleeSavedInfo, 8> NonLibcallCSI;
296 
297  for (auto &CS : CSI) {
298  int FI = CS.getFrameIdx();
299  if (FI >= 0 && MFI.getStackID(FI) == TargetStackID::Default)
300  NonLibcallCSI.push_back(CS);
301  }
302 
303  return NonLibcallCSI;
304 }
305 
306 void RISCVFrameLowering::adjustStackForRVV(MachineFunction &MF,
309  const DebugLoc &DL,
310  int64_t Amount) const {
311  assert(Amount != 0 && "Did not need to adjust stack pointer for RVV.");
312 
313  const RISCVInstrInfo *TII = STI.getInstrInfo();
314  Register SPReg = getSPReg(STI);
315  unsigned Opc = RISCV::ADD;
316  if (Amount < 0) {
317  Amount = -Amount;
318  Opc = RISCV::SUB;
319  }
320 
321  // 1. Multiply the number of v-slots to the length of registers
322  Register FactorRegister = TII->getVLENFactoredAmount(MF, MBB, MBBI, Amount);
323  // 2. SP = SP - RVV stack size
324  BuildMI(MBB, MBBI, DL, TII->get(Opc), SPReg)
325  .addReg(SPReg)
326  .addReg(FactorRegister, RegState::Kill);
327 }
328 
330  MachineBasicBlock &MBB) const {
331  MachineFrameInfo &MFI = MF.getFrameInfo();
332  auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
333  const RISCVRegisterInfo *RI = STI.getRegisterInfo();
334  const RISCVInstrInfo *TII = STI.getInstrInfo();
336 
337  Register FPReg = getFPReg(STI);
338  Register SPReg = getSPReg(STI);
339  Register BPReg = RISCVABI::getBPReg();
340 
341  // Debug location must be unknown since the first debug location is used
342  // to determine the end of the prologue.
343  DebugLoc DL;
344 
345  // All calls are tail calls in GHC calling conv, and functions have no
346  // prologue/epilogue.
348  return;
349 
350  // Emit prologue for shadow call stack.
351  emitSCSPrologue(MF, MBB, MBBI, DL);
352 
353  // Since spillCalleeSavedRegisters may have inserted a libcall, skip past
354  // any instructions marked as FrameSetup
355  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
356  ++MBBI;
357 
358  // Determine the correct frame layout
359  determineFrameLayout(MF);
360 
361  // If libcalls are used to spill and restore callee-saved registers, the frame
362  // has two sections; the opaque section managed by the libcalls, and the
363  // section managed by MachineFrameInfo which can also hold callee saved
364  // registers in fixed stack slots, both of which have negative frame indices.
365  // This gets even more complicated when incoming arguments are passed via the
366  // stack, as these too have negative frame indices. An example is detailed
367  // below:
368  //
369  // | incoming arg | <- FI[-3]
370  // | libcallspill |
371  // | calleespill | <- FI[-2]
372  // | calleespill | <- FI[-1]
373  // | this_frame | <- FI[0]
374  //
375  // For negative frame indices, the offset from the frame pointer will differ
376  // depending on which of these groups the frame index applies to.
377  // The following calculates the correct offset knowing the number of callee
378  // saved registers spilt by the two methods.
379  if (int LibCallRegs = getLibCallID(MF, MFI.getCalleeSavedInfo()) + 1) {
380  // Calculate the size of the frame managed by the libcall. The libcalls are
381  // implemented such that the stack will always be 16 byte aligned.
382  unsigned LibCallFrameSize = alignTo((STI.getXLen() / 8) * LibCallRegs, 16);
383  RVFI->setLibCallStackSize(LibCallFrameSize);
384  }
385 
386  // FIXME (note copied from Lanai): This appears to be overallocating. Needs
387  // investigation. Get the number of bytes to allocate from the FrameInfo.
388  uint64_t StackSize = MFI.getStackSize() + RVFI->getRVVPadding();
389  uint64_t RealStackSize = StackSize + RVFI->getLibCallStackSize();
390  uint64_t RVVStackSize = RVFI->getRVVStackSize();
391 
392  // Early exit if there is no need to allocate on the stack
393  if (RealStackSize == 0 && !MFI.adjustsStack() && RVVStackSize == 0)
394  return;
395 
396  // If the stack pointer has been marked as reserved, then produce an error if
397  // the frame requires stack allocation
398  if (STI.isRegisterReservedByUser(SPReg))
400  MF.getFunction(), "Stack pointer required, but has been reserved."});
401 
402  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
403  // Split the SP adjustment to reduce the offsets of callee saved spill.
404  if (FirstSPAdjustAmount) {
405  StackSize = FirstSPAdjustAmount;
406  RealStackSize = FirstSPAdjustAmount;
407  }
408 
409  // Allocate space on the stack if necessary.
410  adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup);
411 
412  // Emit ".cfi_def_cfa_offset RealStackSize"
413  unsigned CFIIndex = MF.addFrameInst(
414  MCCFIInstruction::cfiDefCfaOffset(nullptr, RealStackSize));
415  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
416  .addCFIIndex(CFIIndex);
417 
418  const auto &CSI = MFI.getCalleeSavedInfo();
419 
420  // The frame pointer is callee-saved, and code has been generated for us to
421  // save it to the stack. We need to skip over the storing of callee-saved
422  // registers as the frame pointer must be modified after it has been saved
423  // to the stack, not before.
424  // FIXME: assumes exactly one instruction is used to save each callee-saved
425  // register.
426  std::advance(MBBI, getNonLibcallCSI(MF, CSI).size());
427 
428  // Iterate over list of callee-saved registers and emit .cfi_offset
429  // directives.
430  for (const auto &Entry : CSI) {
431  int FrameIdx = Entry.getFrameIdx();
432  int64_t Offset;
433  // Offsets for objects with fixed locations (IE: those saved by libcall) are
434  // simply calculated from the frame index.
435  if (FrameIdx < 0)
436  Offset = FrameIdx * (int64_t) STI.getXLen() / 8;
437  else
438  Offset = MFI.getObjectOffset(Entry.getFrameIdx()) -
439  RVFI->getLibCallStackSize();
440  Register Reg = Entry.getReg();
441  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
442  nullptr, RI->getDwarfRegNum(Reg, true), Offset));
443  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
444  .addCFIIndex(CFIIndex);
445  }
446 
447  // Generate new FP.
448  if (hasFP(MF)) {
449  if (STI.isRegisterReservedByUser(FPReg))
451  MF.getFunction(), "Frame pointer required, but has been reserved."});
452 
453  adjustReg(MBB, MBBI, DL, FPReg, SPReg,
454  RealStackSize - RVFI->getVarArgsSaveSize(),
456 
457  // Emit ".cfi_def_cfa $fp, RVFI->getVarArgsSaveSize()"
458  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
459  nullptr, RI->getDwarfRegNum(FPReg, true), RVFI->getVarArgsSaveSize()));
460  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
461  .addCFIIndex(CFIIndex);
462  }
463 
464  // Emit the second SP adjustment after saving callee saved registers.
465  if (FirstSPAdjustAmount) {
466  uint64_t SecondSPAdjustAmount = MFI.getStackSize() - FirstSPAdjustAmount;
467  assert(SecondSPAdjustAmount > 0 &&
468  "SecondSPAdjustAmount should be greater than zero");
469  adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount,
471 
472  // If we are using a frame-pointer, and thus emitted ".cfi_def_cfa fp, 0",
473  // don't emit an sp-based .cfi_def_cfa_offset
474  if (!hasFP(MF)) {
475  // Emit ".cfi_def_cfa_offset StackSize"
476  unsigned CFIIndex = MF.addFrameInst(
478  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
479  .addCFIIndex(CFIIndex);
480  }
481  }
482 
483  if (RVVStackSize)
484  adjustStackForRVV(MF, MBB, MBBI, DL, -RVVStackSize);
485 
486  if (hasFP(MF)) {
487  // Realign Stack
488  const RISCVRegisterInfo *RI = STI.getRegisterInfo();
489  if (RI->hasStackRealignment(MF)) {
490  Align MaxAlignment = MFI.getMaxAlign();
491 
492  const RISCVInstrInfo *TII = STI.getInstrInfo();
493  if (isInt<12>(-(int)MaxAlignment.value())) {
494  BuildMI(MBB, MBBI, DL, TII->get(RISCV::ANDI), SPReg)
495  .addReg(SPReg)
496  .addImm(-(int)MaxAlignment.value());
497  } else {
498  unsigned ShiftAmount = Log2(MaxAlignment);
499  Register VR =
500  MF.getRegInfo().createVirtualRegister(&RISCV::GPRRegClass);
501  BuildMI(MBB, MBBI, DL, TII->get(RISCV::SRLI), VR)
502  .addReg(SPReg)
503  .addImm(ShiftAmount);
504  BuildMI(MBB, MBBI, DL, TII->get(RISCV::SLLI), SPReg)
505  .addReg(VR)
506  .addImm(ShiftAmount);
507  }
508  // FP will be used to restore the frame in the epilogue, so we need
509  // another base register BP to record SP after re-alignment. SP will
510  // track the current stack after allocating variable sized objects.
511  if (hasBP(MF)) {
512  // move BP, SP
513  TII->copyPhysReg(MBB, MBBI, DL, BPReg, SPReg, false);
514  }
515  }
516  }
517 }
518 
520  MachineBasicBlock &MBB) const {
521  const RISCVRegisterInfo *RI = STI.getRegisterInfo();
522  MachineFrameInfo &MFI = MF.getFrameInfo();
523  auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
524  Register FPReg = getFPReg(STI);
525  Register SPReg = getSPReg(STI);
526 
527  // All calls are tail calls in GHC calling conv, and functions have no
528  // prologue/epilogue.
530  return;
531 
532  // Get the insert location for the epilogue. If there were no terminators in
533  // the block, get the last instruction.
535  DebugLoc DL;
536  if (!MBB.empty()) {
538  if (MBBI == MBB.end())
540  DL = MBBI->getDebugLoc();
541 
542  // If this is not a terminator, the actual insert location should be after the
543  // last instruction.
544  if (!MBBI->isTerminator())
545  MBBI = std::next(MBBI);
546 
547  // If callee-saved registers are saved via libcall, place stack adjustment
548  // before this call.
549  while (MBBI != MBB.begin() &&
550  std::prev(MBBI)->getFlag(MachineInstr::FrameDestroy))
551  --MBBI;
552  }
553 
554  const auto &CSI = getNonLibcallCSI(MF, MFI.getCalleeSavedInfo());
555 
556  // Skip to before the restores of callee-saved registers
557  // FIXME: assumes exactly one instruction is used to restore each
558  // callee-saved register.
559  auto LastFrameDestroy = MBBI;
560  if (!CSI.empty())
561  LastFrameDestroy = std::prev(MBBI, CSI.size());
562 
563  uint64_t StackSize = MFI.getStackSize() + RVFI->getRVVPadding();
564  uint64_t RealStackSize = StackSize + RVFI->getLibCallStackSize();
565  uint64_t FPOffset = RealStackSize - RVFI->getVarArgsSaveSize();
566  uint64_t RVVStackSize = RVFI->getRVVStackSize();
567 
568  // Restore the stack pointer using the value of the frame pointer. Only
569  // necessary if the stack pointer was modified, meaning the stack size is
570  // unknown.
571  if (RI->hasStackRealignment(MF) || MFI.hasVarSizedObjects()) {
572  assert(hasFP(MF) && "frame pointer should not have been eliminated");
573  adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset,
575  } else {
576  if (RVVStackSize)
577  adjustStackForRVV(MF, MBB, LastFrameDestroy, DL, RVVStackSize);
578  }
579 
580  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
581  if (FirstSPAdjustAmount) {
582  uint64_t SecondSPAdjustAmount = MFI.getStackSize() - FirstSPAdjustAmount;
583  assert(SecondSPAdjustAmount > 0 &&
584  "SecondSPAdjustAmount should be greater than zero");
585 
586  adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount,
588  }
589 
590  if (FirstSPAdjustAmount)
591  StackSize = FirstSPAdjustAmount;
592 
593  // Deallocate stack
594  adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy);
595 
596  // Emit epilogue for shadow call stack.
597  emitSCSEpilogue(MF, MBB, MBBI, DL);
598 }
599 
602  Register &FrameReg) const {
603  const MachineFrameInfo &MFI = MF.getFrameInfo();
605  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
606 
607  // Callee-saved registers should be referenced relative to the stack
608  // pointer (positive offset), otherwise use the frame pointer (negative
609  // offset).
610  const auto &CSI = getNonLibcallCSI(MF, MFI.getCalleeSavedInfo());
611  int MinCSFI = 0;
612  int MaxCSFI = -1;
614  auto StackID = MFI.getStackID(FI);
615 
616  assert((StackID == TargetStackID::Default ||
617  StackID == TargetStackID::ScalableVector) &&
618  "Unexpected stack ID for the frame object.");
619  if (StackID == TargetStackID::Default) {
620  Offset =
622  MFI.getOffsetAdjustment());
623  } else if (StackID == TargetStackID::ScalableVector) {
625  }
626 
627  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
628 
629  if (CSI.size()) {
630  MinCSFI = CSI[0].getFrameIdx();
631  MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
632  }
633 
634  if (FI >= MinCSFI && FI <= MaxCSFI) {
635  FrameReg = RISCV::X2;
636 
637  if (FirstSPAdjustAmount)
638  Offset += StackOffset::getFixed(FirstSPAdjustAmount);
639  else
640  Offset +=
641  StackOffset::getFixed(MFI.getStackSize() + RVFI->getRVVPadding());
642  } else if (RI->hasStackRealignment(MF) && !MFI.isFixedObjectIndex(FI)) {
643  // If the stack was realigned, the frame pointer is set in order to allow
644  // SP to be restored, so we need another base register to record the stack
645  // after realignment.
646  if (hasBP(MF)) {
647  FrameReg = RISCVABI::getBPReg();
648  // |--------------------------| -- <-- FP
649  // | callee-saved registers | | <----.
650  // |--------------------------| -- |
651  // | realignment (the size of | | |
652  // | this area is not counted | | |
653  // | in MFI.getStackSize()) | | |
654  // |--------------------------| -- |
655  // | Padding after RVV | | |
656  // | (not counted in | | |
657  // | MFI.getStackSize() | | |
658  // |--------------------------| -- |-- MFI.getStackSize()
659  // | RVV objects | | |
660  // | (not counted in | | |
661  // | MFI.getStackSize() | | |
662  // |--------------------------| -- |
663  // | Padding before RVV | | |
664  // | (not counted in | | |
665  // | MFI.getStackSize() | | |
666  // |--------------------------| -- |
667  // | scalar local variables | | <----'
668  // |--------------------------| -- <-- BP
669  // | VarSize objects | |
670  // |--------------------------| -- <-- SP
671  } else {
672  FrameReg = RISCV::X2;
673  // |--------------------------| -- <-- FP
674  // | callee-saved registers | | <----.
675  // |--------------------------| -- |
676  // | realignment (the size of | | |
677  // | this area is not counted | | |
678  // | in MFI.getStackSize()) | | |
679  // |--------------------------| -- |
680  // | Padding after RVV | | |
681  // | (not counted in | | |
682  // | MFI.getStackSize() | | |
683  // |--------------------------| -- |-- MFI.getStackSize()
684  // | RVV objects | | |
685  // | (not counted in | | |
686  // | MFI.getStackSize() | | |
687  // |--------------------------| -- |
688  // | Padding before RVV | | |
689  // | (not counted in | | |
690  // | MFI.getStackSize() | | |
691  // |--------------------------| -- |
692  // | scalar local variables | | <----'
693  // |--------------------------| -- <-- SP
694  }
695  // The total amount of padding surrounding RVV objects is described by
696  // RVV->getRVVPadding() and it can be zero. It allows us to align the RVV
697  // objects to 8 bytes.
698  if (MFI.getStackID(FI) == TargetStackID::Default) {
700  if (FI < 0)
701  Offset += StackOffset::getFixed(RVFI->getLibCallStackSize());
702  } else if (MFI.getStackID(FI) == TargetStackID::ScalableVector) {
704  alignTo(MFI.getStackSize() - RVFI->getCalleeSavedStackSize(), 8),
705  RVFI->getRVVStackSize());
706  }
707  } else {
708  FrameReg = RI->getFrameRegister(MF);
709  if (hasFP(MF)) {
710  Offset += StackOffset::getFixed(RVFI->getVarArgsSaveSize());
711  if (FI >= 0)
712  Offset -= StackOffset::getFixed(RVFI->getLibCallStackSize());
713  // When using FP to access scalable vector objects, we need to minus
714  // the frame size.
715  //
716  // |--------------------------| -- <-- FP
717  // | callee-saved registers | |
718  // |--------------------------| | MFI.getStackSize()
719  // | scalar local variables | |
720  // |--------------------------| -- (Offset of RVV objects is from here.)
721  // | RVV objects |
722  // |--------------------------|
723  // | VarSize objects |
724  // |--------------------------| <-- SP
727  } else {
728  // When using SP to access frame objects, we need to add RVV stack size.
729  //
730  // |--------------------------| -- <-- FP
731  // | callee-saved registers | | <----.
732  // |--------------------------| -- |
733  // | Padding after RVV | | |
734  // | (not counted in | | |
735  // | MFI.getStackSize() | | |
736  // |--------------------------| -- |
737  // | RVV objects | | |-- MFI.getStackSize()
738  // | (not counted in | | |
739  // | MFI.getStackSize() | | |
740  // |--------------------------| -- |
741  // | Padding before RVV | | |
742  // | (not counted in | | |
743  // | MFI.getStackSize() | | |
744  // |--------------------------| -- |
745  // | scalar local variables | | <----'
746  // |--------------------------| -- <-- SP
747  //
748  // The total amount of padding surrounding RVV objects is described by
749  // RVV->getRVVPadding() and it can be zero. It allows us to align the RVV
750  // objects to 8 bytes.
751  if (MFI.getStackID(FI) == TargetStackID::Default) {
753  if (FI < 0)
754  Offset += StackOffset::getFixed(RVFI->getLibCallStackSize());
755  } else if (MFI.getStackID(FI) == TargetStackID::ScalableVector) {
757  alignTo(MFI.getStackSize() - RVFI->getCalleeSavedStackSize(), 8),
758  RVFI->getRVVStackSize());
759  }
760  }
761  }
762 
763  return Offset;
764 }
765 
767  BitVector &SavedRegs,
768  RegScavenger *RS) const {
770  // Unconditionally spill RA and FP only if the function uses a frame
771  // pointer.
772  if (hasFP(MF)) {
773  SavedRegs.set(RISCV::X1);
774  SavedRegs.set(RISCV::X8);
775  }
776  // Mark BP as used if function has dedicated base pointer.
777  if (hasBP(MF))
778  SavedRegs.set(RISCVABI::getBPReg());
779 
780  // If interrupt is enabled and there are calls in the handler,
781  // unconditionally save all Caller-saved registers and
782  // all FP registers, regardless whether they are used.
783  MachineFrameInfo &MFI = MF.getFrameInfo();
784 
785  if (MF.getFunction().hasFnAttribute("interrupt") && MFI.hasCalls()) {
786 
787  static const MCPhysReg CSRegs[] = { RISCV::X1, /* ra */
788  RISCV::X5, RISCV::X6, RISCV::X7, /* t0-t2 */
789  RISCV::X10, RISCV::X11, /* a0-a1, a2-a7 */
790  RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17,
791  RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, 0 /* t3-t6 */
792  };
793 
794  for (unsigned i = 0; CSRegs[i]; ++i)
795  SavedRegs.set(CSRegs[i]);
796 
797  if (MF.getSubtarget<RISCVSubtarget>().hasStdExtF()) {
798 
799  // If interrupt is enabled, this list contains all FP registers.
800  const MCPhysReg * Regs = MF.getRegInfo().getCalleeSavedRegs();
801 
802  for (unsigned i = 0; Regs[i]; ++i)
803  if (RISCV::FPR16RegClass.contains(Regs[i]) ||
804  RISCV::FPR32RegClass.contains(Regs[i]) ||
805  RISCV::FPR64RegClass.contains(Regs[i]))
806  SavedRegs.set(Regs[i]);
807  }
808  }
809 }
810 
811 int64_t
812 RISCVFrameLowering::assignRVVStackObjectOffsets(MachineFrameInfo &MFI) const {
813  int64_t Offset = 0;
814  // Create a buffer of RVV objects to allocate.
815  SmallVector<int, 8> ObjectsToAllocate;
816  for (int I = 0, E = MFI.getObjectIndexEnd(); I != E; ++I) {
817  unsigned StackID = MFI.getStackID(I);
818  if (StackID != TargetStackID::ScalableVector)
819  continue;
820  if (MFI.isDeadObjectIndex(I))
821  continue;
822 
823  ObjectsToAllocate.push_back(I);
824  }
825 
826  // Allocate all RVV locals and spills
827  for (int FI : ObjectsToAllocate) {
828  // ObjectSize in bytes.
829  int64_t ObjectSize = MFI.getObjectSize(FI);
830  // If the data type is the fractional vector type, reserve one vector
831  // register for it.
832  if (ObjectSize < 8)
833  ObjectSize = 8;
834  // Currently, all scalable vector types are aligned to 8 bytes.
835  Offset = alignTo(Offset + ObjectSize, 8);
836  MFI.setObjectOffset(FI, -Offset);
837  }
838 
839  return Offset;
840 }
841 
843  MachineFunction &MF, RegScavenger *RS) const {
844  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
845  MachineFrameInfo &MFI = MF.getFrameInfo();
846  const TargetRegisterClass *RC = &RISCV::GPRRegClass;
847  auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
848 
849  int64_t RVVStackSize = assignRVVStackObjectOffsets(MFI);
850  RVFI->setRVVStackSize(RVVStackSize);
851 
852  // estimateStackSize has been observed to under-estimate the final stack
853  // size, so give ourselves wiggle-room by checking for stack size
854  // representable an 11-bit signed field rather than 12-bits.
855  // FIXME: It may be possible to craft a function with a small stack that
856  // still needs an emergency spill slot for branch relaxation. This case
857  // would currently be missed.
858  if (!isInt<11>(MFI.estimateStackSize(MF)) || RVVStackSize != 0) {
859  int RegScavFI = MFI.CreateStackObject(RegInfo->getSpillSize(*RC),
860  RegInfo->getSpillAlign(*RC), false);
861  RS->addScavengingFrameIndex(RegScavFI);
862  // For RVV, scalable stack offsets require up to two scratch registers to
863  // compute the final offset. Reserve an additional emergency spill slot.
864  if (RVVStackSize != 0) {
865  int RVVRegScavFI = MFI.CreateStackObject(
866  RegInfo->getSpillSize(*RC), RegInfo->getSpillAlign(*RC), false);
867  RS->addScavengingFrameIndex(RVVRegScavFI);
868  }
869  }
870 
871  if (MFI.getCalleeSavedInfo().empty() || RVFI->useSaveRestoreLibCalls(MF)) {
872  RVFI->setCalleeSavedStackSize(0);
873  return;
874  }
875 
876  unsigned Size = 0;
877  for (const auto &Info : MFI.getCalleeSavedInfo()) {
878  int FrameIdx = Info.getFrameIdx();
879  if (MFI.getStackID(FrameIdx) != TargetStackID::Default)
880  continue;
881 
882  Size += MFI.getObjectSize(FrameIdx);
883  }
884  RVFI->setCalleeSavedStackSize(Size);
885 
886  // Padding required to keep the RVV stack aligned to 8 bytes
887  // within the main stack. We only need this when not using FP.
888  if (RVVStackSize && !hasFP(MF) && Size % 8 != 0) {
889  // Because we add the padding to the size of the stack, adding
890  // getStackAlign() will keep it aligned.
891  RVFI->setRVVPadding(getStackAlign().value());
892  }
893 }
894 
895 // Not preserve stack space within prologue for outgoing variables when the
896 // function contains variable size objects and let eliminateCallFramePseudoInstr
897 // preserve stack space for it.
899  return !MF.getFrameInfo().hasVarSizedObjects();
900 }
901 
902 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions.
906  Register SPReg = RISCV::X2;
907  DebugLoc DL = MI->getDebugLoc();
908 
909  if (!hasReservedCallFrame(MF)) {
910  // If space has not been reserved for a call frame, ADJCALLSTACKDOWN and
911  // ADJCALLSTACKUP must be converted to instructions manipulating the stack
912  // pointer. This is necessary when there is a variable length stack
913  // allocation (e.g. alloca), which means it's not possible to allocate
914  // space for outgoing arguments from within the function prologue.
915  int64_t Amount = MI->getOperand(0).getImm();
916 
917  if (Amount != 0) {
918  // Ensure the stack remains aligned after adjustment.
919  Amount = alignSPAdjust(Amount);
920 
921  if (MI->getOpcode() == RISCV::ADJCALLSTACKDOWN)
922  Amount = -Amount;
923 
924  adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags);
925  }
926  }
927 
928  return MBB.erase(MI);
929 }
930 
931 // We would like to split the SP adjustment to reduce prologue/epilogue
932 // as following instructions. In this way, the offset of the callee saved
933 // register could fit in a single store.
934 // add sp,sp,-2032
935 // sw ra,2028(sp)
936 // sw s0,2024(sp)
937 // sw s1,2020(sp)
938 // sw s3,2012(sp)
939 // sw s4,2008(sp)
940 // add sp,sp,-64
941 uint64_t
943  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
944  const MachineFrameInfo &MFI = MF.getFrameInfo();
945  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
946  uint64_t StackSize = MFI.getStackSize();
947 
948  // Disable SplitSPAdjust if save-restore libcall used. The callee saved
949  // registers will be pushed by the save-restore libcalls, so we don't have to
950  // split the SP adjustment in this case.
951  if (RVFI->getLibCallStackSize())
952  return 0;
953 
954  // Return the FirstSPAdjustAmount if the StackSize can not fit in signed
955  // 12-bit and there exists a callee saved register need to be pushed.
956  if (!isInt<12>(StackSize) && (CSI.size() > 0)) {
957  // FirstSPAdjustAmount is choosed as (2048 - StackAlign)
958  // because 2048 will cause sp = sp + 2048 in epilogue split into
959  // multi-instructions. The offset smaller than 2048 can fit in signle
960  // load/store instruction and we have to stick with the stack alignment.
961  // 2048 is 16-byte alignment. The stack alignment for RV32 and RV64 is 16,
962  // for RV32E is 4. So (2048 - StackAlign) will satisfy the stack alignment.
963  return 2048 - getStackAlign().value();
964  }
965  return 0;
966 }
967 
971  if (CSI.empty())
972  return true;
973 
974  MachineFunction *MF = MBB.getParent();
975  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
976  DebugLoc DL;
977  if (MI != MBB.end() && !MI->isDebugInstr())
978  DL = MI->getDebugLoc();
979 
980  const char *SpillLibCall = getSpillLibCallName(*MF, CSI);
981  if (SpillLibCall) {
982  // Add spill libcall via non-callee-saved register t0.
983  BuildMI(MBB, MI, DL, TII.get(RISCV::PseudoCALLReg), RISCV::X5)
984  .addExternalSymbol(SpillLibCall, RISCVII::MO_CALL)
986 
987  // Add registers spilled in libcall as liveins.
988  for (auto &CS : CSI)
989  MBB.addLiveIn(CS.getReg());
990  }
991 
992  // Manually spill values not spilled by libcall.
993  const auto &NonLibcallCSI = getNonLibcallCSI(*MF, CSI);
994  for (auto &CS : NonLibcallCSI) {
995  // Insert the spill to the stack frame.
996  Register Reg = CS.getReg();
998  TII.storeRegToStackSlot(MBB, MI, Reg, true, CS.getFrameIdx(), RC, TRI);
999  }
1000 
1001  return true;
1002 }
1003 
1007  if (CSI.empty())
1008  return true;
1009 
1010  MachineFunction *MF = MBB.getParent();
1011  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
1012  DebugLoc DL;
1013  if (MI != MBB.end() && !MI->isDebugInstr())
1014  DL = MI->getDebugLoc();
1015 
1016  // Manually restore values not restored by libcall. Insert in reverse order.
1017  // loadRegFromStackSlot can insert multiple instructions.
1018  const auto &NonLibcallCSI = getNonLibcallCSI(*MF, CSI);
1019  for (auto &CS : reverse(NonLibcallCSI)) {
1020  Register Reg = CS.getReg();
1022  TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, TRI);
1023  assert(MI != MBB.begin() && "loadRegFromStackSlot didn't insert any code!");
1024  }
1025 
1026  const char *RestoreLibCall = getRestoreLibCallName(*MF, CSI);
1027  if (RestoreLibCall) {
1028  // Add restore libcall via tail call.
1030  BuildMI(MBB, MI, DL, TII.get(RISCV::PseudoTAIL))
1031  .addExternalSymbol(RestoreLibCall, RISCVII::MO_CALL)
1033 
1034  // Remove trailing returns, since the terminator is now a tail call to the
1035  // restore function.
1036  if (MI != MBB.end() && MI->getOpcode() == RISCV::PseudoRET) {
1037  NewMI->copyImplicitOps(*MF, *MI);
1038  MI->eraseFromParent();
1039  }
1040  }
1041 
1042  return true;
1043 }
1044 
1046  MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
1047  const MachineFunction *MF = MBB.getParent();
1048  const auto *RVFI = MF->getInfo<RISCVMachineFunctionInfo>();
1049 
1050  if (!RVFI->useSaveRestoreLibCalls(*MF))
1051  return true;
1052 
1053  // Inserting a call to a __riscv_save libcall requires the use of the register
1054  // t0 (X5) to hold the return address. Therefore if this register is already
1055  // used we can't insert the call.
1056 
1057  RegScavenger RS;
1058  RS.enterBasicBlock(*TmpMBB);
1059  return !RS.isRegUsed(RISCV::X5);
1060 }
1061 
1063  const MachineFunction *MF = MBB.getParent();
1064  MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
1065  const auto *RVFI = MF->getInfo<RISCVMachineFunctionInfo>();
1066 
1067  if (!RVFI->useSaveRestoreLibCalls(*MF))
1068  return true;
1069 
1070  // Using the __riscv_restore libcalls to restore CSRs requires a tail call.
1071  // This means if we still need to continue executing code within this function
1072  // the restore cannot take place in this basic block.
1073 
1074  if (MBB.succ_size() > 1)
1075  return false;
1076 
1077  MachineBasicBlock *SuccMBB =
1078  MBB.succ_empty() ? TmpMBB->getFallThrough() : *MBB.succ_begin();
1079 
1080  // Doing a tail call should be safe if there are no successors, because either
1081  // we have a returning block or the end of the block is unreachable, so the
1082  // restore will be eliminated regardless.
1083  if (!SuccMBB)
1084  return true;
1085 
1086  // The successor can only contain a return, since we would effectively be
1087  // replacing the successor with our own tail return at the end of our block.
1088  return SuccMBB->isReturnBlock() && SuccMBB->size() == 1;
1089 }
1090 
1092  switch (ID) {
1095  return true;
1098  return false;
1099  }
1100  llvm_unreachable("Invalid TargetStackID::Value");
1101 }
1102 
1105 }
llvm::ISD::SUB
@ SUB
Definition: ISDOpcodes.h:233
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
i
i
Definition: README.txt:29
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:158
getSpillLibCallName
static const char * getSpillLibCallName(const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
Definition: RISCVFrameLowering.cpp:168
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:351
llvm::MachineBasicBlock::succ_size
unsigned succ_size() const
Definition: MachineBasicBlock.h:344
llvm::RISCVAttrs::StackAlign
StackAlign
Definition: RISCVAttributes.h:37
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:100
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:132
llvm::MachineFrameInfo::estimateStackSize
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
Definition: MachineFrameInfo.cpp:137
llvm
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::none_of
bool none_of(R &&Range, UnaryPredicate P)
Provide wrappers to std::none_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1519
llvm::RISCVFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: RISCVFrameLowering.cpp:968
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:158
llvm::DiagnosticInfoUnsupported
Diagnostic information for unsupported feature in backend.
Definition: DiagnosticInfo.h:993
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:343
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::Register::id
unsigned id() const
Definition: Register.h:111
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:248
llvm::ARM_MB::LD
@ LD
Definition: ARMBaseInfo.h:72
llvm::RISCVRegisterInfo
Definition: RISCVRegisterInfo.h:23
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::RISCVSubtarget::isRegisterReservedByUser
bool isRegisterReservedByUser(Register i) const
Definition: RISCVSubtarget.h:133
llvm::MachineFrameInfo::getOffsetAdjustment
int getOffsetAdjustment() const
Return the correction for frame offsets.
Definition: MachineFrameInfo.h:572
llvm::MachineBasicBlock::isReturnBlock
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
Definition: MachineBasicBlock.h:718
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
getRestoreLibCallName
static const char * getRestoreLibCallName(const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
Definition: RISCVFrameLowering.cpp:195
llvm::Function::getContext
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function.
Definition: Function.cpp:316
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:149
llvm::RISCVFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: RISCVFrameLowering.cpp:898
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:566
llvm::reverse
auto reverse(ContainerTy &&C, std::enable_if_t< has_rbegin< ContainerTy >::value > *=nullptr)
Definition: STLExtras.h:338
llvm::RISCVFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: RISCVFrameLowering.cpp:601
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:345
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::MachineFrameInfo::getObjectIndexEnd
int getObjectIndexEnd() const
Return one past the maximum frame object index.
Definition: MachineFrameInfo.h:391
getFPReg
static Register getFPReg(const RISCVSubtarget &STI)
Definition: RISCVFrameLowering.cpp:286
llvm::RISCVABI::getBPReg
MCRegister getBPReg()
Definition: RISCVBaseInfo.cpp:81
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:158
llvm::RISCVFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: RISCVFrameLowering.cpp:329
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:502
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:84
llvm::RegScavenger::isRegUsed
bool isRegUsed(Register Reg, bool includeReserved=true) const
Return if a specific register is currently used.
Definition: RegisterScavenging.cpp:262
llvm::RISCVII::MO_CALL
@ MO_CALL
Definition: RISCVBaseInfo.h:91
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1324
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:565
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::TargetFrameLowering::getOffsetOfLocalArea
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Definition: TargetFrameLowering.h:147
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:305
llvm::RISCVFrameLowering::STI
const RISCVSubtarget & STI
Definition: RISCVFrameLowering.h:72
llvm::CallingConv::GHC
@ GHC
Definition: CallingConv.h:51
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:653
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:99
llvm::Log2
unsigned Log2(Align A)
Returns the log2 of the alignment.
Definition: Alignment.h:217
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::RISCVFrameLowering::canUseAsPrologue
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
Definition: RISCVFrameLowering.cpp:1045
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:82
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
llvm::MachineFrameInfo::getStackID
uint8_t getStackID(int ObjectIdx) const
Definition: MachineFrameInfo.h:720
llvm::RISCVABI::getSCSPReg
MCRegister getSCSPReg()
Definition: RISCVBaseInfo.cpp:84
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:45
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:563
llvm::MachineFrameInfo::getObjectOffset
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Definition: MachineFrameInfo.h:504
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:26
llvm::RISCVFrameLowering::getFirstSPAdjustAmount
uint64_t getFirstSPAdjustAmount(const MachineFunction &MF) const
Definition: RISCVFrameLowering.cpp:942
llvm::BitVector
Definition: BitVector.h:74
llvm::RISCVSubtarget::getInstrInfo
const RISCVInstrInfo * getInstrInfo() const override
Definition: RISCVSubtarget.h:93
llvm::StackOffset::getScalable
ScalarTy getScalable() const
Definition: TypeSize.h:150
llvm::MachineFrameInfo::isFixedObjectIndex
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
Definition: MachineFrameInfo.h:677
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::MachineInstrBuilder::addExternalSymbol
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:185
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:49
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MachineFrameInfo::isDeadObjectIndex
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Definition: MachineFrameInfo.h:734
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:24
llvm::TargetRegisterInfo::getSpillAlign
Align getSpillAlign(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class.
Definition: TargetRegisterInfo.h:292
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:555
llvm::MachineInstrBuilder::setMIFlag
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
Definition: MachineInstrBuilder.h:279
llvm::TargetFrameLowering::alignSPAdjust
int alignSPAdjust(int SPAdj) const
alignSPAdjust - This method aligns the stack adjustment to the correct alignment.
Definition: TargetFrameLowering.h:104
llvm::TargetRegisterInfo::getSpillSize
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
Definition: TargetRegisterInfo.h:280
llvm::MachineFrameInfo::getObjectSize
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
Definition: MachineFrameInfo.h:451
llvm::Function::getCallingConv
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:228
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:913
llvm::TargetRegisterInfo::getFrameRegister
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
llvm::MachineRegisterInfo::getCalleeSavedRegs
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
Definition: MachineRegisterInfo.cpp:620
emitSCSPrologue
static void emitSCSPrologue(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL)
Definition: RISCVFrameLowering.cpp:28
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::RegScavenger
Definition: RegisterScavenging.h:34
llvm::MachineFrameInfo::setObjectOffset
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
Definition: MachineFrameInfo.h:538
llvm::TargetStackID::ScalableVector
@ ScalableVector
Definition: TargetFrameLowering.h:30
llvm::RISCVMachineFunctionInfo
RISCVMachineFunctionInfo - This class is derived from MachineFunctionInfo and contains private RISCV-...
Definition: RISCVMachineFunctionInfo.h:24
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:266
llvm::RISCVSubtarget
Definition: RISCVSubtarget.h:35
llvm::MachineInstr::NoFlags
@ NoFlags
Definition: MachineInstr.h:81
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:115
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineBasicBlock::size
unsigned size() const
Definition: MachineBasicBlock.h:239
llvm::RISCVFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: RISCVFrameLowering.cpp:903
llvm::MachineBasicBlock::succ_begin
succ_iterator succ_begin()
Definition: MachineBasicBlock.h:332
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:571
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:225
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:123
llvm::MCCFIInstruction::cfiDefCfa
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
Definition: MCDwarf.h:488
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:98
llvm::MachineInstr::MIFlag
MIFlag
Definition: MachineInstr.h:80
llvm::MachineFunction
Definition: MachineFunction.h:227
llvm::size
auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)
Get the size of a range.
Definition: STLExtras.h:1486
llvm::MachineBasicBlock::succ_empty
bool succ_empty() const
Definition: MachineBasicBlock.h:347
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:796
llvm::MachineBasicBlock::getFirstTerminator
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
Definition: MachineBasicBlock.cpp:241
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::RISCVInstrInfo
Definition: RISCVInstrInfo.h:27
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::HexagonInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
Definition: HexagonInstrInfo.cpp:958
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::RISCVSubtarget::getRegisterInfo
const RISCVRegisterInfo * getRegisterInfo() const override
Definition: RISCVSubtarget.h:94
llvm::TargetStackID::NoAlloc
@ NoAlloc
Definition: TargetFrameLowering.h:31
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::RISCVFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: RISCVFrameLowering.cpp:219
emitSCSEpilogue
static void emitSCSEpilogue(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL)
Definition: RISCVFrameLowering.cpp:77
llvm::RISCVFrameLowering::processFunctionBeforeFrameFinalized
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: RISCVFrameLowering.cpp:842
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::MachineFrameInfo::getMaxAlign
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Definition: MachineFrameInfo.h:585
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MachineFrameInfo::isFrameAddressTaken
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Definition: MachineFrameInfo.h:366
llvm::RegScavenger::enterBasicBlock
void enterBasicBlock(MachineBasicBlock &MBB)
Start tracking liveness from the begin of basic block MBB.
Definition: RegisterScavenging.cpp:84
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:602
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::LLVMContext::diagnose
void diagnose(const DiagnosticInfo &DI)
Report a message to the currently installed diagnostic handler.
Definition: LLVMContext.cpp:228
llvm::RISCVFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: RISCVFrameLowering.cpp:519
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:521
llvm::CalleeSavedInfo
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
Definition: MachineFrameInfo.h:34
uint16_t
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:551
MachineFrameInfo.h
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
llvm::RISCVFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: RISCVFrameLowering.cpp:1004
DiagnosticInfo.h
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::RISCVSubtarget::getXLen
unsigned getXLen() const
Definition: RISCVSubtarget.h:131
llvm::TargetStackID::Default
@ Default
Definition: TargetFrameLowering.h:28
llvm::TargetStackID::SGPRSpill
@ SGPRSpill
Definition: TargetFrameLowering.h:29
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:232
llvm::MachineBasicBlock::getFallThrough
MachineBasicBlock * getFallThrough()
Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...
Definition: MachineBasicBlock.cpp:942
RISCVSubtarget.h
llvm::TargetRegisterInfo::hasStackRealignment
bool hasStackRealignment(const MachineFunction &MF) const
True if stack realignment is required and still possible.
Definition: TargetRegisterInfo.h:920
llvm::MachineFunction::addFrameInst
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Definition: MachineFunction.cpp:285
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
getLibCallID
static int getLibCallID(const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
Definition: RISCVFrameLowering.cpp:129
llvm::RISCVFrameLowering::getStackIDForScalableVectors
TargetStackID::Value getStackIDForScalableVectors() const override
Returns the StackID that scalable vectors should be associated with.
Definition: RISCVFrameLowering.cpp:1103
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
MachineInstrBuilder.h
getSPReg
static Register getSPReg(const RISCVSubtarget &STI)
Definition: RISCVFrameLowering.cpp:289
RISCVFrameLowering.h
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:329
RISCVMachineFunctionInfo.h
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:350
llvm::RISCVFrameLowering::canUseAsEpilogue
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
Definition: RISCVFrameLowering.cpp:1062
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:240
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:515
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:78
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MachineFrameInfo::adjustsStack
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Definition: MachineFrameInfo.h:598
llvm::RISCVFrameLowering::isSupportedStackID
bool isSupportedStackID(TargetStackID::Value ID) const override
Definition: RISCVFrameLowering.cpp:1091
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:211
RegisterScavenging.h
llvm::RISCVFrameLowering::hasBP
bool hasBP(const MachineFunction &MF) const
Definition: RISCVFrameLowering.cpp:228
llvm::RISCVFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: RISCVFrameLowering.cpp:766
MachineFunction.h
llvm::MachineInstrBundleIterator
MachineBasicBlock iterator that automatically skips over MIs that are inside bundles (i....
Definition: MachineInstrBundleIterator.h:108
llvm::RISCVSubtarget::hasStdExtF
bool hasStdExtF() const
Definition: RISCVSubtarget.h:106
llvm::HexagonInstrInfo::copyPhysReg
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
Emit instructions to copy a pair of physical registers.
Definition: HexagonInstrInfo.cpp:812
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
getNonLibcallCSI
static SmallVector< CalleeSavedInfo, 8 > getNonLibcallCSI(const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
Definition: RISCVFrameLowering.cpp:292
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38
llvm::StackOffset::get
static StackOffset get(ScalarTy Fixed, ScalarTy Scalable)
Definition: TypeSize.h:145