LLVM  15.0.0git
Public Member Functions | Protected Attributes | List of all members
llvm::RISCVInstrInfo Class Reference

#include "Target/RISCV/RISCVInstrInfo.h"

Inheritance diagram for llvm::RISCVInstrInfo:
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Collaboration diagram for llvm::RISCVInstrInfo:
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Public Member Functions

 RISCVInstrInfo (RISCVSubtarget &STI)
 
MCInst getNop () const override
 
const MCInstrDescgetBrCond (RISCVCC::CondCode CC) const
 
unsigned isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 
unsigned isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, MCRegister DstReg, MCRegister SrcReg, bool KillSrc) const override
 
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
 
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DstReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
 
void movImm (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, Register DstReg, uint64_t Val, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) const
 
unsigned getInstSizeInBytes (const MachineInstr &MI) const override
 
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
 
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &dl, int *BytesAdded=nullptr) const override
 
void insertIndirectBranch (MachineBasicBlock &MBB, MachineBasicBlock &NewDestBB, MachineBasicBlock &RestoreBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS) const override
 
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
 
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
 
MachineBasicBlockgetBranchDestBlock (const MachineInstr &MI) const override
 
bool isBranchOffsetInRange (unsigned BranchOpc, int64_t BrOffset) const override
 
bool isAsCheapAsAMove (const MachineInstr &MI) const override
 
Optional< DestSourcePairisCopyInstrImpl (const MachineInstr &MI) const override
 
bool verifyInstruction (const MachineInstr &MI, StringRef &ErrInfo) const override
 
bool getMemOperandWithOffsetWidth (const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, unsigned &Width, const TargetRegisterInfo *TRI) const
 
bool areMemAccessesTriviallyDisjoint (const MachineInstr &MIa, const MachineInstr &MIb) const override
 
std::pair< unsigned, unsigned > decomposeMachineOperandsTargetFlags (unsigned TF) const override
 
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags () const override
 
virtual bool isFunctionSafeToOutlineFrom (MachineFunction &MF, bool OutlineFromLinkOnceODRs) const override
 
virtual bool isMBBSafeToOutlineFrom (MachineBasicBlock &MBB, unsigned &Flags) const override
 
bool shouldOutlineFromFunctionByDefault (MachineFunction &MF) const override
 
outliner::OutlinedFunction getOutliningCandidateInfo (std::vector< outliner::Candidate > &RepeatedSequenceLocs) const override
 
virtual outliner::InstrType getOutliningType (MachineBasicBlock::iterator &MBBI, unsigned Flags) const override
 
virtual void buildOutlinedFrame (MachineBasicBlock &MBB, MachineFunction &MF, const outliner::OutlinedFunction &OF) const override
 
virtual MachineBasicBlock::iterator insertOutlinedCall (Module &M, MachineBasicBlock &MBB, MachineBasicBlock::iterator &It, MachineFunction &MF, outliner::Candidate &C) const override
 
bool findCommutedOpIndices (const MachineInstr &MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const override
 
MachineInstrcommuteInstructionImpl (MachineInstr &MI, bool NewMI, unsigned OpIdx1, unsigned OpIdx2) const override
 
MachineInstrconvertToThreeAddress (MachineInstr &MI, LiveVariables *LV, LiveIntervals *LIS) const override
 
std::string createMIROperandComment (const MachineInstr &MI, const MachineOperand &Op, unsigned OpIdx, const TargetRegisterInfo *TRI) const override
 
Register getVLENFactoredAmount (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, const DebugLoc &DL, int64_t Amount, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) const
 

Protected Attributes

const RISCVSubtargetSTI
 

Detailed Description

Definition at line 44 of file RISCVInstrInfo.h.

Constructor & Destructor Documentation

◆ RISCVInstrInfo()

RISCVInstrInfo::RISCVInstrInfo ( RISCVSubtarget STI)
explicit

Definition at line 56 of file RISCVInstrInfo.cpp.

Member Function Documentation

◆ analyzeBranch()

bool RISCVInstrInfo::analyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify 
) const
override

◆ areMemAccessesTriviallyDisjoint()

bool RISCVInstrInfo::areMemAccessesTriviallyDisjoint ( const MachineInstr MIa,
const MachineInstr MIb 
) const
override

◆ buildOutlinedFrame()

void RISCVInstrInfo::buildOutlinedFrame ( MachineBasicBlock MBB,
MachineFunction MF,
const outliner::OutlinedFunction OF 
) const
overridevirtual

◆ commuteInstructionImpl()

MachineInstr * RISCVInstrInfo::commuteInstructionImpl ( MachineInstr MI,
bool  NewMI,
unsigned  OpIdx1,
unsigned  OpIdx2 
) const
override

◆ convertToThreeAddress()

MachineInstr * RISCVInstrInfo::convertToThreeAddress ( MachineInstr MI,
LiveVariables LV,
LiveIntervals LIS 
) const
override

◆ copyPhysReg()

void RISCVInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
const DebugLoc DL,
MCRegister  DstReg,
MCRegister  SrcReg,
bool  KillSrc 
) const
override

◆ createMIROperandComment()

std::string RISCVInstrInfo::createMIROperandComment ( const MachineInstr MI,
const MachineOperand Op,
unsigned  OpIdx,
const TargetRegisterInfo TRI 
) const
override

◆ decomposeMachineOperandsTargetFlags()

std::pair< unsigned, unsigned > RISCVInstrInfo::decomposeMachineOperandsTargetFlags ( unsigned  TF) const
override

◆ findCommutedOpIndices()

bool RISCVInstrInfo::findCommutedOpIndices ( const MachineInstr MI,
unsigned &  SrcOpIdx1,
unsigned &  SrcOpIdx2 
) const
override

◆ getBranchDestBlock()

MachineBasicBlock * RISCVInstrInfo::getBranchDestBlock ( const MachineInstr MI) const
override

Definition at line 942 of file RISCVInstrInfo.cpp.

References assert(), and MI.

Referenced by analyzeBranch().

◆ getBrCond()

const MCInstrDesc & RISCVInstrInfo::getBrCond ( RISCVCC::CondCode  CC) const

◆ getInstSizeInBytes()

unsigned RISCVInstrInfo::getInstSizeInBytes ( const MachineInstr MI) const
override

◆ getMemOperandWithOffsetWidth()

bool RISCVInstrInfo::getMemOperandWithOffsetWidth ( const MachineInstr LdSt,
const MachineOperand *&  BaseOp,
int64_t &  Offset,
unsigned &  Width,
const TargetRegisterInfo TRI 
) const

◆ getNop()

MCInst RISCVInstrInfo::getNop ( ) const
override

◆ getOutliningCandidateInfo()

outliner::OutlinedFunction RISCVInstrInfo::getOutliningCandidateInfo ( std::vector< outliner::Candidate > &  RepeatedSequenceLocs) const
override

Definition at line 1212 of file RISCVInstrInfo.cpp.

References E, llvm::erase_if(), getInstSizeInBytes(), I, MachineOutlinerDefault, and TRI.

◆ getOutliningType()

outliner::InstrType RISCVInstrInfo::getOutliningType ( MachineBasicBlock::iterator MBBI,
unsigned  Flags 
) const
overridevirtual

◆ getSerializableDirectMachineOperandTargetFlags()

ArrayRef< std::pair< unsigned, const char * > > RISCVInstrInfo::getSerializableDirectMachineOperandTargetFlags ( ) const
override

◆ getVLENFactoredAmount()

Register RISCVInstrInfo::getVLENFactoredAmount ( MachineFunction MF,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  II,
const DebugLoc DL,
int64_t  Amount,
MachineInstr::MIFlag  Flag = MachineInstr::NoFlags 
) const

◆ insertBranch()

unsigned RISCVInstrInfo::insertBranch ( MachineBasicBlock MBB,
MachineBasicBlock TBB,
MachineBasicBlock FBB,
ArrayRef< MachineOperand Cond,
const DebugLoc dl,
int BytesAdded = nullptr 
) const
override

◆ insertIndirectBranch()

void RISCVInstrInfo::insertIndirectBranch ( MachineBasicBlock MBB,
MachineBasicBlock NewDestBB,
MachineBasicBlock RestoreBB,
const DebugLoc DL,
int64_t  BrOffset,
RegScavenger RS 
) const
override

◆ insertOutlinedCall()

MachineBasicBlock::iterator RISCVInstrInfo::insertOutlinedCall ( Module M,
MachineBasicBlock MBB,
MachineBasicBlock::iterator It,
MachineFunction MF,
outliner::Candidate C 
) const
overridevirtual

◆ isAsCheapAsAMove()

bool RISCVInstrInfo::isAsCheapAsAMove ( const MachineInstr MI) const
override

Definition at line 999 of file RISCVInstrInfo.cpp.

References MI.

◆ isBranchOffsetInRange()

bool RISCVInstrInfo::isBranchOffsetInRange ( unsigned  BranchOpc,
int64_t  BrOffset 
) const
override

◆ isCopyInstrImpl()

Optional< DestSourcePair > RISCVInstrInfo::isCopyInstrImpl ( const MachineInstr MI) const
override

Definition at line 1021 of file RISCVInstrInfo.cpp.

References MI, and llvm::None.

◆ isFunctionSafeToOutlineFrom()

bool RISCVInstrInfo::isFunctionSafeToOutlineFrom ( MachineFunction MF,
bool  OutlineFromLinkOnceODRs 
) const
overridevirtual

Definition at line 1179 of file RISCVInstrInfo.cpp.

References F, and llvm::MachineFunction::getFunction().

◆ isLoadFromStackSlot()

unsigned RISCVInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int FrameIndex 
) const
override

Definition at line 69 of file RISCVInstrInfo.cpp.

References llvm::X86ISD::FLD, llvm::ISD::FrameIndex, llvm::ARM_MB::LD, and MI.

◆ isMBBSafeToOutlineFrom()

bool RISCVInstrInfo::isMBBSafeToOutlineFrom ( MachineBasicBlock MBB,
unsigned &  Flags 
) const
overridevirtual

Definition at line 1196 of file RISCVInstrInfo.cpp.

References llvm::TargetInstrInfo::isMBBSafeToOutlineFrom(), and MBB.

◆ isStoreToStackSlot()

unsigned RISCVInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int FrameIndex 
) const
override

Definition at line 96 of file RISCVInstrInfo.cpp.

References llvm::ISD::FrameIndex, and MI.

◆ loadRegFromStackSlot()

void RISCVInstrInfo::loadRegFromStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
Register  DstReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const
override

◆ movImm()

void RISCVInstrInfo::movImm ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
const DebugLoc DL,
Register  DstReg,
uint64_t  Val,
MachineInstr::MIFlag  Flag = MachineInstr::NoFlags 
) const

◆ removeBranch()

unsigned RISCVInstrInfo::removeBranch ( MachineBasicBlock MBB,
int BytesRemoved = nullptr 
) const
override

◆ reverseBranchCondition()

bool RISCVInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Cond) const
override

Definition at line 933 of file RISCVInstrInfo.cpp.

References assert(), Cond, and getOppositeBranchCondition().

◆ shouldOutlineFromFunctionByDefault()

bool RISCVInstrInfo::shouldOutlineFromFunctionByDefault ( MachineFunction MF) const
override

◆ storeRegToStackSlot()

void RISCVInstrInfo::storeRegToStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
Register  SrcReg,
bool  IsKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const
override

◆ verifyInstruction()

bool RISCVInstrInfo::verifyInstruction ( const MachineInstr MI,
StringRef ErrInfo 
) const
override

Member Data Documentation

◆ STI

const RISCVSubtarget& llvm::RISCVInstrInfo::STI
protected

The documentation for this class was generated from the following files: