SelectionDAGBuilder.cpp File Reference

#include "SelectionDAGBuilder.h"
#include "SDNodeDbgValue.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/None.h"
#include "llvm/ADT/Optional.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Triple.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/BlockFrequencyInfo.h"
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/EHPersonalities.h"
#include "llvm/Analysis/Loads.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/Analysis/ProfileSummaryInfo.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Analysis/VectorUtils.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/GCMetadata.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/CodeGen/SwiftErrorValueTracking.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
#include "llvm/IR/Argument.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constant.h"
#include "llvm/IR/ConstantRange.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GetElementPtrTypeIterator.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsAArch64.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/Operator.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/IR/Statepoint.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/User.h"
#include "llvm/IR/Value.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/Utils/Local.h"
#include <cstddef>
#include <cstring>
#include <iterator>
#include <limits>
#include <numeric>
#include <tuple>
#include "llvm/IR/Instruction.def"
#include "llvm/IR/ConstrainedOps.def"
#include "llvm/IR/VPIntrinsics.def"
#include "llvm/CodeGen/SelectionDAGISel.h"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "isel"
#define	HANDLE_INST(NUM, OPCODE, CLASS)   case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break;
#define	INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC)   case Intrinsic::INTRINSIC:
#define	BEGIN_REGISTER_VP_INTRINSIC(VPID, ...)   case Intrinsic::VPID:
#define	DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN)
#define	BEGIN_REGISTER_VP_INTRINSIC(INTRIN, ...)   case Intrinsic::INTRIN:
#define	BEGIN_REGISTER_VP_SDNODE(VPSDID, ...)   ResOPC = ISD::VPSDID;
#define	END_REGISTER_VP_INTRINSIC(...)   break;

Typedefs
using	ArgCopyElisionMapTy = DenseMap< const Argument *, std::pair< const AllocaInst *, const StoreInst * > >

Functions
static SDValue	getCopyFromPartsVector (SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, Optional< CallingConv::ID > CallConv)
	getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent. More...
static SDValue	getCopyFromParts (SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, Optional< CallingConv::ID > CC=None, Optional< ISD::NodeType > AssertOp=None)
	getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent. More...
static void	diagnosePossiblyInvalidConstraint (LLVMContext &Ctx, const Value *V, const Twine &ErrMsg)
static void	getCopyToPartsVector (SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, Optional< CallingConv::ID > CallConv)
	getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts. More...
static void	getCopyToParts (SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, Optional< CallingConv::ID > CallConv=None, ISD::NodeType ExtendKind=ISD::ANY_EXTEND)
	getCopyToParts - Create a series of nodes that contain the specified value split into legal parts. More...
static SDValue	widenVectorToPartType (SelectionDAG &DAG, SDValue Val, const SDLoc &DL, EVT PartVT)
static void	findWasmUnwindDestinations (FunctionLoweringInfo &FuncInfo, const BasicBlock *EHPadBB, BranchProbability Prob, SmallVectorImpl< std::pair< MachineBasicBlock *, BranchProbability >> &UnwindDests)
static void	findUnwindDestinations (FunctionLoweringInfo &FuncInfo, const BasicBlock *EHPadBB, BranchProbability Prob, SmallVectorImpl< std::pair< MachineBasicBlock *, BranchProbability >> &UnwindDests)
	When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately go. More...
static bool	InBlock (const Value *V, const BasicBlock *BB)
static SDValue	getLoadStackGuard (SelectionDAG &DAG, const SDLoc &DL, SDValue &Chain)
	Create a LOAD_STACK_GUARD node, and let it carry the target specific global variable if there exists one. More...
static bool	hasOnlySelectUsers (const Value *Cond)
static bool	getUniformBase (const Value *Ptr, SDValue &Base, SDValue &Index, ISD::MemIndexType &IndexType, SDValue &Scale, SelectionDAGBuilder *SDB, const BasicBlock *CurBB)
static SDValue	GetSignificand (SelectionDAG &DAG, SDValue Op, const SDLoc &dl)
	GetSignificand - Get the significand and build it into a floating-point number with exponent of 1: More...
static SDValue	GetExponent (SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, const SDLoc &dl)
	GetExponent - Get the exponent: More...
static SDValue	getF32Constant (SelectionDAG &DAG, unsigned Flt, const SDLoc &dl)
	getF32Constant - Get 32-bit floating point constant. More...
static SDValue	getLimitedPrecisionExp2 (SDValue t0, const SDLoc &dl, SelectionDAG &DAG)
static SDValue	expandExp (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags)
	expandExp - Lower an exp intrinsic. More...
static SDValue	expandLog (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags)
	expandLog - Lower a log intrinsic. More...
static SDValue	expandLog2 (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags)
	expandLog2 - Lower a log2 intrinsic. More...
static SDValue	expandLog10 (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags)
	expandLog10 - Lower a log10 intrinsic. More...
static SDValue	expandExp2 (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags)
	expandExp2 - Lower an exp2 intrinsic. More...
static SDValue	expandPow (const SDLoc &dl, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags)
	visitPow - Lower a pow intrinsic. More...
static SDValue	ExpandPowI (const SDLoc &DL, SDValue LHS, SDValue RHS, SelectionDAG &DAG)
	ExpandPowI - Expand a llvm.powi intrinsic. More...
static SDValue	expandDivFix (unsigned Opcode, const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue Scale, SelectionDAG &DAG, const TargetLowering &TLI)
static void	getUnderlyingArgRegs (SmallVectorImpl< std::pair< unsigned, TypeSize >> &Regs, const SDValue &N)
static unsigned	FixedPointIntrinsicToOpcode (unsigned Intrinsic)
static const CallBase *	FindPreallocatedCall (const Value *PreallocatedSetup)
	Given a @llvm.call.preallocated.setup, return the corresponding preallocated call. More...
static unsigned	getISDForVPIntrinsic (const VPIntrinsic &VPIntrin)
static SDValue	getMemCmpLoad (const Value *PtrVal, MVT LoadVT, SelectionDAGBuilder &Builder)
static void	patchMatchingInput (const SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &MatchingOpInfo, SelectionDAG &DAG)
	Make sure that the output operand OpInfo and its corresponding input operand MatchingOpInfo have compatible constraint types (otherwise error out). More...
static SDValue	getAddressForMemoryInput (SDValue Chain, const SDLoc &Location, SDISelAsmOperandInfo &OpInfo, SelectionDAG &DAG)
	Get a direct memory input to behave well as an indirect operand. More...
static void	GetRegistersForValue (SelectionDAG &DAG, const SDLoc &DL, SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &RefOpInfo)
	GetRegistersForValue - Assign registers (virtual or physical) for the specified operand. More...
static unsigned	findMatchingInlineAsmOperand (unsigned OperandNo, const std::vector< SDValue > &AsmNodeOperands)
static void	addStackMapLiveVars (const CallBase &Call, unsigned StartIdx, const SDLoc &DL, SmallVectorImpl< SDValue > &Ops, SelectionDAGBuilder &Builder)
	Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list. More...
static AttributeList	getReturnAttrs (TargetLowering::CallLoweringInfo &CLI)
	Returns an AttributeList representing the attributes applied to the return value of the given call. More...
static bool	isOnlyUsedInEntryBlock (const Argument *A, bool FastISel)
	isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true. More...
static void	findArgumentCopyElisionCandidates (const DataLayout &DL, FunctionLoweringInfo *FuncInfo, ArgCopyElisionMapTy &ArgCopyElisionCandidates)
	Scan the entry block of the function in FuncInfo for arguments that look like copies into a local alloca. More...
static void	tryToElideArgumentCopy (FunctionLoweringInfo &FuncInfo, SmallVectorImpl< SDValue > &Chains, DenseMap< int, int > &ArgCopyElisionFrameIndexMap, SmallPtrSetImpl< const Instruction * > &ElidedArgCopyInstrs, ArgCopyElisionMapTy &ArgCopyElisionCandidates, const Argument &Arg, SDValue ArgVal, bool &ArgHasUses)
	Try to elide argument copies from memory into a local alloca. More...
static BranchProbability	scaleCaseProbality (BranchProbability CaseProb, BranchProbability PeeledCaseProb)

Variables
static unsigned	LimitFloatPrecision
	LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits). More...
static cl::opt< bool >	InsertAssertAlign ("insert-assert-align", cl::init(true), cl::desc("Insert the experimental `assertalign` node."), cl::ReallyHidden)
static cl::opt< unsigned, true >	LimitFPPrecision ("limit-float-precision", cl::desc("Generate low-precision inline sequences " "for some float libcalls"), cl::location(LimitFloatPrecision), cl::Hidden, cl::init(0))
static cl::opt< unsigned >	SwitchPeelThreshold ("switch-peel-threshold", cl::Hidden, cl::init(66), cl::desc("Set the case probability threshold for peeling the case from a " "switch statement. A value greater than 100 will void this " "optimization"))
static const unsigned	MaxParallelChains = 64

Macro Definition Documentation

BEGIN_REGISTER_VP_INTRINSIC [1/2]

#define BEGIN_REGISTER_VP_INTRINSIC	(		INTRIN,
			...
	)		case Intrinsic::INTRIN:

BEGIN_REGISTER_VP_INTRINSIC [2/2]

#define BEGIN_REGISTER_VP_INTRINSIC	(		VPID,
			...
	)		case Intrinsic::VPID:

BEGIN_REGISTER_VP_SDNODE

#define BEGIN_REGISTER_VP_SDNODE	(		VPSDID,
			...
	)		ResOPC = ISD::VPSDID;

DAG_INSTRUCTION

#define DAG_INSTRUCTION	(		NAME,
			NARG,
			ROUND_MODE,
			INTRINSIC,
			DAGN
	)

Value:

  case Intrinsic::INTRINSIC:                                                   \
    Opcode = ISD::STRICT_##DAGN;                                               \
    break;

DEBUG_TYPE

#define DEBUG_TYPE   "isel"

Definition at line 115 of file SelectionDAGBuilder.cpp.

END_REGISTER_VP_INTRINSIC

#define END_REGISTER_VP_INTRINSIC

(

...

)

break;

HANDLE_INST

#define HANDLE_INST	(		NUM,
			OPCODE,
			CLASS
	)		case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break;

INSTRUCTION

#define INSTRUCTION	(		NAME,
			NARG,
			ROUND_MODE,
			INTRINSIC
	)		case Intrinsic::INTRINSIC:

Typedef Documentation

ArgCopyElisionMapTy

using ArgCopyElisionMapTy = DenseMap<const Argument *, std::pair<const AllocaInst *, const StoreInst *> >

Definition at line 10007 of file SelectionDAGBuilder.cpp.

Function Documentation

addStackMapLiveVars()

static void addStackMapLiveVars ( const CallBase &  Call, unsigned  StartIdx, const SDLoc &  DL, SmallVectorImpl< SDValue > &  Ops, SelectionDAGBuilder &  Builder  )

static

Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list.

Constants are converted to TargetConstants purely as an optimization to avoid constant materialization and register allocation.

FrameIndex operands are converted to TargetFrameIndex so that ISEL does not generate addess computation nodes, and so FinalizeISel can convert the TargetFrameIndex into a DirectMemRefOp StackMap location. This avoids address materialization and register allocation, but may also be required for correctness. If a StackMap (or PatchPoint) intrinsic directly uses an alloca in the entry block, then the runtime may assume that the alloca's StackMap location can be read immediately after compilation and that the location is valid at any point during execution (this is similar to the assumption made by the llvm.gcroot intrinsic). If the alloca's location were only available in a register, then the runtime would need to trap when execution reaches the StackMap in order to read the alloca's location.

Definition at line 9215 of file SelectionDAGBuilder.cpp.

References Builder, DL, llvm::numbers::e, llvm::TargetLoweringBase::getFrameIndexTy(), i, and llvm::MVT::i64.

Referenced by llvm::FastISel::selectPatchpoint(), and llvm::FastISel::selectStackmap().

diagnosePossiblyInvalidConstraint()

static void diagnosePossiblyInvalidConstraint ( LLVMContext &  Ctx, const Value *  V, const Twine &  ErrMsg  )

static

Definition at line 308 of file SelectionDAGBuilder.cpp.

References llvm::LLVMContext::emitError(), and I.

Referenced by getCopyFromPartsVector(), and getCopyToParts().

expandDivFix()

static SDValue expandDivFix ( unsigned  Opcode, const SDLoc &  DL, SDValue  LHS, SDValue  RHS, SDValue  Scale, SelectionDAG &  DAG, const TargetLowering &  TLI  )

static

Definition at line 5403 of file SelectionDAGBuilder.cpp.

References llvm::TargetLoweringBase::Custom, DL, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::TargetLoweringBase::getFixedPointOperationAction(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getSExtOrTrunc(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorVT(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::EVT::isScalarInteger(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), llvm::TargetLoweringBase::Legal, llvm_unreachable, llvm::ISD::SDIVFIX, llvm::ISD::SDIVFIXSAT, llvm::ISD::SHL, Signed, llvm::ISD::SRA, llvm::ISD::SRL, and llvm::ISD::UDIVFIXSAT.

expandExp()

static SDValue expandExp ( const SDLoc &  dl, SDValue  Op, SelectionDAG &  DAG, const TargetLowering &  TLI, SDNodeFlags  Flags  )

static

expandExp - Lower an exp intrinsic.

Handles the special sequences for limited-precision mode.

Definition at line 5001 of file SelectionDAGBuilder.cpp.

References llvm::MVT::f32, llvm::ISD::FEXP, llvm::ISD::FMUL, llvm::SelectionDAG::getConstantFP(), getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), LimitFloatPrecision, and llvm::numbers::log2ef.

expandExp2()

static SDValue expandExp2 ( const SDLoc &  dl, SDValue  Op, SelectionDAG &  DAG, const TargetLowering &  TLI, SDNodeFlags  Flags  )

static

expandExp2 - Lower an exp2 intrinsic.

Handles the special sequences for limited-precision mode.

Definition at line 5309 of file SelectionDAGBuilder.cpp.

References llvm::MVT::f32, llvm::ISD::FEXP2, getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), and LimitFloatPrecision.

expandLog()

static SDValue expandLog ( const SDLoc &  dl, SDValue  Op, SelectionDAG &  DAG, const TargetLowering &  TLI, SDNodeFlags  Flags  )

static

expandLog - Lower a log intrinsic.

Handles the special sequences for limited-precision mode.

Definition at line 5023 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG, llvm::ISD::FMUL, llvm::ISD::FSUB, llvm::SelectionDAG::getConstantFP(), GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::MVT::i32, LimitFloatPrecision, llvm::numbers::ln2f, t1(), and X.

expandLog10()

static SDValue expandLog10 ( const SDLoc &  dl, SDValue  Op, SelectionDAG &  DAG, const TargetLowering &  TLI, SDNodeFlags  Flags  )

static

expandLog10 - Lower a log10 intrinsic.

Handles the special sequences for limited-precision mode.

Definition at line 5219 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG10, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::MVT::i32, LimitFloatPrecision, t1(), and X.

expandLog2()

static SDValue expandLog2 ( const SDLoc &  dl, SDValue  Op, SelectionDAG &  DAG, const TargetLowering &  TLI, SDNodeFlags  Flags  )

static

expandLog2 - Lower a log2 intrinsic.

Handles the special sequences for limited-precision mode.

Definition at line 5122 of file SelectionDAGBuilder.cpp.

References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG2, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::MVT::i32, LimitFloatPrecision, t1(), and X.

expandPow()

static SDValue expandPow ( const SDLoc &  dl, SDValue  LHS, SDValue  RHS, SelectionDAG &  DAG, const TargetLowering &  TLI, SDNodeFlags  Flags  )

static

visitPow - Lower a pow intrinsic.

Handles the special sequences for limited-precision mode with x == 10.0f.

Definition at line 5321 of file SelectionDAGBuilder.cpp.

References f(), llvm::MVT::f32, llvm::ISD::FMUL, llvm::ISD::FPOW, getF32Constant(), getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), and LimitFloatPrecision.

ExpandPowI()

static SDValue ExpandPowI ( const SDLoc &  DL, SDValue  LHS, SDValue  RHS, SelectionDAG &  DAG  )

static

ExpandPowI - Expand a llvm.powi intrinsic.

Definition at line 5350 of file SelectionDAGBuilder.cpp.

References llvm::countPopulation(), DL, llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FPOWI, llvm::SelectionDAG::getConstantFP(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::Log2_32(), and llvm::SelectionDAG::shouldOptForSize().

findArgumentCopyElisionCandidates()

static void findArgumentCopyElisionCandidates ( const DataLayout &  DL, FunctionLoweringInfo *  FuncInfo, ArgCopyElisionMapTy &  ArgCopyElisionCandidates  )

static

Scan the entry block of the function in FuncInfo for arguments that look like copies into a local alloca.

Record any copied arguments in ArgCopyElisionCandidates.

Definition at line 10013 of file SelectionDAGBuilder.cpp.

References Arg, llvm::Function::arg_size(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::dbgs(), DL, llvm::FunctionLoweringInfo::Fn, llvm::AllocaInst::getAllocatedType(), llvm::Function::getEntryBlock(), I, Info, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), llvm::DenseMapBase< SmallDenseMap< KeyT, ValueT, 4, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::insert(), LLVM_DEBUG, llvm::DenseMapBase< SmallDenseMap< KeyT, ValueT, 4, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::reserve(), SI, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::size(), llvm::FunctionLoweringInfo::StaticAllocaMap, and llvm::pdb::Unknown.

findMatchingInlineAsmOperand()

static unsigned findMatchingInlineAsmOperand ( unsigned  OperandNo, const std::vector< SDValue > &  AsmNodeOperands  )

static

Definition at line 8499 of file SelectionDAGBuilder.cpp.

References assert(), llvm::InlineAsm::getNumOperandRegisters(), llvm::InlineAsm::isMemKind(), llvm::InlineAsm::isRegDefEarlyClobberKind(), llvm::InlineAsm::isRegDefKind(), and llvm::InlineAsm::Op_FirstOperand.

FindPreallocatedCall()

static const CallBase* FindPreallocatedCall ( const Value *  PreallocatedSetup )

static

Given a @llvm.call.preallocated.setup, return the corresponding preallocated call.

Definition at line 5775 of file SelectionDAGBuilder.cpp.

References assert(), getCalledFunction(), llvm::Function::getIntrinsicID(), getIntrinsicID(), llvm_unreachable, and llvm::Value::users().

findUnwindDestinations()

static void findUnwindDestinations ( FunctionLoweringInfo &  FuncInfo, const BasicBlock *  EHPadBB, BranchProbability  Prob, SmallVectorImpl< std::pair< MachineBasicBlock *, BranchProbability >> &  UnwindDests  )

static

When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately go.

In the IR, we have a single unwind destination, but in the machine CFG, we enumerate all the possible blocks. This function skips over imaginary basic blocks that hold catchswitch instructions, and finds all the "real" machine basic block destinations. As those destinations may not be successors of EHPadBB, here we also calculate the edge probability to those destinations. The passed-in Prob is the edge probability to EHPadBB.

Definition at line 1811 of file SelectionDAGBuilder.cpp.

References assert(), llvm::BasicBlock::back(), llvm::FunctionLoweringInfo::BPI, llvm::classifyEHPersonality(), llvm::CoreCLR, findWasmUnwindDestinations(), llvm::FunctionLoweringInfo::Fn, llvm::BranchProbabilityInfo::getEdgeProbability(), llvm::BasicBlock::getFirstNonPHI(), llvm::Function::getPersonalityFn(), llvm::isAsynchronousEHPersonality(), llvm::FunctionLoweringInfo::MBBMap, llvm::MSVC_CXX, and llvm::Wasm_CXX.

findWasmUnwindDestinations()

static void findWasmUnwindDestinations ( FunctionLoweringInfo &  FuncInfo, const BasicBlock *  EHPadBB, BranchProbability  Prob, SmallVectorImpl< std::pair< MachineBasicBlock *, BranchProbability >> &  UnwindDests  )

static

Definition at line 1777 of file SelectionDAGBuilder.cpp.

References llvm::BasicBlock::getFirstNonPHI(), and llvm::FunctionLoweringInfo::MBBMap.

Referenced by findUnwindDestinations().

FixedPointIntrinsicToOpcode()

static unsigned FixedPointIntrinsicToOpcode ( unsigned  Intrinsic )

static

Definition at line 5741 of file SelectionDAGBuilder.cpp.

References llvm_unreachable, llvm::ISD::SDIVFIX, llvm::ISD::SDIVFIXSAT, llvm::ISD::SMULFIX, llvm::ISD::SMULFIXSAT, llvm::ISD::UDIVFIX, llvm::ISD::UDIVFIXSAT, llvm::ISD::UMULFIX, and llvm::ISD::UMULFIXSAT.

getAddressForMemoryInput()

static SDValue getAddressForMemoryInput ( SDValue  Chain, const SDLoc &  Location, SDISelAsmOperandInfo &  OpInfo, SelectionDAG &  DAG  )

static

Get a direct memory input to behave well as an indirect operand.

This may introduce stores, hence the need for a Chain.

Returns

The (possibly updated) chain.

Definition at line 8349 of file SelectionDAGBuilder.cpp.

References llvm::MachineFrameInfo::CreateStackObject(), DL, llvm::SelectionDAG::getConstantPool(), llvm::SelectionDAG::getDataLayout(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::TargetLoweringBase::getFrameIndexTy(), llvm::MachineFunction::getFrameInfo(), llvm::SelectionDAG::getMachineFunction(), llvm::TargetLoweringBase::getMemValueType(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getTruncStore(), and llvm::Value::getType().

getCopyFromParts()

static SDValue getCopyFromParts ( SelectionDAG &  DAG, const SDLoc &  DL, const SDValue *  Parts, unsigned  NumParts, MVT  PartVT, EVT  ValueVT, const Value *  V, Optional< CallingConv::ID >  CC = None, Optional< ISD::NodeType >  AssertOp = None  )

static

getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent.

If the parts combine to a type larger than ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).

Definition at line 165 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::BITCAST, llvm::EVT::bitsLT(), llvm::ISD::BUILD_PAIR, DL, llvm::MVT::f64, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyFromPartsVector(), llvm::SelectionDAG::getDataLayout(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::TargetLoweringBase::hasBigEndianPartOrdering(), llvm::MipsISD::Hi, llvm::MVT::i64, llvm::DataLayout::isBigEndian(), llvm::EVT::isFloatingPoint(), llvm::MVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::MVT::isInteger(), llvm::EVT::isVector(), llvm::MVT::isVector(), llvm::TargetLowering::joinRegisterPartsIntoValue(), llvm::MipsISD::Lo, llvm::Log2_32(), llvm::ISD::OR, llvm::MVT::ppcf128, llvm::report_fatal_error(), llvm::ISD::SHL, std::swap(), llvm::ISD::TRUNCATE, llvm::MVT::x86mmx, and llvm::ISD::ZERO_EXTEND.

Referenced by getCopyFromPartsVector(), and llvm::RegsForValue::getCopyFromRegs().

getCopyFromPartsVector()

static SDValue getCopyFromPartsVector ( SelectionDAG &  DAG, const SDLoc &  DL, const SDValue *  Parts, unsigned  NumParts, MVT  PartVT, EVT  ValueVT, const Value *  V, Optional< CallingConv::ID >  CallConv  )

static

getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent.

If the parts combine to a type larger than ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).

Definition at line 327 of file SelectionDAGBuilder.cpp.

References assert(), llvm::ISD::BITCAST, llvm::EVT::bitsLT(), llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, diagnosePossiblyInvalidConstraint(), DL, llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getContext(), getCopyFromParts(), llvm::EVT::getFixedSizeInBits(), llvm::SelectionDAG::getFPExtendOrRound(), llvm::EVT::getIntegerVT(), llvm::LinearPolySize< LeafTy >::getKnownMinValue(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::Optional< T >::getValue(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::SelectionDAG::getVectorIdxConstant(), llvm::EVT::getVectorNumElements(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), llvm::TargetLoweringBase::getVectorTypeBreakdownForCallingConv(), llvm::EVT::getVectorVT(), llvm::Optional< T >::hasValue(), i, llvm::EVT::isFloatingPoint(), llvm::LinearPolySize< LeafTy >::isScalable(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), and llvm::ISD::TRUNCATE.

Referenced by getCopyFromParts().

getCopyToParts()

static void getCopyToParts ( SelectionDAG &  DAG, const SDLoc &  DL, SDValue  Val, SDValue *  Parts, unsigned  NumParts, MVT  PartVT, const Value *  V, Optional< CallingConv::ID >  CallConv = None, ISD::NodeType  ExtendKind = ISD::ANY_EXTEND  )

static

getCopyToParts - Create a series of nodes that contain the specified value split into legal parts.

If the parts contain more bits than Val, then, for integers, ExtendKind can be used to specify how to generate the extra bits.

Definition at line 476 of file SelectionDAGBuilder.cpp.

References assert(), llvm::ISD::BITCAST, diagnosePossiblyInvalidConstraint(), DL, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::FP_EXTEND, llvm::SelectionDAG::getContext(), getCopyToPartsVector(), llvm::SelectionDAG::getDataLayout(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getShiftAmountConstant(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), i, llvm::DataLayout::isBigEndian(), llvm::EVT::isFloatingPoint(), llvm::MVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::MVT::isInteger(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), llvm::Log2_32(), llvm::reverse(), llvm::TargetLowering::splitValueIntoRegisterParts(), llvm::ISD::SRL, llvm::ISD::TRUNCATE, and llvm::MVT::x86mmx.

Referenced by getCopyToPartsVector(), and llvm::RegsForValue::getCopyToRegs().

getCopyToPartsVector()

static void getCopyToPartsVector ( SelectionDAG &  DAG, const SDLoc &  dl, SDValue  Val, SDValue *  Parts, unsigned  NumParts, MVT  PartVT, const Value *  V, Optional< CallingConv::ID >  CallConv  )

static

getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts.

Definition at line 650 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::BITCAST, llvm::EVT::bitsGE(), llvm::EVT::bitsGT(), DL, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getContext(), getCopyToParts(), llvm::LinearPolySize< ElementCount >::getFixed(), llvm::EVT::getFixedSizeInBits(), llvm::MVT::getFixedSizeInBits(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::TargetLoweringBase::getTypeAction(), llvm::Optional< T >::getValue(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::MVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::SelectionDAG::getVectorIdxConstant(), llvm::EVT::getVectorMinNumElements(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), llvm::TargetLoweringBase::getVectorTypeBreakdownForCallingConv(), llvm::EVT::getVectorVT(), llvm::Optional< T >::hasValue(), i, llvm::EVT::isScalableVector(), llvm::ElementCount::isScalar(), llvm::EVT::isVector(), llvm::MVT::isVector(), llvm::TargetLoweringBase::TypeWidenVector, and widenVectorToPartType().

Referenced by getCopyToParts().

GetExponent()

static SDValue GetExponent ( SelectionDAG &  DAG, SDValue  Op, const TargetLowering &  TLI, const SDLoc &  dl  )

static

GetExponent - Get the exponent:

(float)(int)(((Op & 0x7f800000) >> 23) - 127);

where Op is the hexadecimal representation of floating point value.

Definition at line 4890 of file SelectionDAGBuilder.cpp.

References llvm::ISD::AND, llvm::MVT::f32, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::MVT::i32, llvm::ISD::SINT_TO_FP, llvm::ISD::SRL, llvm::ISD::SUB, and t1().

Referenced by expandLog(), expandLog10(), and expandLog2().

getF32Constant()

static SDValue getF32Constant ( SelectionDAG &  DAG, unsigned  Flt, const SDLoc &  dl  )

static

getF32Constant - Get 32-bit floating point constant.

Definition at line 4903 of file SelectionDAGBuilder.cpp.

References llvm::lltok::APFloat, llvm::MVT::f32, llvm::SelectionDAG::getConstantFP(), and llvm::APFloatBase::IEEEsingle().

Referenced by expandLog(), expandLog10(), expandLog2(), expandPow(), and getLimitedPrecisionExp2().

getISDForVPIntrinsic()

static unsigned getISDForVPIntrinsic ( const VPIntrinsic &  VPIntrin )

static

Definition at line 7314 of file SelectionDAGBuilder.cpp.

References llvm::FastMathFlags::allowReassoc(), llvm::Instruction::getFastMathFlags(), llvm::IntrinsicInst::getIntrinsicID(), llvm::Optional< T >::getValue(), llvm::Optional< T >::hasValue(), and llvm_unreachable.

getLimitedPrecisionExp2()

static SDValue getLimitedPrecisionExp2 ( SDValue  t0, const SDLoc &  dl, SelectionDAG &  DAG  )

static

Definition at line 4909 of file SelectionDAGBuilder.cpp.

References llvm::ISD::ADD, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FSUB, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getDataLayout(), getF32Constant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::MVT::i32, LimitFloatPrecision, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, t1(), and X.

Referenced by expandExp(), expandExp2(), and expandPow().

getLoadStackGuard()

static SDValue getLoadStackGuard ( SelectionDAG &  DAG, const SDLoc &  DL, SDValue &  Chain  )

static

Create a LOAD_STACK_GUARD node, and let it carry the target specific global variable if there exists one.

Definition at line 2617 of file SelectionDAGBuilder.cpp.

References llvm::SelectionDAG::getDataLayout(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::GlobalValue::getParent(), llvm::TargetLoweringBase::getPointerMemTy(), llvm::TargetLoweringBase::getPointerTy(), llvm::TargetLoweringBase::getSDagStackGuard(), and llvm::SelectionDAG::getTargetLoweringInfo().

getMemCmpLoad()

static SDValue getMemCmpLoad ( const Value *  PtrVal, MVT  LoadVT, SelectionDAGBuilder &  Builder  )

static

Definition at line 7698 of file SelectionDAGBuilder.cpp.

References Align, Builder, llvm::ConstantFoldLoadFromConstPtr(), llvm::FixedVectorType::get(), llvm::ConstantExpr::getBitCast(), llvm::Value::getContext(), llvm::Type::getIntNTy(), llvm::MVT::getScalarSizeInBits(), llvm::PointerType::getUnqual(), llvm::SDValue::getValue(), llvm::MVT::getVectorNumElements(), and llvm::MVT::isVector().

GetRegistersForValue()

static void GetRegistersForValue ( SelectionDAG &  DAG, const SDLoc &  DL, SDISelAsmOperandInfo &  OpInfo, SDISelAsmOperandInfo &  RefOpInfo  )

static

GetRegistersForValue - Assign registers (virtual or physical) for the specified operand.

We prefer to assign virtual registers, to allow the register allocator to handle the assignment process. However, if the asm uses features that we can't model on machineinstrs, we have SDISel do the allocation. This produces generally horrible, but correct, code.

OpInfo describes the operand RefOpInfo describes the matching operand if any, the operand otherwise

Definition at line 8395 of file SelectionDAGBuilder.cpp.

References assert(), llvm::TargetRegisterClass::begin(), llvm::ISD::BITCAST, llvm::TargetLowering::C_Memory, Context, llvm::MachineRegisterInfo::createVirtualRegister(), DL, llvm::TargetRegisterClass::end(), llvm::SelectionDAG::getContext(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MVT::getSizeInBits(), llvm::MachineFunction::getSubtarget(), llvm::SelectionDAG::getTargetLoweringInfo(), I, llvm::InlineAsm::isInput, llvm::MVT::isInteger(), llvm::InlineAsm::isOutput, llvm::TargetRegisterInfo::isTypeLegalForClass(), llvm::TargetRegisterInfo::legalclasstypes_begin(), llvm::MVT::Other, TRI, and llvm::MVT::Untyped.

getReturnAttrs()

static AttributeList getReturnAttrs ( TargetLowering::CallLoweringInfo &  CLI )

static

Returns an AttributeList representing the attributes applied to the return value of the given call.

Definition at line 9520 of file SelectionDAGBuilder.cpp.

References Attrs, llvm::AttributeList::get(), llvm::Type::getContext(), llvm::TargetLowering::CallLoweringInfo::IsInReg, llvm::TargetLowering::CallLoweringInfo::RetSExt, llvm::TargetLowering::CallLoweringInfo::RetTy, llvm::AttributeList::ReturnIndex, and llvm::TargetLowering::CallLoweringInfo::RetZExt.

Referenced by llvm::TargetLowering::LowerCallTo().

GetSignificand()

static SDValue GetSignificand ( SelectionDAG &  DAG, SDValue  Op, const SDLoc &  dl  )

static

GetSignificand - Get the significand and build it into a floating-point number with exponent of 1:

Op = (Op & 0x007fffff) | 0x3f800000;

where Op is the hexadecimal representation of floating point value.

Definition at line 4877 of file SelectionDAGBuilder.cpp.

References llvm::ISD::AND, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::MVT::i32, llvm::ISD::OR, and t1().

Referenced by expandLog(), expandLog10(), and expandLog2().

getUnderlyingArgRegs()

static void getUnderlyingArgRegs ( SmallVectorImpl< std::pair< unsigned, TypeSize >> &  Regs, const SDValue &  N  )

static

Definition at line 5471 of file SelectionDAGBuilder.cpp.

References llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::BITCAST, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, llvm::ISD::CopyFromReg, getReg(), N, and llvm::ISD::TRUNCATE.

getUniformBase()

static bool getUniformBase ( const Value *  Ptr, SDValue &  Base, SDValue &  Index, ISD::MemIndexType &  IndexType, SDValue &  Scale, SelectionDAGBuilder *  SDB, const BasicBlock *  CurBB  )

static

Definition at line 4364 of file SelectionDAGBuilder.cpp.

References assert(), llvm::sampleprof::Base, llvm::SelectionDAGBuilder::DAG, DL, GEP, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAGBuilder::getCurSDLoc(), llvm::SelectionDAG::getDataLayout(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::Value::getType(), llvm::SelectionDAGBuilder::getValue(), llvm::EVT::getVectorVT(), Index, llvm::Type::isVectorTy(), and llvm::ISD::SIGNED_SCALED.

hasOnlySelectUsers()

static bool hasOnlySelectUsers ( const Value *  Cond )

static

Definition at line 3255 of file SelectionDAGBuilder.cpp.

References llvm::all_of(), and Cond.

InBlock()

static bool InBlock ( const Value *  V, const BasicBlock *  BB  )

static

Definition at line 2141 of file SelectionDAGBuilder.cpp.

References BB, and I.

Referenced by llvm::SelectionDAGBuilder::FindMergedConditions().

isOnlyUsedInEntryBlock()

static bool isOnlyUsedInEntryBlock ( const Argument *  A, bool  FastISel  )

static

isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true.

This includes arguments used by switches, since the switch may expand into multiple basic blocks.

Definition at line 9991 of file SelectionDAGBuilder.cpp.

patchMatchingInput()

static void patchMatchingInput ( const SDISelAsmOperandInfo &  OpInfo, SDISelAsmOperandInfo &  MatchingOpInfo, SelectionDAG &  DAG  )

static

Make sure that the output operand OpInfo and its corresponding input operand MatchingOpInfo have compatible constraint types (otherwise error out).

Definition at line 8320 of file SelectionDAGBuilder.cpp.

References llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::SelectionDAG::getSubtarget(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::report_fatal_error(), and TRI.

scaleCaseProbality()

static BranchProbability scaleCaseProbality ( BranchProbability  CaseProb, BranchProbability  PeeledCaseProb  )

static

Definition at line 11026 of file SelectionDAGBuilder.cpp.

References llvm::BranchProbability::getCompl(), llvm::BranchProbability::getDenominator(), llvm::BranchProbability::getNumerator(), llvm::BranchProbability::getOne(), llvm::BranchProbability::getZero(), llvm::max(), and llvm::BranchProbability::scale().

tryToElideArgumentCopy()

static void tryToElideArgumentCopy ( FunctionLoweringInfo &  FuncInfo, SmallVectorImpl< SDValue > &  Chains, DenseMap< int, int > &  ArgCopyElisionFrameIndexMap, SmallPtrSetImpl< const Instruction * > &  ElidedArgCopyInstrs, ArgCopyElisionMapTy &  ArgCopyElisionCandidates, const Argument &  Arg, SDValue  ArgVal, bool &  ArgHasUses  )

static

Try to elide argument copies from memory into a local alloca.

Succeeds if ArgVal is a load from a suitable fixed stack object.

Definition at line 10109 of file SelectionDAGBuilder.cpp.

References Arg, assert(), llvm::dbgs(), llvm::DebugStr(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), llvm::AllocaInst::getAlign(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), llvm::SDValue::getValue(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), llvm::SmallPtrSetImpl< PtrType >::insert(), LLVM_DEBUG, llvm::FunctionLoweringInfo::MF, llvm::MachineFrameInfo::RemoveStackObject(), llvm::MachineFrameInfo::setIsImmutableObjectIndex(), SI, and llvm::FunctionLoweringInfo::StaticAllocaMap.

widenVectorToPartType()

static SDValue widenVectorToPartType ( SelectionDAG &  DAG, SDValue  Val, const SDLoc &  DL, EVT  PartVT  )

static

Definition at line 613 of file SelectionDAGBuilder.cpp.

References llvm::SmallVectorImpl< T >::append(), DL, llvm::SelectionDAG::ExtractVectorElements(), llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::SelectionDAG::getVectorIdxConstant(), llvm::ISD::INSERT_SUBVECTOR, llvm::LinearPolySize< ElementCount >::isKnownLE(), llvm::LinearPolySize< LeafTy >::isScalable(), and llvm::EVT::isVector().

Referenced by getCopyToPartsVector().

Variable Documentation

InsertAssertAlign

cl::opt<bool> InsertAssertAlign("insert-assert-align", cl::init(true), cl::desc("Insert the experimental `assertalign` node."), cl::ReallyHidden)

static

LimitFloatPrecision

unsigned LimitFloatPrecision

static

LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits).

Definition at line 119 of file SelectionDAGBuilder.cpp.

Referenced by expandExp(), expandExp2(), expandLog(), expandLog10(), expandLog2(), expandPow(), and getLimitedPrecisionExp2().

LimitFPPrecision

cl::opt<unsigned, true> LimitFPPrecision("limit-float-precision", cl::desc("Generate low-precision inline sequences " "for some float libcalls"), cl::location(LimitFloatPrecision), cl::Hidden, cl::init(0))

static

MaxParallelChains

const unsigned MaxParallelChains = 64

static

Definition at line 153 of file SelectionDAGBuilder.cpp.

SwitchPeelThreshold

cl::opt<unsigned> SwitchPeelThreshold("switch-peel-threshold", cl::Hidden, cl::init(66), cl::desc("Set the case probability threshold for peeling the case from a " "switch statement. A value greater than 100 will void this " "optimization"))

static