LLVM  14.0.0git
Macros | Functions | Variables
SIISelLowering.cpp File Reference
#include "SIISelLowering.h"
#include "AMDGPU.h"
#include "AMDGPUInstrInfo.h"
#include "AMDGPUTargetMachine.h"
#include "SIMachineFunctionInfo.h"
#include "SIRegisterInfo.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/LegacyDivergenceAnalysis.h"
#include "llvm/Analysis/OptimizationRemarkEmitter.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsR600.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/KnownBits.h"
Include dependency graph for SIISelLowering.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "si-lower"
 

Functions

 STATISTIC (NumTailCalls, "Number of tail calls")
 
static bool hasFP32Denormals (const MachineFunction &MF)
 
static bool hasFP64FP16Denormals (const MachineFunction &MF)
 
static unsigned findFirstFreeSGPR (CCState &CCInfo)
 
static EVT memVTFromImageData (Type *Ty, unsigned DMaskLanes)
 
static EVT memVTFromImageReturn (Type *Ty, unsigned DMaskLanes)
 
static void processPSInputArgs (SmallVectorImpl< ISD::InputArg > &Splits, CallingConv::ID CallConv, ArrayRef< ISD::InputArg > Ins, BitVector &Skipped, FunctionType *FType, SIMachineFunctionInfo *Info)
 
static ArgDescriptor allocateVGPR32Input (CCState &CCInfo, unsigned Mask=~0u, ArgDescriptor Arg=ArgDescriptor())
 
static ArgDescriptor allocateSGPR32InputImpl (CCState &CCInfo, const TargetRegisterClass *RC, unsigned NumArgRegs)
 
static void allocateFixedSGPRInputImpl (CCState &CCInfo, const TargetRegisterClass *RC, MCRegister Reg)
 
static void allocateSGPR32Input (CCState &CCInfo, ArgDescriptor &Arg)
 
static void allocateSGPR64Input (CCState &CCInfo, ArgDescriptor &Arg)
 
static void reservePrivateMemoryRegs (const TargetMachine &TM, MachineFunction &MF, const SIRegisterInfo &TRI, SIMachineFunctionInfo &Info)
 
static bool canGuaranteeTCO (CallingConv::ID CC)
 
static bool mayTailCallThisCC (CallingConv::ID CC)
 Return true if we might ever do TCO for calls with this calling convention. More...
 
static std::pair< MachineBasicBlock *, MachineBasicBlock * > splitBlockForLoop (MachineInstr &MI, MachineBasicBlock &MBB, bool InstInLoop)
 
static MachineBasicBlock::iterator emitLoadM0FromVGPRLoop (const SIInstrInfo *TII, MachineRegisterInfo &MRI, MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB, const DebugLoc &DL, const MachineOperand &Idx, unsigned InitReg, unsigned ResultReg, unsigned PhiReg, unsigned InitSaveExecReg, int Offset, bool UseGPRIdxMode, Register &SGPRIdxReg)
 
static MachineBasicBlock::iterator loadM0FromVGPR (const SIInstrInfo *TII, MachineBasicBlock &MBB, MachineInstr &MI, unsigned InitResultReg, unsigned PhiReg, int Offset, bool UseGPRIdxMode, Register &SGPRIdxReg)
 
static std::pair< unsigned, intcomputeIndirectRegAndOffset (const SIRegisterInfo &TRI, const TargetRegisterClass *SuperRC, unsigned VecReg, int Offset)
 
static void setM0ToIndexFromSGPR (const SIInstrInfo *TII, MachineRegisterInfo &MRI, MachineInstr &MI, int Offset)
 
static Register getIndirectSGPRIdx (const SIInstrInfo *TII, MachineRegisterInfo &MRI, MachineInstr &MI, int Offset)
 
static MachineBasicBlockemitIndirectSrc (MachineInstr &MI, MachineBasicBlock &MBB, const GCNSubtarget &ST)
 
static MachineBasicBlockemitIndirectDst (MachineInstr &MI, MachineBasicBlock &MBB, const GCNSubtarget &ST)
 
static SDValue adjustLoadValueTypeImpl (SDValue Result, EVT LoadVT, const SDLoc &DL, SelectionDAG &DAG, bool Unpacked)
 
static SDValue lowerICMPIntrinsic (const SITargetLowering &TLI, SDNode *N, SelectionDAG &DAG)
 
static SDValue lowerFCMPIntrinsic (const SITargetLowering &TLI, SDNode *N, SelectionDAG &DAG)
 
static SDValue lowerBALLOTIntrinsic (const SITargetLowering &TLI, SDNode *N, SelectionDAG &DAG)
 
static SDNodefindUser (SDValue Value, unsigned Opcode)
 Helper function for LowerBRCOND. More...
 
static bool elementPairIsContiguous (ArrayRef< int > Mask, int Elt)
 
static SDValue buildPCRelGlobalAddress (SelectionDAG &DAG, const GlobalValue *GV, const SDLoc &DL, int64_t Offset, EVT PtrVT, unsigned GAFlags=SIInstrInfo::MO_NONE)
 
static SDValue emitNonHSAIntrinsicError (SelectionDAG &DAG, const SDLoc &DL, EVT VT)
 
static SDValue emitRemovedIntrinsicError (SelectionDAG &DAG, const SDLoc &DL, EVT VT)
 
static SDValue getBuildDwordsVector (SelectionDAG &DAG, SDLoc DL, ArrayRef< SDValue > Elts)
 
static SDValue padEltsToUndef (SelectionDAG &DAG, const SDLoc &DL, EVT CastVT, SDValue Src, int ExtraElts)
 
static SDValue constructRetValue (SelectionDAG &DAG, MachineSDNode *Result, ArrayRef< EVT > ResultTypes, bool IsTexFail, bool Unpacked, bool IsD16, int DMaskPop, int NumVDataDwords, const SDLoc &DL)
 
static bool parseTexFail (SDValue TexFailCtrl, SelectionDAG &DAG, SDValue *TFE, SDValue *LWE, bool &IsTexFail)
 
static void packImage16bitOpsToDwords (SelectionDAG &DAG, SDValue Op, MVT PackVectorVT, SmallVectorImpl< SDValue > &PackedAddrs, unsigned DimIdx, unsigned EndIdx, unsigned NumGradients)
 
static void updateBufferMMO (MachineMemOperand *MMO, SDValue VOffset, SDValue SOffset, SDValue Offset, SDValue VIndex=SDValue())
 Update MMO based on the offset inputs to an intrinsic. More...
 
static unsigned getIdxEn (SDValue VIndex)
 
static SDValue getLoadExtOrTrunc (SelectionDAG &DAG, ISD::LoadExtType ExtType, SDValue Op, const SDLoc &SL, EVT VT)
 
static SDValue getFPBinOp (SelectionDAG &DAG, unsigned Opcode, const SDLoc &SL, EVT VT, SDValue A, SDValue B, SDValue GlueChain, SDNodeFlags Flags)
 
static SDValue getFPTernOp (SelectionDAG &DAG, unsigned Opcode, const SDLoc &SL, EVT VT, SDValue A, SDValue B, SDValue C, SDValue GlueChain, SDNodeFlags Flags)
 
static SDValue getSPDenormModeValue (int SPDenormMode, SelectionDAG &DAG, const SDLoc &SL, const GCNSubtarget *ST)
 
static unsigned getBasePtrIndex (const MemSDNode *N)
 MemSDNode::getBasePtr() does not work for intrinsics, which needs to offset by the chain and intrinsic ID. More...
 
static bool bitOpWithConstantIsReducible (unsigned Opc, uint32_t Val)
 
static bool isBoolSGPR (SDValue V)
 
static uint32_t getConstantPermuteMask (uint32_t C)
 
static uint32_t getPermuteMask (SelectionDAG &DAG, SDValue V)
 
static bool vectorEltWillFoldAway (SDValue Op)
 
static unsigned minMaxOpcToMin3Max3Opc (unsigned Opc)
 
static ConstantFPSDNodegetSplatConstantFP (SDValue Op)
 
static bool isClampZeroToOne (SDValue A, SDValue B)
 
static bool shouldExpandVectorDynExt (SDNode *N)
 
static SDValue getMad64_32 (SelectionDAG &DAG, const SDLoc &SL, EVT VT, SDValue N0, SDValue N1, SDValue N2, bool Signed)
 
static unsigned SubIdx2Lane (unsigned Idx)
 Helper function for adjustWritemask. More...
 
static bool isFrameIndexOp (SDValue Op)
 
static SDValue buildSMovImm32 (SelectionDAG &DAG, const SDLoc &DL, uint64_t Val)
 
static bool isImmConstraint (StringRef Constraint)
 
static uint64_t clearUnusedBits (uint64_t Val, unsigned Size)
 
static int getAlignedAGPRClassID (unsigned UnalignedClassID)
 
static void knownBitsForWorkitemID (const GCNSubtarget &ST, GISelKnownBits &KB, KnownBits &Known, unsigned Dim)
 
static LLVM_ATTRIBUTE_UNUSED bool isCopyFromRegOfInlineAsm (const SDNode *N)
 
static bool fpModeMatchesGlobalFPAtomicMode (const AtomicRMWInst *RMW)
 
static bool hasCFUser (const Value *V, SmallPtrSet< const Value *, 16 > &Visited, unsigned WaveSize)
 

Variables

static cl::opt< bool > DisableLoopAlignment ("amdgpu-disable-loop-alignment", cl::desc("Do not align and prefetch loops"), cl::init(false))
 
static cl::opt< bool > VGPRReserveforSGPRSpill ("amdgpu-reserve-vgpr-for-sgpr-spill", cl::desc("Allocates one VGPR for future SGPR Spill"), cl::init(true))
 
static cl::opt< bool > UseDivergentRegisterIndexing ("amdgpu-use-divergent-register-indexing", cl::Hidden, cl::desc("Use indirect register addressing for divergent indexes"), cl::init(false))
 

Detailed Description

Custom DAG lowering for SI

Definition in file SIISelLowering.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "si-lower"

Definition at line 38 of file SIISelLowering.cpp.

Function Documentation

◆ adjustLoadValueTypeImpl()

static SDValue adjustLoadValueTypeImpl ( SDValue  Result,
EVT  LoadVT,
const SDLoc DL,
SelectionDAG DAG,
bool  Unpacked 
)
static

◆ allocateFixedSGPRInputImpl()

static void allocateFixedSGPRInputImpl ( CCState CCInfo,
const TargetRegisterClass RC,
MCRegister  Reg 
)
static

◆ allocateSGPR32Input()

static void allocateSGPR32Input ( CCState CCInfo,
ArgDescriptor Arg 
)
static

◆ allocateSGPR32InputImpl()

static ArgDescriptor allocateSGPR32InputImpl ( CCState CCInfo,
const TargetRegisterClass RC,
unsigned  NumArgRegs 
)
static

◆ allocateSGPR64Input()

static void allocateSGPR64Input ( CCState CCInfo,
ArgDescriptor Arg 
)
static

◆ allocateVGPR32Input()

static ArgDescriptor allocateVGPR32Input ( CCState CCInfo,
unsigned  Mask = ~0u,
ArgDescriptor  Arg = ArgDescriptor() 
)
static

◆ bitOpWithConstantIsReducible()

static bool bitOpWithConstantIsReducible ( unsigned  Opc,
uint32_t  Val 
)
static

Definition at line 9047 of file SIISelLowering.cpp.

References llvm::ISD::AND, llvm::ISD::OR, and llvm::ISD::XOR.

◆ buildPCRelGlobalAddress()

static SDValue buildPCRelGlobalAddress ( SelectionDAG DAG,
const GlobalValue GV,
const SDLoc DL,
int64_t  Offset,
EVT  PtrVT,
unsigned  GAFlags = SIInstrInfo::MO_NONE 
)
static

◆ buildSMovImm32()

static SDValue buildSMovImm32 ( SelectionDAG DAG,
const SDLoc DL,
uint64_t  Val 
)
static

◆ canGuaranteeTCO()

static bool canGuaranteeTCO ( CallingConv::ID  CC)
static

◆ clearUnusedBits()

static uint64_t clearUnusedBits ( uint64_t  Val,
unsigned  Size 
)
static

◆ computeIndirectRegAndOffset()

static std::pair<unsigned, int> computeIndirectRegAndOffset ( const SIRegisterInfo TRI,
const TargetRegisterClass SuperRC,
unsigned  VecReg,
int  Offset 
)
static

◆ constructRetValue()

static SDValue constructRetValue ( SelectionDAG DAG,
MachineSDNode Result,
ArrayRef< EVT ResultTypes,
bool  IsTexFail,
bool  Unpacked,
bool  IsD16,
int  DMaskPop,
int  NumVDataDwords,
const SDLoc DL 
)
static

◆ elementPairIsContiguous()

static bool elementPairIsContiguous ( ArrayRef< int Mask,
int  Elt 
)
static

Definition at line 5643 of file SIISelLowering.cpp.

References assert(), and llvm::BitmaskEnumDetail::Mask().

◆ emitIndirectDst()

static MachineBasicBlock* emitIndirectDst ( MachineInstr MI,
MachineBasicBlock MBB,
const GCNSubtarget ST 
)
static

◆ emitIndirectSrc()

static MachineBasicBlock* emitIndirectSrc ( MachineInstr MI,
MachineBasicBlock MBB,
const GCNSubtarget ST 
)
static

◆ emitLoadM0FromVGPRLoop()

static MachineBasicBlock::iterator emitLoadM0FromVGPRLoop ( const SIInstrInfo TII,
MachineRegisterInfo MRI,
MachineBasicBlock OrigBB,
MachineBasicBlock LoopBB,
const DebugLoc DL,
const MachineOperand Idx,
unsigned  InitReg,
unsigned  ResultReg,
unsigned  PhiReg,
unsigned  InitSaveExecReg,
int  Offset,
bool  UseGPRIdxMode,
Register SGPRIdxReg 
)
static

◆ emitNonHSAIntrinsicError()

static SDValue emitNonHSAIntrinsicError ( SelectionDAG DAG,
const SDLoc DL,
EVT  VT 
)
static

◆ emitRemovedIntrinsicError()

static SDValue emitRemovedIntrinsicError ( SelectionDAG DAG,
const SDLoc DL,
EVT  VT 
)
static

◆ findFirstFreeSGPR()

static unsigned findFirstFreeSGPR ( CCState CCInfo)
static

◆ findUser()

static SDNode* findUser ( SDValue  Value,
unsigned  Opcode 
)
static

Helper function for LowerBRCOND.

Definition at line 5025 of file SIISelLowering.cpp.

References E, I, llvm::SDNode::use_begin(), and llvm::SDNode::use_end().

◆ fpModeMatchesGlobalFPAtomicMode()

static bool fpModeMatchesGlobalFPAtomicMode ( const AtomicRMWInst RMW)
static

◆ getAlignedAGPRClassID()

static int getAlignedAGPRClassID ( unsigned  UnalignedClassID)
static

Definition at line 11805 of file SIISelLowering.cpp.

Referenced by llvm::SITargetLowering::finalizeLowering().

◆ getBasePtrIndex()

static unsigned getBasePtrIndex ( const MemSDNode N)
static

MemSDNode::getBasePtr() does not work for intrinsics, which needs to offset by the chain and intrinsic ID.

Theoretically we would also need to check the specific intrinsic, but they all place the pointer operand first.

Definition at line 9013 of file SIISelLowering.cpp.

References llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, N, and llvm::ISD::STORE.

Referenced by llvm::GCRelocateInst::getBasePtr().

◆ getBuildDwordsVector()

static SDValue getBuildDwordsVector ( SelectionDAG DAG,
SDLoc  DL,
ArrayRef< SDValue Elts 
)
static

◆ getConstantPermuteMask()

static uint32_t getConstantPermuteMask ( uint32_t  C)
static

Definition at line 9101 of file SIISelLowering.cpp.

Referenced by getPermuteMask().

◆ getFPBinOp()

static SDValue getFPBinOp ( SelectionDAG DAG,
unsigned  Opcode,
const SDLoc SL,
EVT  VT,
SDValue  A,
SDValue  B,
SDValue  GlueChain,
SDNodeFlags  Flags 
)
static

◆ getFPTernOp()

static SDValue getFPTernOp ( SelectionDAG DAG,
unsigned  Opcode,
const SDLoc SL,
EVT  VT,
SDValue  A,
SDValue  B,
SDValue  C,
SDValue  GlueChain,
SDNodeFlags  Flags 
)
static

◆ getIdxEn()

static unsigned getIdxEn ( SDValue  VIndex)
static

Definition at line 6906 of file SIISelLowering.cpp.

◆ getIndirectSGPRIdx()

static Register getIndirectSGPRIdx ( const SIInstrInfo TII,
MachineRegisterInfo MRI,
MachineInstr MI,
int  Offset 
)
static

◆ getLoadExtOrTrunc()

static SDValue getLoadExtOrTrunc ( SelectionDAG DAG,
ISD::LoadExtType  ExtType,
SDValue  Op,
const SDLoc SL,
EVT  VT 
)
static

◆ getMad64_32()

static SDValue getMad64_32 ( SelectionDAG DAG,
const SDLoc SL,
EVT  VT,
SDValue  N0,
SDValue  N1,
SDValue  N2,
bool  Signed 
)
static

◆ getPermuteMask()

static uint32_t getPermuteMask ( SelectionDAG DAG,
SDValue  V 
)
static

◆ getSPDenormModeValue()

static SDValue getSPDenormModeValue ( int  SPDenormMode,
SelectionDAG DAG,
const SDLoc SL,
const GCNSubtarget ST 
)
static

◆ getSplatConstantFP()

static ConstantFPSDNode* getSplatConstantFP ( SDValue  Op)
static

Definition at line 9970 of file SIISelLowering.cpp.

◆ hasCFUser()

static bool hasCFUser ( const Value V,
SmallPtrSet< const Value *, 16 > &  Visited,
unsigned  WaveSize 
)
static

◆ hasFP32Denormals()

static bool hasFP32Denormals ( const MachineFunction MF)
static

◆ hasFP64FP16Denormals()

static bool hasFP64FP16Denormals ( const MachineFunction MF)
static

◆ isBoolSGPR()

static bool isBoolSGPR ( SDValue  V)
static

◆ isClampZeroToOne()

static bool isClampZeroToOne ( SDValue  A,
SDValue  B 
)
static

Definition at line 10104 of file SIISelLowering.cpp.

References B.

◆ isCopyFromRegOfInlineAsm()

static LLVM_ATTRIBUTE_UNUSED bool isCopyFromRegOfInlineAsm ( const SDNode N)
static

◆ isFrameIndexOp()

static bool isFrameIndexOp ( SDValue  Op)
static

Definition at line 11203 of file SIISelLowering.cpp.

References llvm::ISD::AssertZext.

◆ isImmConstraint()

static bool isImmConstraint ( StringRef  Constraint)
static

◆ knownBitsForWorkitemID()

static void knownBitsForWorkitemID ( const GCNSubtarget ST,
GISelKnownBits KB,
KnownBits Known,
unsigned  Dim 
)
static

◆ loadM0FromVGPR()

static MachineBasicBlock::iterator loadM0FromVGPR ( const SIInstrInfo TII,
MachineBasicBlock MBB,
MachineInstr MI,
unsigned  InitResultReg,
unsigned  PhiReg,
int  Offset,
bool  UseGPRIdxMode,
Register SGPRIdxReg 
)
static

◆ lowerBALLOTIntrinsic()

static SDValue lowerBALLOTIntrinsic ( const SITargetLowering TLI,
SDNode N,
SelectionDAG DAG 
)
static

◆ lowerFCMPIntrinsic()

static SDValue lowerFCMPIntrinsic ( const SITargetLowering TLI,
SDNode N,
SelectionDAG DAG 
)
static

◆ lowerICMPIntrinsic()

static SDValue lowerICMPIntrinsic ( const SITargetLowering TLI,
SDNode N,
SelectionDAG DAG 
)
static

◆ mayTailCallThisCC()

static bool mayTailCallThisCC ( CallingConv::ID  CC)
static

Return true if we might ever do TCO for calls with this calling convention.

Definition at line 2923 of file SIISelLowering.cpp.

References llvm::CallingConv::AMDGPU_Gfx, llvm::CallingConv::C, and canGuaranteeTCO().

Referenced by llvm::SITargetLowering::isEligibleForTailCallOptimization().

◆ memVTFromImageData()

static EVT memVTFromImageData ( Type Ty,
unsigned  DMaskLanes 
)
static

◆ memVTFromImageReturn()

static EVT memVTFromImageReturn ( Type Ty,
unsigned  DMaskLanes 
)
static

◆ minMaxOpcToMin3Max3Opc()

static unsigned minMaxOpcToMin3Max3Opc ( unsigned  Opc)
static

◆ packImage16bitOpsToDwords()

static void packImage16bitOpsToDwords ( SelectionDAG DAG,
SDValue  Op,
MVT  PackVectorVT,
SmallVectorImpl< SDValue > &  PackedAddrs,
unsigned  DimIdx,
unsigned  EndIdx,
unsigned  NumGradients 
)
static

◆ padEltsToUndef()

static SDValue padEltsToUndef ( SelectionDAG DAG,
const SDLoc DL,
EVT  CastVT,
SDValue  Src,
int  ExtraElts 
)
static

◆ parseTexFail()

static bool parseTexFail ( SDValue  TexFailCtrl,
SelectionDAG DAG,
SDValue TFE,
SDValue LWE,
bool &  IsTexFail 
)
static

◆ processPSInputArgs()

static void processPSInputArgs ( SmallVectorImpl< ISD::InputArg > &  Splits,
CallingConv::ID  CallConv,
ArrayRef< ISD::InputArg Ins,
BitVector Skipped,
FunctionType FType,
SIMachineFunctionInfo Info 
)
static

◆ reservePrivateMemoryRegs()

static void reservePrivateMemoryRegs ( const TargetMachine TM,
MachineFunction MF,
const SIRegisterInfo TRI,
SIMachineFunctionInfo Info 
)
static

◆ setM0ToIndexFromSGPR()

static void setM0ToIndexFromSGPR ( const SIInstrInfo TII,
MachineRegisterInfo MRI,
MachineInstr MI,
int  Offset 
)
static

◆ shouldExpandVectorDynExt()

static bool shouldExpandVectorDynExt ( SDNode N)
static

◆ splitBlockForLoop()

static std::pair<MachineBasicBlock *, MachineBasicBlock *> splitBlockForLoop ( MachineInstr MI,
MachineBasicBlock MBB,
bool  InstInLoop 
)
static

◆ STATISTIC()

STATISTIC ( NumTailCalls  ,
"Number of tail calls  
)

◆ SubIdx2Lane()

static unsigned SubIdx2Lane ( unsigned  Idx)
static

Helper function for adjustWritemask.

Definition at line 11028 of file SIISelLowering.cpp.

◆ updateBufferMMO()

static void updateBufferMMO ( MachineMemOperand MMO,
SDValue  VOffset,
SDValue  SOffset,
SDValue  Offset,
SDValue  VIndex = SDValue() 
)
static

Update MMO based on the offset inputs to an intrinsic.

Definition at line 6854 of file SIISelLowering.cpp.

References isZero(), Offset, llvm::MachineMemOperand::setOffset(), and llvm::MachineMemOperand::setValue().

◆ vectorEltWillFoldAway()

static bool vectorEltWillFoldAway ( SDValue  Op)
static

Definition at line 9815 of file SIISelLowering.cpp.

Variable Documentation

◆ DisableLoopAlignment

cl::opt<bool> DisableLoopAlignment("amdgpu-disable-loop-alignment", cl::desc("Do not align and prefetch loops"), cl::init(false))
static

◆ UseDivergentRegisterIndexing

cl::opt<bool> UseDivergentRegisterIndexing("amdgpu-use-divergent-register-indexing", cl::Hidden, cl::desc("Use indirect register addressing for divergent indexes"), cl::init(false))
static

◆ VGPRReserveforSGPRSpill

cl::opt<bool> VGPRReserveforSGPRSpill("amdgpu-reserve-vgpr-for-sgpr-spill", cl::desc("Allocates one VGPR for future SGPR Spill"), cl::init(true))
static