LLVM  13.0.0git
LoopStrengthReduce.cpp
Go to the documentation of this file.
1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This transformation analyzes and transforms the induction variables (and
10 // computations derived from them) into forms suitable for efficient execution
11 // on the target.
12 //
13 // This pass performs a strength reduction on array references inside loops that
14 // have as one or more of their components the loop induction variable, it
15 // rewrites expressions to take advantage of scaled-index addressing modes
16 // available on the target, and it performs a variety of other optimizations
17 // related to loop induction variables.
18 //
19 // Terminology note: this code has a lot of handling for "post-increment" or
20 // "post-inc" users. This is not talking about post-increment addressing modes;
21 // it is instead talking about code like this:
22 //
23 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
24 // ...
25 // %i.next = add %i, 1
26 // %c = icmp eq %i.next, %n
27 //
28 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
29 // it's useful to think about these as the same register, with some uses using
30 // the value of the register before the add and some using it after. In this
31 // example, the icmp is a post-increment user, since it uses %i.next, which is
32 // the value of the induction variable after the increment. The other common
33 // case of post-increment users is users outside the loop.
34 //
35 // TODO: More sophistication in the way Formulae are generated and filtered.
36 //
37 // TODO: Handle multiple loops at a time.
38 //
39 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
40 // of a GlobalValue?
41 //
42 // TODO: When truncation is free, truncate ICmp users' operands to make it a
43 // smaller encoding (on x86 at least).
44 //
45 // TODO: When a negated register is used by an add (such as in a list of
46 // multiple base registers, or as the increment expression in an addrec),
47 // we may not actually need both reg and (-1 * reg) in registers; the
48 // negation can be implemented by using a sub instead of an add. The
49 // lack of support for taking this into consideration when making
50 // register pressure decisions is partly worked around by the "Special"
51 // use kind.
52 //
53 //===----------------------------------------------------------------------===//
54 
56 #include "llvm/ADT/APInt.h"
57 #include "llvm/ADT/DenseMap.h"
58 #include "llvm/ADT/DenseSet.h"
59 #include "llvm/ADT/Hashing.h"
61 #include "llvm/ADT/STLExtras.h"
62 #include "llvm/ADT/SetVector.h"
64 #include "llvm/ADT/SmallPtrSet.h"
65 #include "llvm/ADT/SmallSet.h"
66 #include "llvm/ADT/SmallVector.h"
69 #include "llvm/Analysis/IVUsers.h"
71 #include "llvm/Analysis/LoopInfo.h"
72 #include "llvm/Analysis/LoopPass.h"
81 #include "llvm/Config/llvm-config.h"
82 #include "llvm/IR/BasicBlock.h"
83 #include "llvm/IR/Constant.h"
84 #include "llvm/IR/Constants.h"
86 #include "llvm/IR/DerivedTypes.h"
87 #include "llvm/IR/Dominators.h"
88 #include "llvm/IR/GlobalValue.h"
89 #include "llvm/IR/IRBuilder.h"
90 #include "llvm/IR/InstrTypes.h"
91 #include "llvm/IR/Instruction.h"
92 #include "llvm/IR/Instructions.h"
93 #include "llvm/IR/IntrinsicInst.h"
94 #include "llvm/IR/Intrinsics.h"
95 #include "llvm/IR/Module.h"
96 #include "llvm/IR/OperandTraits.h"
97 #include "llvm/IR/Operator.h"
98 #include "llvm/IR/PassManager.h"
99 #include "llvm/IR/Type.h"
100 #include "llvm/IR/Use.h"
101 #include "llvm/IR/User.h"
102 #include "llvm/IR/Value.h"
103 #include "llvm/IR/ValueHandle.h"
104 #include "llvm/InitializePasses.h"
105 #include "llvm/Pass.h"
106 #include "llvm/Support/Casting.h"
108 #include "llvm/Support/Compiler.h"
109 #include "llvm/Support/Debug.h"
111 #include "llvm/Support/MathExtras.h"
113 #include "llvm/Transforms/Scalar.h"
114 #include "llvm/Transforms/Utils.h"
118 #include <algorithm>
119 #include <cassert>
120 #include <cstddef>
121 #include <cstdint>
122 #include <cstdlib>
123 #include <iterator>
124 #include <limits>
125 #include <map>
126 #include <numeric>
127 #include <utility>
128 
129 using namespace llvm;
130 
131 #define DEBUG_TYPE "loop-reduce"
132 
133 /// MaxIVUsers is an arbitrary threshold that provides an early opportunity for
134 /// bail out. This threshold is far beyond the number of users that LSR can
135 /// conceivably solve, so it should not affect generated code, but catches the
136 /// worst cases before LSR burns too much compile time and stack space.
137 static const unsigned MaxIVUsers = 200;
138 
139 // Temporary flag to cleanup congruent phis after LSR phi expansion.
140 // It's currently disabled until we can determine whether it's truly useful or
141 // not. The flag should be removed after the v3.0 release.
142 // This is now needed for ivchains.
144  "enable-lsr-phielim", cl::Hidden, cl::init(true),
145  cl::desc("Enable LSR phi elimination"));
146 
147 // The flag adds instruction count to solutions cost comparision.
148 static cl::opt<bool> InsnsCost(
149  "lsr-insns-cost", cl::Hidden, cl::init(true),
150  cl::desc("Add instruction count to a LSR cost model"));
151 
152 // Flag to choose how to narrow complex lsr solution
154  "lsr-exp-narrow", cl::Hidden, cl::init(false),
155  cl::desc("Narrow LSR complex solution using"
156  " expectation of registers number"));
157 
158 // Flag to narrow search space by filtering non-optimal formulae with
159 // the same ScaledReg and Scale.
161  "lsr-filter-same-scaled-reg", cl::Hidden, cl::init(true),
162  cl::desc("Narrow LSR search space by filtering non-optimal formulae"
163  " with the same ScaledReg and Scale"));
164 
166  "lsr-preferred-addressing-mode", cl::Hidden, cl::init(TTI::AMK_None),
167  cl::desc("A flag that overrides the target's preferred addressing mode."),
169  "none",
170  "Don't prefer any addressing mode"),
172  "preindexed",
173  "Prefer pre-indexed addressing mode"),
175  "postindexed",
176  "Prefer post-indexed addressing mode")));
177 
179  "lsr-complexity-limit", cl::Hidden,
181  cl::desc("LSR search space complexity limit"));
182 
184  "lsr-setupcost-depth-limit", cl::Hidden, cl::init(7),
185  cl::desc("The limit on recursion depth for LSRs setup cost"));
186 
187 #ifndef NDEBUG
188 // Stress test IV chain generation.
190  "stress-ivchain", cl::Hidden, cl::init(false),
191  cl::desc("Stress test LSR IV chains"));
192 #else
193 static bool StressIVChain = false;
194 #endif
195 
196 namespace {
197 
198 struct MemAccessTy {
199  /// Used in situations where the accessed memory type is unknown.
200  static const unsigned UnknownAddressSpace =
202 
203  Type *MemTy = nullptr;
204  unsigned AddrSpace = UnknownAddressSpace;
205 
206  MemAccessTy() = default;
207  MemAccessTy(Type *Ty, unsigned AS) : MemTy(Ty), AddrSpace(AS) {}
208 
209  bool operator==(MemAccessTy Other) const {
210  return MemTy == Other.MemTy && AddrSpace == Other.AddrSpace;
211  }
212 
213  bool operator!=(MemAccessTy Other) const { return !(*this == Other); }
214 
215  static MemAccessTy getUnknown(LLVMContext &Ctx,
216  unsigned AS = UnknownAddressSpace) {
217  return MemAccessTy(Type::getVoidTy(Ctx), AS);
218  }
219 
220  Type *getType() { return MemTy; }
221 };
222 
223 /// This class holds data which is used to order reuse candidates.
224 class RegSortData {
225 public:
226  /// This represents the set of LSRUse indices which reference
227  /// a particular register.
228  SmallBitVector UsedByIndices;
229 
230  void print(raw_ostream &OS) const;
231  void dump() const;
232 };
233 
234 } // end anonymous namespace
235 
236 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
237 void RegSortData::print(raw_ostream &OS) const {
238  OS << "[NumUses=" << UsedByIndices.count() << ']';
239 }
240 
241 LLVM_DUMP_METHOD void RegSortData::dump() const {
242  print(errs()); errs() << '\n';
243 }
244 #endif
245 
246 namespace {
247 
248 /// Map register candidates to information about how they are used.
249 class RegUseTracker {
250  using RegUsesTy = DenseMap<const SCEV *, RegSortData>;
251 
252  RegUsesTy RegUsesMap;
254 
255 public:
256  void countRegister(const SCEV *Reg, size_t LUIdx);
257  void dropRegister(const SCEV *Reg, size_t LUIdx);
258  void swapAndDropUse(size_t LUIdx, size_t LastLUIdx);
259 
260  bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
261 
262  const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
263 
264  void clear();
265 
267  using const_iterator = SmallVectorImpl<const SCEV *>::const_iterator;
268 
269  iterator begin() { return RegSequence.begin(); }
270  iterator end() { return RegSequence.end(); }
271  const_iterator begin() const { return RegSequence.begin(); }
272  const_iterator end() const { return RegSequence.end(); }
273 };
274 
275 } // end anonymous namespace
276 
277 void
278 RegUseTracker::countRegister(const SCEV *Reg, size_t LUIdx) {
279  std::pair<RegUsesTy::iterator, bool> Pair =
280  RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
281  RegSortData &RSD = Pair.first->second;
282  if (Pair.second)
283  RegSequence.push_back(Reg);
284  RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
285  RSD.UsedByIndices.set(LUIdx);
286 }
287 
288 void
289 RegUseTracker::dropRegister(const SCEV *Reg, size_t LUIdx) {
290  RegUsesTy::iterator It = RegUsesMap.find(Reg);
291  assert(It != RegUsesMap.end());
292  RegSortData &RSD = It->second;
293  assert(RSD.UsedByIndices.size() > LUIdx);
294  RSD.UsedByIndices.reset(LUIdx);
295 }
296 
297 void
298 RegUseTracker::swapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
299  assert(LUIdx <= LastLUIdx);
300 
301  // Update RegUses. The data structure is not optimized for this purpose;
302  // we must iterate through it and update each of the bit vectors.
303  for (auto &Pair : RegUsesMap) {
304  SmallBitVector &UsedByIndices = Pair.second.UsedByIndices;
305  if (LUIdx < UsedByIndices.size())
306  UsedByIndices[LUIdx] =
307  LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : false;
308  UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
309  }
310 }
311 
312 bool
313 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
314  RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
315  if (I == RegUsesMap.end())
316  return false;
317  const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
318  int i = UsedByIndices.find_first();
319  if (i == -1) return false;
320  if ((size_t)i != LUIdx) return true;
321  return UsedByIndices.find_next(i) != -1;
322 }
323 
324 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
325  RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
326  assert(I != RegUsesMap.end() && "Unknown register!");
327  return I->second.UsedByIndices;
328 }
329 
330 void RegUseTracker::clear() {
331  RegUsesMap.clear();
332  RegSequence.clear();
333 }
334 
335 namespace {
336 
337 /// This class holds information that describes a formula for computing
338 /// satisfying a use. It may include broken-out immediates and scaled registers.
339 struct Formula {
340  /// Global base address used for complex addressing.
341  GlobalValue *BaseGV = nullptr;
342 
343  /// Base offset for complex addressing.
344  int64_t BaseOffset = 0;
345 
346  /// Whether any complex addressing has a base register.
347  bool HasBaseReg = false;
348 
349  /// The scale of any complex addressing.
350  int64_t Scale = 0;
351 
352  /// The list of "base" registers for this use. When this is non-empty. The
353  /// canonical representation of a formula is
354  /// 1. BaseRegs.size > 1 implies ScaledReg != NULL and
355  /// 2. ScaledReg != NULL implies Scale != 1 || !BaseRegs.empty().
356  /// 3. The reg containing recurrent expr related with currect loop in the
357  /// formula should be put in the ScaledReg.
358  /// #1 enforces that the scaled register is always used when at least two
359  /// registers are needed by the formula: e.g., reg1 + reg2 is reg1 + 1 * reg2.
360  /// #2 enforces that 1 * reg is reg.
361  /// #3 ensures invariant regs with respect to current loop can be combined
362  /// together in LSR codegen.
363  /// This invariant can be temporarily broken while building a formula.
364  /// However, every formula inserted into the LSRInstance must be in canonical
365  /// form.
367 
368  /// The 'scaled' register for this use. This should be non-null when Scale is
369  /// not zero.
370  const SCEV *ScaledReg = nullptr;
371 
372  /// An additional constant offset which added near the use. This requires a
373  /// temporary register, but the offset itself can live in an add immediate
374  /// field rather than a register.
375  int64_t UnfoldedOffset = 0;
376 
377  Formula() = default;
378 
379  void initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
380 
381  bool isCanonical(const Loop &L) const;
382 
383  void canonicalize(const Loop &L);
384 
385  bool unscale();
386 
387  bool hasZeroEnd() const;
388 
389  size_t getNumRegs() const;
390  Type *getType() const;
391 
392  void deleteBaseReg(const SCEV *&S);
393 
394  bool referencesReg(const SCEV *S) const;
395  bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
396  const RegUseTracker &RegUses) const;
397 
398  void print(raw_ostream &OS) const;
399  void dump() const;
400 };
401 
402 } // end anonymous namespace
403 
404 /// Recursion helper for initialMatch.
405 static void DoInitialMatch(const SCEV *S, Loop *L,
408  ScalarEvolution &SE) {
409  // Collect expressions which properly dominate the loop header.
410  if (SE.properlyDominates(S, L->getHeader())) {
411  Good.push_back(S);
412  return;
413  }
414 
415  // Look at add operands.
416  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
417  for (const SCEV *S : Add->operands())
418  DoInitialMatch(S, L, Good, Bad, SE);
419  return;
420  }
421 
422  // Look at addrec operands.
423  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
424  if (!AR->getStart()->isZero() && AR->isAffine()) {
425  DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
426  DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
427  AR->getStepRecurrence(SE),
428  // FIXME: AR->getNoWrapFlags()
429  AR->getLoop(), SCEV::FlagAnyWrap),
430  L, Good, Bad, SE);
431  return;
432  }
433 
434  // Handle a multiplication by -1 (negation) if it didn't fold.
435  if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
436  if (Mul->getOperand(0)->isAllOnesValue()) {
437  SmallVector<const SCEV *, 4> Ops(drop_begin(Mul->operands()));
438  const SCEV *NewMul = SE.getMulExpr(Ops);
439 
442  DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
443  const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
444  SE.getEffectiveSCEVType(NewMul->getType())));
445  for (const SCEV *S : MyGood)
446  Good.push_back(SE.getMulExpr(NegOne, S));
447  for (const SCEV *S : MyBad)
448  Bad.push_back(SE.getMulExpr(NegOne, S));
449  return;
450  }
451 
452  // Ok, we can't do anything interesting. Just stuff the whole thing into a
453  // register and hope for the best.
454  Bad.push_back(S);
455 }
456 
457 /// Incorporate loop-variant parts of S into this Formula, attempting to keep
458 /// all loop-invariant and loop-computable values in a single base register.
459 void Formula::initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
462  DoInitialMatch(S, L, Good, Bad, SE);
463  if (!Good.empty()) {
464  const SCEV *Sum = SE.getAddExpr(Good);
465  if (!Sum->isZero())
466  BaseRegs.push_back(Sum);
467  HasBaseReg = true;
468  }
469  if (!Bad.empty()) {
470  const SCEV *Sum = SE.getAddExpr(Bad);
471  if (!Sum->isZero())
472  BaseRegs.push_back(Sum);
473  HasBaseReg = true;
474  }
475  canonicalize(*L);
476 }
477 
478 /// Check whether or not this formula satisfies the canonical
479 /// representation.
480 /// \see Formula::BaseRegs.
481 bool Formula::isCanonical(const Loop &L) const {
482  if (!ScaledReg)
483  return BaseRegs.size() <= 1;
484 
485  if (Scale != 1)
486  return true;
487 
488  if (Scale == 1 && BaseRegs.empty())
489  return false;
490 
491  const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg);
492  if (SAR && SAR->getLoop() == &L)
493  return true;
494 
495  // If ScaledReg is not a recurrent expr, or it is but its loop is not current
496  // loop, meanwhile BaseRegs contains a recurrent expr reg related with current
497  // loop, we want to swap the reg in BaseRegs with ScaledReg.
498  auto I = find_if(BaseRegs, [&](const SCEV *S) {
499  return isa<const SCEVAddRecExpr>(S) &&
500  (cast<SCEVAddRecExpr>(S)->getLoop() == &L);
501  });
502  return I == BaseRegs.end();
503 }
504 
505 /// Helper method to morph a formula into its canonical representation.
506 /// \see Formula::BaseRegs.
507 /// Every formula having more than one base register, must use the ScaledReg
508 /// field. Otherwise, we would have to do special cases everywhere in LSR
509 /// to treat reg1 + reg2 + ... the same way as reg1 + 1*reg2 + ...
510 /// On the other hand, 1*reg should be canonicalized into reg.
511 void Formula::canonicalize(const Loop &L) {
512  if (isCanonical(L))
513  return;
514  // So far we did not need this case. This is easy to implement but it is
515  // useless to maintain dead code. Beside it could hurt compile time.
516  assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
517 
518  // Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
519  if (!ScaledReg) {
520  ScaledReg = BaseRegs.pop_back_val();
521  Scale = 1;
522  }
523 
524  // If ScaledReg is an invariant with respect to L, find the reg from
525  // BaseRegs containing the recurrent expr related with Loop L. Swap the
526  // reg with ScaledReg.
527  const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg);
528  if (!SAR || SAR->getLoop() != &L) {
529  auto I = find_if(BaseRegs, [&](const SCEV *S) {
530  return isa<const SCEVAddRecExpr>(S) &&
531  (cast<SCEVAddRecExpr>(S)->getLoop() == &L);
532  });
533  if (I != BaseRegs.end())
534  std::swap(ScaledReg, *I);
535  }
536 }
537 
538 /// Get rid of the scale in the formula.
539 /// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2.
540 /// \return true if it was possible to get rid of the scale, false otherwise.
541 /// \note After this operation the formula may not be in the canonical form.
542 bool Formula::unscale() {
543  if (Scale != 1)
544  return false;
545  Scale = 0;
546  BaseRegs.push_back(ScaledReg);
547  ScaledReg = nullptr;
548  return true;
549 }
550 
551 bool Formula::hasZeroEnd() const {
552  if (UnfoldedOffset || BaseOffset)
553  return false;
554  if (BaseRegs.size() != 1 || ScaledReg)
555  return false;
556  return true;
557 }
558 
559 /// Return the total number of register operands used by this formula. This does
560 /// not include register uses implied by non-constant addrec strides.
561 size_t Formula::getNumRegs() const {
562  return !!ScaledReg + BaseRegs.size();
563 }
564 
565 /// Return the type of this formula, if it has one, or null otherwise. This type
566 /// is meaningless except for the bit size.
567 Type *Formula::getType() const {
568  return !BaseRegs.empty() ? BaseRegs.front()->getType() :
569  ScaledReg ? ScaledReg->getType() :
570  BaseGV ? BaseGV->getType() :
571  nullptr;
572 }
573 
574 /// Delete the given base reg from the BaseRegs list.
575 void Formula::deleteBaseReg(const SCEV *&S) {
576  if (&S != &BaseRegs.back())
577  std::swap(S, BaseRegs.back());
578  BaseRegs.pop_back();
579 }
580 
581 /// Test if this formula references the given register.
582 bool Formula::referencesReg(const SCEV *S) const {
583  return S == ScaledReg || is_contained(BaseRegs, S);
584 }
585 
586 /// Test whether this formula uses registers which are used by uses other than
587 /// the use with the given index.
588 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
589  const RegUseTracker &RegUses) const {
590  if (ScaledReg)
591  if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
592  return true;
593  for (const SCEV *BaseReg : BaseRegs)
594  if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
595  return true;
596  return false;
597 }
598 
599 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
600 void Formula::print(raw_ostream &OS) const {
601  bool First = true;
602  if (BaseGV) {
603  if (!First) OS << " + "; else First = false;
604  BaseGV->printAsOperand(OS, /*PrintType=*/false);
605  }
606  if (BaseOffset != 0) {
607  if (!First) OS << " + "; else First = false;
608  OS << BaseOffset;
609  }
610  for (const SCEV *BaseReg : BaseRegs) {
611  if (!First) OS << " + "; else First = false;
612  OS << "reg(" << *BaseReg << ')';
613  }
614  if (HasBaseReg && BaseRegs.empty()) {
615  if (!First) OS << " + "; else First = false;
616  OS << "**error: HasBaseReg**";
617  } else if (!HasBaseReg && !BaseRegs.empty()) {
618  if (!First) OS << " + "; else First = false;
619  OS << "**error: !HasBaseReg**";
620  }
621  if (Scale != 0) {
622  if (!First) OS << " + "; else First = false;
623  OS << Scale << "*reg(";
624  if (ScaledReg)
625  OS << *ScaledReg;
626  else
627  OS << "<unknown>";
628  OS << ')';
629  }
630  if (UnfoldedOffset != 0) {
631  if (!First) OS << " + ";
632  OS << "imm(" << UnfoldedOffset << ')';
633  }
634 }
635 
636 LLVM_DUMP_METHOD void Formula::dump() const {
637  print(errs()); errs() << '\n';
638 }
639 #endif
640 
641 /// Return true if the given addrec can be sign-extended without changing its
642 /// value.
643 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
644  Type *WideTy =
646  return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
647 }
648 
649 /// Return true if the given add can be sign-extended without changing its
650 /// value.
651 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
652  Type *WideTy =
653  IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1);
654  return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
655 }
656 
657 /// Return true if the given mul can be sign-extended without changing its
658 /// value.
659 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
660  Type *WideTy =
662  SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
663  return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
664 }
665 
666 /// Return an expression for LHS /s RHS, if it can be determined and if the
667 /// remainder is known to be zero, or null otherwise. If IgnoreSignificantBits
668 /// is true, expressions like (X * Y) /s Y are simplified to Y, ignoring that
669 /// the multiplication may overflow, which is useful when the result will be
670 /// used in a context where the most significant bits are ignored.
671 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
672  ScalarEvolution &SE,
673  bool IgnoreSignificantBits = false) {
674  // Handle the trivial case, which works for any SCEV type.
675  if (LHS == RHS)
676  return SE.getConstant(LHS->getType(), 1);
677 
678  // Handle a few RHS special cases.
679  const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
680  if (RC) {
681  const APInt &RA = RC->getAPInt();
682  // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
683  // some folding.
684  if (RA.isAllOnesValue())
685  return SE.getMulExpr(LHS, RC);
686  // Handle x /s 1 as x.
687  if (RA == 1)
688  return LHS;
689  }
690 
691  // Check for a division of a constant by a constant.
692  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
693  if (!RC)
694  return nullptr;
695  const APInt &LA = C->getAPInt();
696  const APInt &RA = RC->getAPInt();
697  if (LA.srem(RA) != 0)
698  return nullptr;
699  return SE.getConstant(LA.sdiv(RA));
700  }
701 
702  // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
703  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
704  if ((IgnoreSignificantBits || isAddRecSExtable(AR, SE)) && AR->isAffine()) {
705  const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
706  IgnoreSignificantBits);
707  if (!Step) return nullptr;
708  const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
709  IgnoreSignificantBits);
710  if (!Start) return nullptr;
711  // FlagNW is independent of the start value, step direction, and is
712  // preserved with smaller magnitude steps.
713  // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
714  return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
715  }
716  return nullptr;
717  }
718 
719  // Distribute the sdiv over add operands, if the add doesn't overflow.
720  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
721  if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
723  for (const SCEV *S : Add->operands()) {
724  const SCEV *Op = getExactSDiv(S, RHS, SE, IgnoreSignificantBits);
725  if (!Op) return nullptr;
726  Ops.push_back(Op);
727  }
728  return SE.getAddExpr(Ops);
729  }
730  return nullptr;
731  }
732 
733  // Check for a multiply operand that we can pull RHS out of.
734  if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
735  if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
737  bool Found = false;
738  for (const SCEV *S : Mul->operands()) {
739  if (!Found)
740  if (const SCEV *Q = getExactSDiv(S, RHS, SE,
741  IgnoreSignificantBits)) {
742  S = Q;
743  Found = true;
744  }
745  Ops.push_back(S);
746  }
747  return Found ? SE.getMulExpr(Ops) : nullptr;
748  }
749  return nullptr;
750  }
751 
752  // Otherwise we don't know.
753  return nullptr;
754 }
755 
756 /// If S involves the addition of a constant integer value, return that integer
757 /// value, and mutate S to point to a new SCEV with that value excluded.
758 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
759  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
760  if (C->getAPInt().getMinSignedBits() <= 64) {
761  S = SE.getConstant(C->getType(), 0);
762  return C->getValue()->getSExtValue();
763  }
764  } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
765  SmallVector<const SCEV *, 8> NewOps(Add->operands());
766  int64_t Result = ExtractImmediate(NewOps.front(), SE);
767  if (Result != 0)
768  S = SE.getAddExpr(NewOps);
769  return Result;
770  } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
771  SmallVector<const SCEV *, 8> NewOps(AR->operands());
772  int64_t Result = ExtractImmediate(NewOps.front(), SE);
773  if (Result != 0)
774  S = SE.getAddRecExpr(NewOps, AR->getLoop(),
775  // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
777  return Result;
778  }
779  return 0;
780 }
781 
782 /// If S involves the addition of a GlobalValue address, return that symbol, and
783 /// mutate S to point to a new SCEV with that value excluded.
785  if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
786  if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
787  S = SE.getConstant(GV->getType(), 0);
788  return GV;
789  }
790  } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
791  SmallVector<const SCEV *, 8> NewOps(Add->operands());
792  GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
793  if (Result)
794  S = SE.getAddExpr(NewOps);
795  return Result;
796  } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
797  SmallVector<const SCEV *, 8> NewOps(AR->operands());
798  GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
799  if (Result)
800  S = SE.getAddRecExpr(NewOps, AR->getLoop(),
801  // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
803  return Result;
804  }
805  return nullptr;
806 }
807 
808 /// Returns true if the specified instruction is using the specified value as an
809 /// address.
811  Instruction *Inst, Value *OperandVal) {
812  bool isAddress = isa<LoadInst>(Inst);
813  if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
814  if (SI->getPointerOperand() == OperandVal)
815  isAddress = true;
816  } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
817  // Addressing modes can also be folded into prefetches and a variety
818  // of intrinsics.
819  switch (II->getIntrinsicID()) {
820  case Intrinsic::memset:
821  case Intrinsic::prefetch:
822  case Intrinsic::masked_load:
823  if (II->getArgOperand(0) == OperandVal)
824  isAddress = true;
825  break;
826  case Intrinsic::masked_store:
827  if (II->getArgOperand(1) == OperandVal)
828  isAddress = true;
829  break;
830  case Intrinsic::memmove:
831  case Intrinsic::memcpy:
832  if (II->getArgOperand(0) == OperandVal ||
833  II->getArgOperand(1) == OperandVal)
834  isAddress = true;
835  break;
836  default: {
837  MemIntrinsicInfo IntrInfo;
838  if (TTI.getTgtMemIntrinsic(II, IntrInfo)) {
839  if (IntrInfo.PtrVal == OperandVal)
840  isAddress = true;
841  }
842  }
843  }
844  } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
845  if (RMW->getPointerOperand() == OperandVal)
846  isAddress = true;
847  } else if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) {
848  if (CmpX->getPointerOperand() == OperandVal)
849  isAddress = true;
850  }
851  return isAddress;
852 }
853 
854 /// Return the type of the memory being accessed.
855 static MemAccessTy getAccessType(const TargetTransformInfo &TTI,
856  Instruction *Inst, Value *OperandVal) {
857  MemAccessTy AccessTy(Inst->getType(), MemAccessTy::UnknownAddressSpace);
858  if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
859  AccessTy.MemTy = SI->getOperand(0)->getType();
860  AccessTy.AddrSpace = SI->getPointerAddressSpace();
861  } else if (const LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
862  AccessTy.AddrSpace = LI->getPointerAddressSpace();
863  } else if (const AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
864  AccessTy.AddrSpace = RMW->getPointerAddressSpace();
865  } else if (const AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) {
866  AccessTy.AddrSpace = CmpX->getPointerAddressSpace();
867  } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
868  switch (II->getIntrinsicID()) {
869  case Intrinsic::prefetch:
870  case Intrinsic::memset:
871  AccessTy.AddrSpace = II->getArgOperand(0)->getType()->getPointerAddressSpace();
872  AccessTy.MemTy = OperandVal->getType();
873  break;
874  case Intrinsic::memmove:
875  case Intrinsic::memcpy:
876  AccessTy.AddrSpace = OperandVal->getType()->getPointerAddressSpace();
877  AccessTy.MemTy = OperandVal->getType();
878  break;
879  case Intrinsic::masked_load:
880  AccessTy.AddrSpace =
881  II->getArgOperand(0)->getType()->getPointerAddressSpace();
882  break;
883  case Intrinsic::masked_store:
884  AccessTy.MemTy = II->getOperand(0)->getType();
885  AccessTy.AddrSpace =
886  II->getArgOperand(1)->getType()->getPointerAddressSpace();
887  break;
888  default: {
889  MemIntrinsicInfo IntrInfo;
890  if (TTI.getTgtMemIntrinsic(II, IntrInfo) && IntrInfo.PtrVal) {
891  AccessTy.AddrSpace
892  = IntrInfo.PtrVal->getType()->getPointerAddressSpace();
893  }
894 
895  break;
896  }
897  }
898  }
899 
900  // All pointers have the same requirements, so canonicalize them to an
901  // arbitrary pointer type to minimize variation.
902  if (PointerType *PTy = dyn_cast<PointerType>(AccessTy.MemTy))
903  AccessTy.MemTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
904  PTy->getAddressSpace());
905 
906  return AccessTy;
907 }
908 
909 /// Return true if this AddRec is already a phi in its loop.
910 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
911  for (PHINode &PN : AR->getLoop()->getHeader()->phis()) {
912  if (SE.isSCEVable(PN.getType()) &&
913  (SE.getEffectiveSCEVType(PN.getType()) ==
914  SE.getEffectiveSCEVType(AR->getType())) &&
915  SE.getSCEV(&PN) == AR)
916  return true;
917  }
918  return false;
919 }
920 
921 /// Check if expanding this expression is likely to incur significant cost. This
922 /// is tricky because SCEV doesn't track which expressions are actually computed
923 /// by the current IR.
924 ///
925 /// We currently allow expansion of IV increments that involve adds,
926 /// multiplication by constants, and AddRecs from existing phis.
927 ///
928 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
929 /// obvious multiple of the UDivExpr.
930 static bool isHighCostExpansion(const SCEV *S,
931  SmallPtrSetImpl<const SCEV*> &Processed,
932  ScalarEvolution &SE) {
933  // Zero/One operand expressions
934  switch (S->getSCEVType()) {
935  case scUnknown:
936  case scConstant:
937  return false;
938  case scTruncate:
939  return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
940  Processed, SE);
941  case scZeroExtend:
942  return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
943  Processed, SE);
944  case scSignExtend:
945  return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
946  Processed, SE);
947  default:
948  break;
949  }
950 
951  if (!Processed.insert(S).second)
952  return false;
953 
954  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
955  for (const SCEV *S : Add->operands()) {
956  if (isHighCostExpansion(S, Processed, SE))
957  return true;
958  }
959  return false;
960  }
961 
962  if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
963  if (Mul->getNumOperands() == 2) {
964  // Multiplication by a constant is ok
965  if (isa<SCEVConstant>(Mul->getOperand(0)))
966  return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
967 
968  // If we have the value of one operand, check if an existing
969  // multiplication already generates this expression.
970  if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
971  Value *UVal = U->getValue();
972  for (User *UR : UVal->users()) {
973  // If U is a constant, it may be used by a ConstantExpr.
974  Instruction *UI = dyn_cast<Instruction>(UR);
975  if (UI && UI->getOpcode() == Instruction::Mul &&
976  SE.isSCEVable(UI->getType())) {
977  return SE.getSCEV(UI) == Mul;
978  }
979  }
980  }
981  }
982  }
983 
984  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
985  if (isExistingPhi(AR, SE))
986  return false;
987  }
988 
989  // Fow now, consider any other type of expression (div/mul/min/max) high cost.
990  return true;
991 }
992 
993 namespace {
994 
995 class LSRUse;
996 
997 } // end anonymous namespace
998 
999 /// Check if the addressing mode defined by \p F is completely
1000 /// folded in \p LU at isel time.
1001 /// This includes address-mode folding and special icmp tricks.
1002 /// This function returns true if \p LU can accommodate what \p F
1003 /// defines and up to 1 base + 1 scaled + offset.
1004 /// In other words, if \p F has several base registers, this function may
1005 /// still return true. Therefore, users still need to account for
1006 /// additional base registers and/or unfolded offsets to derive an
1007 /// accurate cost model.
1008 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1009  const LSRUse &LU, const Formula &F);
1010 
1011 // Get the cost of the scaling factor used in F for LU.
1012 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1013  const LSRUse &LU, const Formula &F,
1014  const Loop &L);
1015 
1016 namespace {
1017 
1018 /// This class is used to measure and compare candidate formulae.
1019 class Cost {
1020  const Loop *L = nullptr;
1021  ScalarEvolution *SE = nullptr;
1022  const TargetTransformInfo *TTI = nullptr;
1025 
1026 public:
1027  Cost() = delete;
1028  Cost(const Loop *L, ScalarEvolution &SE, const TargetTransformInfo &TTI,
1030  L(L), SE(&SE), TTI(&TTI), AMK(AMK) {
1031  C.Insns = 0;
1032  C.NumRegs = 0;
1033  C.AddRecCost = 0;
1034  C.NumIVMuls = 0;
1035  C.NumBaseAdds = 0;
1036  C.ImmCost = 0;
1037  C.SetupCost = 0;
1038  C.ScaleCost = 0;
1039  }
1040 
1041  bool isLess(Cost &Other);
1042 
1043  void Lose();
1044 
1045 #ifndef NDEBUG
1046  // Once any of the metrics loses, they must all remain losers.
1047  bool isValid() {
1048  return ((C.Insns | C.NumRegs | C.AddRecCost | C.NumIVMuls | C.NumBaseAdds
1049  | C.ImmCost | C.SetupCost | C.ScaleCost) != ~0u)
1050  || ((C.Insns & C.NumRegs & C.AddRecCost & C.NumIVMuls & C.NumBaseAdds
1051  & C.ImmCost & C.SetupCost & C.ScaleCost) == ~0u);
1052  }
1053 #endif
1054 
1055  bool isLoser() {
1056  assert(isValid() && "invalid cost");
1057  return C.NumRegs == ~0u;
1058  }
1059 
1060  void RateFormula(const Formula &F,
1062  const DenseSet<const SCEV *> &VisitedRegs,
1063  const LSRUse &LU,
1064  SmallPtrSetImpl<const SCEV *> *LoserRegs = nullptr);
1065 
1066  void print(raw_ostream &OS) const;
1067  void dump() const;
1068 
1069 private:
1070  void RateRegister(const Formula &F, const SCEV *Reg,
1072  void RatePrimaryRegister(const Formula &F, const SCEV *Reg,
1074  SmallPtrSetImpl<const SCEV *> *LoserRegs);
1075 };
1076 
1077 /// An operand value in an instruction which is to be replaced with some
1078 /// equivalent, possibly strength-reduced, replacement.
1079 struct LSRFixup {
1080  /// The instruction which will be updated.
1081  Instruction *UserInst = nullptr;
1082 
1083  /// The operand of the instruction which will be replaced. The operand may be
1084  /// used more than once; every instance will be replaced.
1085  Value *OperandValToReplace = nullptr;
1086 
1087  /// If this user is to use the post-incremented value of an induction
1088  /// variable, this set is non-empty and holds the loops associated with the
1089  /// induction variable.
1090  PostIncLoopSet PostIncLoops;
1091 
1092  /// A constant offset to be added to the LSRUse expression. This allows
1093  /// multiple fixups to share the same LSRUse with different offsets, for
1094  /// example in an unrolled loop.
1095  int64_t Offset = 0;
1096 
1097  LSRFixup() = default;
1098 
1099  bool isUseFullyOutsideLoop(const Loop *L) const;
1100 
1101  void print(raw_ostream &OS) const;
1102  void dump() const;
1103 };
1104 
1105 /// A DenseMapInfo implementation for holding DenseMaps and DenseSets of sorted
1106 /// SmallVectors of const SCEV*.
1107 struct UniquifierDenseMapInfo {
1108  static SmallVector<const SCEV *, 4> getEmptyKey() {
1110  V.push_back(reinterpret_cast<const SCEV *>(-1));
1111  return V;
1112  }
1113 
1114  static SmallVector<const SCEV *, 4> getTombstoneKey() {
1116  V.push_back(reinterpret_cast<const SCEV *>(-2));
1117  return V;
1118  }
1119 
1120  static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1121  return static_cast<unsigned>(hash_combine_range(V.begin(), V.end()));
1122  }
1123 
1124  static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1125  const SmallVector<const SCEV *, 4> &RHS) {
1126  return LHS == RHS;
1127  }
1128 };
1129 
1130 /// This class holds the state that LSR keeps for each use in IVUsers, as well
1131 /// as uses invented by LSR itself. It includes information about what kinds of
1132 /// things can be folded into the user, information about the user itself, and
1133 /// information about how the use may be satisfied. TODO: Represent multiple
1134 /// users of the same expression in common?
1135 class LSRUse {
1136  DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1137 
1138 public:
1139  /// An enum for a kind of use, indicating what types of scaled and immediate
1140  /// operands it might support.
1141  enum KindType {
1142  Basic, ///< A normal use, with no folding.
1143  Special, ///< A special case of basic, allowing -1 scales.
1144  Address, ///< An address use; folding according to TargetLowering
1145  ICmpZero ///< An equality icmp with both operands folded into one.
1146  // TODO: Add a generic icmp too?
1147  };
1148 
1149  using SCEVUseKindPair = PointerIntPair<const SCEV *, 2, KindType>;
1150 
1151  KindType Kind;
1152  MemAccessTy AccessTy;
1153 
1154  /// The list of operands which are to be replaced.
1156 
1157  /// Keep track of the min and max offsets of the fixups.
1158  int64_t MinOffset = std::numeric_limits<int64_t>::max();
1159  int64_t MaxOffset = std::numeric_limits<int64_t>::min();
1160 
1161  /// This records whether all of the fixups using this LSRUse are outside of
1162  /// the loop, in which case some special-case heuristics may be used.
1163  bool AllFixupsOutsideLoop = true;
1164 
1165  /// RigidFormula is set to true to guarantee that this use will be associated
1166  /// with a single formula--the one that initially matched. Some SCEV
1167  /// expressions cannot be expanded. This allows LSR to consider the registers
1168  /// used by those expressions without the need to expand them later after
1169  /// changing the formula.
1170  bool RigidFormula = false;
1171 
1172  /// This records the widest use type for any fixup using this
1173  /// LSRUse. FindUseWithSimilarFormula can't consider uses with different max
1174  /// fixup widths to be equivalent, because the narrower one may be relying on
1175  /// the implicit truncation to truncate away bogus bits.
1176  Type *WidestFixupType = nullptr;
1177 
1178  /// A list of ways to build a value that can satisfy this user. After the
1179  /// list is populated, one of these is selected heuristically and used to
1180  /// formulate a replacement for OperandValToReplace in UserInst.
1181  SmallVector<Formula, 12> Formulae;
1182 
1183  /// The set of register candidates used by all formulae in this LSRUse.
1185 
1186  LSRUse(KindType K, MemAccessTy AT) : Kind(K), AccessTy(AT) {}
1187 
1188  LSRFixup &getNewFixup() {
1189  Fixups.push_back(LSRFixup());
1190  return Fixups.back();
1191  }
1192 
1193  void pushFixup(LSRFixup &f) {
1194  Fixups.push_back(f);
1195  if (f.Offset > MaxOffset)
1196  MaxOffset = f.Offset;
1197  if (f.Offset < MinOffset)
1198  MinOffset = f.Offset;
1199  }
1200 
1201  bool HasFormulaWithSameRegs(const Formula &F) const;
1202  float getNotSelectedProbability(const SCEV *Reg) const;
1203  bool InsertFormula(const Formula &F, const Loop &L);
1204  void DeleteFormula(Formula &F);
1205  void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1206 
1207  void print(raw_ostream &OS) const;
1208  void dump() const;
1209 };
1210 
1211 } // end anonymous namespace
1212 
1213 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1214  LSRUse::KindType Kind, MemAccessTy AccessTy,
1215  GlobalValue *BaseGV, int64_t BaseOffset,
1216  bool HasBaseReg, int64_t Scale,
1217  Instruction *Fixup = nullptr);
1218 
1219 static unsigned getSetupCost(const SCEV *Reg, unsigned Depth) {
1220  if (isa<SCEVUnknown>(Reg) || isa<SCEVConstant>(Reg))
1221  return 1;
1222  if (Depth == 0)
1223  return 0;
1224  if (const auto *S = dyn_cast<SCEVAddRecExpr>(Reg))
1225  return getSetupCost(S->getStart(), Depth - 1);
1226  if (auto S = dyn_cast<SCEVIntegralCastExpr>(Reg))
1227  return getSetupCost(S->getOperand(), Depth - 1);
1228  if (auto S = dyn_cast<SCEVNAryExpr>(Reg))
1229  return std::accumulate(S->op_begin(), S->op_end(), 0,
1230  [&](unsigned i, const SCEV *Reg) {
1231  return i + getSetupCost(Reg, Depth - 1);
1232  });
1233  if (auto S = dyn_cast<SCEVUDivExpr>(Reg))
1234  return getSetupCost(S->getLHS(), Depth - 1) +
1235  getSetupCost(S->getRHS(), Depth - 1);
1236  return 0;
1237 }
1238 
1239 /// Tally up interesting quantities from the given register.
1240 void Cost::RateRegister(const Formula &F, const SCEV *Reg,
1242  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
1243  // If this is an addrec for another loop, it should be an invariant
1244  // with respect to L since L is the innermost loop (at least
1245  // for now LSR only handles innermost loops).
1246  if (AR->getLoop() != L) {
1247  // If the AddRec exists, consider it's register free and leave it alone.
1248  if (isExistingPhi(AR, *SE) && AMK != TTI::AMK_PostIndexed)
1249  return;
1250 
1251  // It is bad to allow LSR for current loop to add induction variables
1252  // for its sibling loops.
1253  if (!AR->getLoop()->contains(L)) {
1254  Lose();
1255  return;
1256  }
1257 
1258  // Otherwise, it will be an invariant with respect to Loop L.
1259  ++C.NumRegs;
1260  return;
1261  }
1262 
1263  unsigned LoopCost = 1;
1264  if (TTI->isIndexedLoadLegal(TTI->MIM_PostInc, AR->getType()) ||
1265  TTI->isIndexedStoreLegal(TTI->MIM_PostInc, AR->getType())) {
1266 
1267  // If the step size matches the base offset, we could use pre-indexed
1268  // addressing.
1269  if (AMK == TTI::AMK_PreIndexed) {
1270  if (auto *Step = dyn_cast<SCEVConstant>(AR->getStepRecurrence(*SE)))
1271  if (Step->getAPInt() == F.BaseOffset)
1272  LoopCost = 0;
1273  } else if (AMK == TTI::AMK_PostIndexed) {
1274  const SCEV *LoopStep = AR->getStepRecurrence(*SE);
1275  if (isa<SCEVConstant>(LoopStep)) {
1276  const SCEV *LoopStart = AR->getStart();
1277  if (!isa<SCEVConstant>(LoopStart) &&
1278  SE->isLoopInvariant(LoopStart, L))
1279  LoopCost = 0;
1280  }
1281  }
1282  }
1283  C.AddRecCost += LoopCost;
1284 
1285  // Add the step value register, if it needs one.
1286  // TODO: The non-affine case isn't precisely modeled here.
1287  if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
1288  if (!Regs.count(AR->getOperand(1))) {
1289  RateRegister(F, AR->getOperand(1), Regs);
1290  if (isLoser())
1291  return;
1292  }
1293  }
1294  }
1295  ++C.NumRegs;
1296 
1297  // Rough heuristic; favor registers which don't require extra setup
1298  // instructions in the preheader.
1299  C.SetupCost += getSetupCost(Reg, SetupCostDepthLimit);
1300  // Ensure we don't, even with the recusion limit, produce invalid costs.
1301  C.SetupCost = std::min<unsigned>(C.SetupCost, 1 << 16);
1302 
1303  C.NumIVMuls += isa<SCEVMulExpr>(Reg) &&
1305 }
1306 
1307 /// Record this register in the set. If we haven't seen it before, rate
1308 /// it. Optional LoserRegs provides a way to declare any formula that refers to
1309 /// one of those regs an instant loser.
1310 void Cost::RatePrimaryRegister(const Formula &F, const SCEV *Reg,
1312  SmallPtrSetImpl<const SCEV *> *LoserRegs) {
1313  if (LoserRegs && LoserRegs->count(Reg)) {
1314  Lose();
1315  return;
1316  }
1317  if (Regs.insert(Reg).second) {
1318  RateRegister(F, Reg, Regs);
1319  if (LoserRegs && isLoser())
1320  LoserRegs->insert(Reg);
1321  }
1322 }
1323 
1324 void Cost::RateFormula(const Formula &F,
1326  const DenseSet<const SCEV *> &VisitedRegs,
1327  const LSRUse &LU,
1328  SmallPtrSetImpl<const SCEV *> *LoserRegs) {
1329  assert(F.isCanonical(*L) && "Cost is accurate only for canonical formula");
1330  // Tally up the registers.
1331  unsigned PrevAddRecCost = C.AddRecCost;
1332  unsigned PrevNumRegs = C.NumRegs;
1333  unsigned PrevNumBaseAdds = C.NumBaseAdds;
1334  if (const SCEV *ScaledReg = F.ScaledReg) {
1335  if (VisitedRegs.count(ScaledReg)) {
1336  Lose();
1337  return;
1338  }
1339  RatePrimaryRegister(F, ScaledReg, Regs, LoserRegs);
1340  if (isLoser())
1341  return;
1342  }
1343  for (const SCEV *BaseReg : F.BaseRegs) {
1344  if (VisitedRegs.count(BaseReg)) {
1345  Lose();
1346  return;
1347  }
1348  RatePrimaryRegister(F, BaseReg, Regs, LoserRegs);
1349  if (isLoser())
1350  return;
1351  }
1352 
1353  // Determine how many (unfolded) adds we'll need inside the loop.
1354  size_t NumBaseParts = F.getNumRegs();
1355  if (NumBaseParts > 1)
1356  // Do not count the base and a possible second register if the target
1357  // allows to fold 2 registers.
1358  C.NumBaseAdds +=
1359  NumBaseParts - (1 + (F.Scale && isAMCompletelyFolded(*TTI, LU, F)));
1360  C.NumBaseAdds += (F.UnfoldedOffset != 0);
1361 
1362  // Accumulate non-free scaling amounts.
1363  C.ScaleCost += getScalingFactorCost(*TTI, LU, F, *L);
1364 
1365  // Tally up the non-zero immediates.
1366  for (const LSRFixup &Fixup : LU.Fixups) {
1367  int64_t O = Fixup.Offset;
1368  int64_t Offset = (uint64_t)O + F.BaseOffset;
1369  if (F.BaseGV)
1370  C.ImmCost += 64; // Handle symbolic values conservatively.
1371  // TODO: This should probably be the pointer size.
1372  else if (Offset != 0)
1373  C.ImmCost += APInt(64, Offset, true).getMinSignedBits();
1374 
1375  // Check with target if this offset with this instruction is
1376  // specifically not supported.
1377  if (LU.Kind == LSRUse::Address && Offset != 0 &&
1378  !isAMCompletelyFolded(*TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
1379  Offset, F.HasBaseReg, F.Scale, Fixup.UserInst))
1380  C.NumBaseAdds++;
1381  }
1382 
1383  // If we don't count instruction cost exit here.
1384  if (!InsnsCost) {
1385  assert(isValid() && "invalid cost");
1386  return;
1387  }
1388 
1389  // Treat every new register that exceeds TTI.getNumberOfRegisters() - 1 as
1390  // additional instruction (at least fill).
1391  // TODO: Need distinguish register class?
1392  unsigned TTIRegNum = TTI->getNumberOfRegisters(
1393  TTI->getRegisterClassForType(false, F.getType())) - 1;
1394  if (C.NumRegs > TTIRegNum) {
1395  // Cost already exceeded TTIRegNum, then only newly added register can add
1396  // new instructions.
1397  if (PrevNumRegs > TTIRegNum)
1398  C.Insns += (C.NumRegs - PrevNumRegs);
1399  else
1400  C.Insns += (C.NumRegs - TTIRegNum);
1401  }
1402 
1403  // If ICmpZero formula ends with not 0, it could not be replaced by
1404  // just add or sub. We'll need to compare final result of AddRec.
1405  // That means we'll need an additional instruction. But if the target can
1406  // macro-fuse a compare with a branch, don't count this extra instruction.
1407  // For -10 + {0, +, 1}:
1408  // i = i + 1;
1409  // cmp i, 10
1410  //
1411  // For {-10, +, 1}:
1412  // i = i + 1;
1413  if (LU.Kind == LSRUse::ICmpZero && !F.hasZeroEnd() &&
1414  !TTI->canMacroFuseCmp())
1415  C.Insns++;
1416  // Each new AddRec adds 1 instruction to calculation.
1417  C.Insns += (C.AddRecCost - PrevAddRecCost);
1418 
1419  // BaseAdds adds instructions for unfolded registers.
1420  if (LU.Kind != LSRUse::ICmpZero)
1421  C.Insns += C.NumBaseAdds - PrevNumBaseAdds;
1422  assert(isValid() && "invalid cost");
1423 }
1424 
1425 /// Set this cost to a losing value.
1426 void Cost::Lose() {
1429  C.AddRecCost = std::numeric_limits<unsigned>::max();
1430  C.NumIVMuls = std::numeric_limits<unsigned>::max();
1431  C.NumBaseAdds = std::numeric_limits<unsigned>::max();
1433  C.SetupCost = std::numeric_limits<unsigned>::max();
1434  C.ScaleCost = std::numeric_limits<unsigned>::max();
1435 }
1436 
1437 /// Choose the lower cost.
1438 bool Cost::isLess(Cost &Other) {
1439  if (InsnsCost.getNumOccurrences() > 0 && InsnsCost &&
1440  C.Insns != Other.C.Insns)
1441  return C.Insns < Other.C.Insns;
1442  return TTI->isLSRCostLess(C, Other.C);
1443 }
1444 
1445 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1446 void Cost::print(raw_ostream &OS) const {
1447  if (InsnsCost)
1448  OS << C.Insns << " instruction" << (C.Insns == 1 ? " " : "s ");
1449  OS << C.NumRegs << " reg" << (C.NumRegs == 1 ? "" : "s");
1450  if (C.AddRecCost != 0)
1451  OS << ", with addrec cost " << C.AddRecCost;
1452  if (C.NumIVMuls != 0)
1453  OS << ", plus " << C.NumIVMuls << " IV mul"
1454  << (C.NumIVMuls == 1 ? "" : "s");
1455  if (C.NumBaseAdds != 0)
1456  OS << ", plus " << C.NumBaseAdds << " base add"
1457  << (C.NumBaseAdds == 1 ? "" : "s");
1458  if (C.ScaleCost != 0)
1459  OS << ", plus " << C.ScaleCost << " scale cost";
1460  if (C.ImmCost != 0)
1461  OS << ", plus " << C.ImmCost << " imm cost";
1462  if (C.SetupCost != 0)
1463  OS << ", plus " << C.SetupCost << " setup cost";
1464 }
1465 
1466 LLVM_DUMP_METHOD void Cost::dump() const {
1467  print(errs()); errs() << '\n';
1468 }
1469 #endif
1470 
1471 /// Test whether this fixup always uses its value outside of the given loop.
1472 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1473  // PHI nodes use their value in their incoming blocks.
1474  if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1475  for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1476  if (PN->getIncomingValue(i) == OperandValToReplace &&
1477  L->contains(PN->getIncomingBlock(i)))
1478  return false;
1479  return true;
1480  }
1481 
1482  return !L->contains(UserInst);
1483 }
1484 
1485 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1486 void LSRFixup::print(raw_ostream &OS) const {
1487  OS << "UserInst=";
1488  // Store is common and interesting enough to be worth special-casing.
1489  if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1490  OS << "store ";
1491  Store->getOperand(0)->printAsOperand(OS, /*PrintType=*/false);
1492  } else if (UserInst->getType()->isVoidTy())
1493  OS << UserInst->getOpcodeName();
1494  else
1495  UserInst->printAsOperand(OS, /*PrintType=*/false);
1496 
1497  OS << ", OperandValToReplace=";
1498  OperandValToReplace->printAsOperand(OS, /*PrintType=*/false);
1499 
1500  for (const Loop *PIL : PostIncLoops) {
1501  OS << ", PostIncLoop=";
1502  PIL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
1503  }
1504 
1505  if (Offset != 0)
1506  OS << ", Offset=" << Offset;
1507 }
1508 
1509 LLVM_DUMP_METHOD void LSRFixup::dump() const {
1510  print(errs()); errs() << '\n';
1511 }
1512 #endif
1513 
1514 /// Test whether this use as a formula which has the same registers as the given
1515 /// formula.
1516 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1517  SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1518  if (F.ScaledReg) Key.push_back(F.ScaledReg);
1519  // Unstable sort by host order ok, because this is only used for uniquifying.
1520  llvm::sort(Key);
1521  return Uniquifier.count(Key);
1522 }
1523 
1524 /// The function returns a probability of selecting formula without Reg.
1525 float LSRUse::getNotSelectedProbability(const SCEV *Reg) const {
1526  unsigned FNum = 0;
1527  for (const Formula &F : Formulae)
1528  if (F.referencesReg(Reg))
1529  FNum++;
1530  return ((float)(Formulae.size() - FNum)) / Formulae.size();
1531 }
1532 
1533 /// If the given formula has not yet been inserted, add it to the list, and
1534 /// return true. Return false otherwise. The formula must be in canonical form.
1535 bool LSRUse::InsertFormula(const Formula &F, const Loop &L) {
1536  assert(F.isCanonical(L) && "Invalid canonical representation");
1537 
1538  if (!Formulae.empty() && RigidFormula)
1539  return false;
1540 
1541  SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1542  if (F.ScaledReg) Key.push_back(F.ScaledReg);
1543  // Unstable sort by host order ok, because this is only used for uniquifying.
1544  llvm::sort(Key);
1545 
1546  if (!Uniquifier.insert(Key).second)
1547  return false;
1548 
1549  // Using a register to hold the value of 0 is not profitable.
1550  assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1551  "Zero allocated in a scaled register!");
1552 #ifndef NDEBUG
1553  for (const SCEV *BaseReg : F.BaseRegs)
1554  assert(!BaseReg->isZero() && "Zero allocated in a base register!");
1555 #endif
1556 
1557  // Add the formula to the list.
1558  Formulae.push_back(F);
1559 
1560  // Record registers now being used by this use.
1561  Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1562  if (F.ScaledReg)
1563  Regs.insert(F.ScaledReg);
1564 
1565  return true;
1566 }
1567 
1568 /// Remove the given formula from this use's list.
1569 void LSRUse::DeleteFormula(Formula &F) {
1570  if (&F != &Formulae.back())
1571  std::swap(F, Formulae.back());
1572  Formulae.pop_back();
1573 }
1574 
1575 /// Recompute the Regs field, and update RegUses.
1576 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1577  // Now that we've filtered out some formulae, recompute the Regs set.
1578  SmallPtrSet<const SCEV *, 4> OldRegs = std::move(Regs);
1579  Regs.clear();
1580  for (const Formula &F : Formulae) {
1581  if (F.ScaledReg) Regs.insert(F.ScaledReg);
1582  Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1583  }
1584 
1585  // Update the RegTracker.
1586  for (const SCEV *S : OldRegs)
1587  if (!Regs.count(S))
1588  RegUses.dropRegister(S, LUIdx);
1589 }
1590 
1591 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1592 void LSRUse::print(raw_ostream &OS) const {
1593  OS << "LSR Use: Kind=";
1594  switch (Kind) {
1595  case Basic: OS << "Basic"; break;
1596  case Special: OS << "Special"; break;
1597  case ICmpZero: OS << "ICmpZero"; break;
1598  case Address:
1599  OS << "Address of ";
1600  if (AccessTy.MemTy->isPointerTy())
1601  OS << "pointer"; // the full pointer type could be really verbose
1602  else {
1603  OS << *AccessTy.MemTy;
1604  }
1605 
1606  OS << " in addrspace(" << AccessTy.AddrSpace << ')';
1607  }
1608 
1609  OS << ", Offsets={";
1610  bool NeedComma = false;
1611  for (const LSRFixup &Fixup : Fixups) {
1612  if (NeedComma) OS << ',';
1613  OS << Fixup.Offset;
1614  NeedComma = true;
1615  }
1616  OS << '}';
1617 
1618  if (AllFixupsOutsideLoop)
1619  OS << ", all-fixups-outside-loop";
1620 
1621  if (WidestFixupType)
1622  OS << ", widest fixup type: " << *WidestFixupType;
1623 }
1624 
1625 LLVM_DUMP_METHOD void LSRUse::dump() const {
1626  print(errs()); errs() << '\n';
1627 }
1628 #endif
1629 
1631  LSRUse::KindType Kind, MemAccessTy AccessTy,
1632  GlobalValue *BaseGV, int64_t BaseOffset,
1633  bool HasBaseReg, int64_t Scale,
1634  Instruction *Fixup/*= nullptr*/) {
1635  switch (Kind) {
1636  case LSRUse::Address:
1637  return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, BaseOffset,
1638  HasBaseReg, Scale, AccessTy.AddrSpace, Fixup);
1639 
1640  case LSRUse::ICmpZero:
1641  // There's not even a target hook for querying whether it would be legal to
1642  // fold a GV into an ICmp.
1643  if (BaseGV)
1644  return false;
1645 
1646  // ICmp only has two operands; don't allow more than two non-trivial parts.
1647  if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1648  return false;
1649 
1650  // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1651  // putting the scaled register in the other operand of the icmp.
1652  if (Scale != 0 && Scale != -1)
1653  return false;
1654 
1655  // If we have low-level target information, ask the target if it can fold an
1656  // integer immediate on an icmp.
1657  if (BaseOffset != 0) {
1658  // We have one of:
1659  // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1660  // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1661  // Offs is the ICmp immediate.
1662  if (Scale == 0)
1663  // The cast does the right thing with
1664  // std::numeric_limits<int64_t>::min().
1665  BaseOffset = -(uint64_t)BaseOffset;
1666  return TTI.isLegalICmpImmediate(BaseOffset);
1667  }
1668 
1669  // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1670  return true;
1671 
1672  case LSRUse::Basic:
1673  // Only handle single-register values.
1674  return !BaseGV && Scale == 0 && BaseOffset == 0;
1675 
1676  case LSRUse::Special:
1677  // Special case Basic to handle -1 scales.
1678  return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1679  }
1680 
1681  llvm_unreachable("Invalid LSRUse Kind!");
1682 }
1683 
1685  int64_t MinOffset, int64_t MaxOffset,
1686  LSRUse::KindType Kind, MemAccessTy AccessTy,
1687  GlobalValue *BaseGV, int64_t BaseOffset,
1688  bool HasBaseReg, int64_t Scale) {
1689  // Check for overflow.
1690  if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1691  (MinOffset > 0))
1692  return false;
1693  MinOffset = (uint64_t)BaseOffset + MinOffset;
1694  if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1695  (MaxOffset > 0))
1696  return false;
1697  MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1698 
1699  return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MinOffset,
1700  HasBaseReg, Scale) &&
1701  isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MaxOffset,
1702  HasBaseReg, Scale);
1703 }
1704 
1706  int64_t MinOffset, int64_t MaxOffset,
1707  LSRUse::KindType Kind, MemAccessTy AccessTy,
1708  const Formula &F, const Loop &L) {
1709  // For the purpose of isAMCompletelyFolded either having a canonical formula
1710  // or a scale not equal to zero is correct.
1711  // Problems may arise from non canonical formulae having a scale == 0.
1712  // Strictly speaking it would best to just rely on canonical formulae.
1713  // However, when we generate the scaled formulae, we first check that the
1714  // scaling factor is profitable before computing the actual ScaledReg for
1715  // compile time sake.
1716  assert((F.isCanonical(L) || F.Scale != 0));
1717  return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1718  F.BaseGV, F.BaseOffset, F.HasBaseReg, F.Scale);
1719 }
1720 
1721 /// Test whether we know how to expand the current formula.
1722 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1723  int64_t MaxOffset, LSRUse::KindType Kind,
1724  MemAccessTy AccessTy, GlobalValue *BaseGV,
1725  int64_t BaseOffset, bool HasBaseReg, int64_t Scale) {
1726  // We know how to expand completely foldable formulae.
1727  return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1728  BaseOffset, HasBaseReg, Scale) ||
1729  // Or formulae that use a base register produced by a sum of base
1730  // registers.
1731  (Scale == 1 &&
1732  isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1733  BaseGV, BaseOffset, true, 0));
1734 }
1735 
1736 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1737  int64_t MaxOffset, LSRUse::KindType Kind,
1738  MemAccessTy AccessTy, const Formula &F) {
1739  return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1740  F.BaseOffset, F.HasBaseReg, F.Scale);
1741 }
1742 
1744  const LSRUse &LU, const Formula &F) {
1745  // Target may want to look at the user instructions.
1746  if (LU.Kind == LSRUse::Address && TTI.LSRWithInstrQueries()) {
1747  for (const LSRFixup &Fixup : LU.Fixups)
1748  if (!isAMCompletelyFolded(TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
1749  (F.BaseOffset + Fixup.Offset), F.HasBaseReg,
1750  F.Scale, Fixup.UserInst))
1751  return false;
1752  return true;
1753  }
1754 
1755  return isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1756  LU.AccessTy, F.BaseGV, F.BaseOffset, F.HasBaseReg,
1757  F.Scale);
1758 }
1759 
1761  const LSRUse &LU, const Formula &F,
1762  const Loop &L) {
1763  if (!F.Scale)
1764  return 0;
1765 
1766  // If the use is not completely folded in that instruction, we will have to
1767  // pay an extra cost only for scale != 1.
1768  if (!isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1769  LU.AccessTy, F, L))
1770  return F.Scale != 1;
1771 
1772  switch (LU.Kind) {
1773  case LSRUse::Address: {
1774  // Check the scaling factor cost with both the min and max offsets.
1775  int ScaleCostMinOffset = TTI.getScalingFactorCost(
1776  LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MinOffset, F.HasBaseReg,
1777  F.Scale, LU.AccessTy.AddrSpace);
1778  int ScaleCostMaxOffset = TTI.getScalingFactorCost(
1779  LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MaxOffset, F.HasBaseReg,
1780  F.Scale, LU.AccessTy.AddrSpace);
1781 
1782  assert(ScaleCostMinOffset >= 0 && ScaleCostMaxOffset >= 0 &&
1783  "Legal addressing mode has an illegal cost!");
1784  return std::max(ScaleCostMinOffset, ScaleCostMaxOffset);
1785  }
1786  case LSRUse::ICmpZero:
1787  case LSRUse::Basic:
1788  case LSRUse::Special:
1789  // The use is completely folded, i.e., everything is folded into the
1790  // instruction.
1791  return 0;
1792  }
1793 
1794  llvm_unreachable("Invalid LSRUse Kind!");
1795 }
1796 
1798  LSRUse::KindType Kind, MemAccessTy AccessTy,
1799  GlobalValue *BaseGV, int64_t BaseOffset,
1800  bool HasBaseReg) {
1801  // Fast-path: zero is always foldable.
1802  if (BaseOffset == 0 && !BaseGV) return true;
1803 
1804  // Conservatively, create an address with an immediate and a
1805  // base and a scale.
1806  int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1807 
1808  // Canonicalize a scale of 1 to a base register if the formula doesn't
1809  // already have a base register.
1810  if (!HasBaseReg && Scale == 1) {
1811  Scale = 0;
1812  HasBaseReg = true;
1813  }
1814 
1815  return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, BaseOffset,
1816  HasBaseReg, Scale);
1817 }
1818 
1820  ScalarEvolution &SE, int64_t MinOffset,
1821  int64_t MaxOffset, LSRUse::KindType Kind,
1822  MemAccessTy AccessTy, const SCEV *S,
1823  bool HasBaseReg) {
1824  // Fast-path: zero is always foldable.
1825  if (S->isZero()) return true;
1826 
1827  // Conservatively, create an address with an immediate and a
1828  // base and a scale.
1829  int64_t BaseOffset = ExtractImmediate(S, SE);
1830  GlobalValue *BaseGV = ExtractSymbol(S, SE);
1831 
1832  // If there's anything else involved, it's not foldable.
1833  if (!S->isZero()) return false;
1834 
1835  // Fast-path: zero is always foldable.
1836  if (BaseOffset == 0 && !BaseGV) return true;
1837 
1838  // Conservatively, create an address with an immediate and a
1839  // base and a scale.
1840  int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1841 
1842  return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1843  BaseOffset, HasBaseReg, Scale);
1844 }
1845 
1846 namespace {
1847 
1848 /// An individual increment in a Chain of IV increments. Relate an IV user to
1849 /// an expression that computes the IV it uses from the IV used by the previous
1850 /// link in the Chain.
1851 ///
1852 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1853 /// original IVOperand. The head of the chain's IVOperand is only valid during
1854 /// chain collection, before LSR replaces IV users. During chain generation,
1855 /// IncExpr can be used to find the new IVOperand that computes the same
1856 /// expression.
1857 struct IVInc {
1858  Instruction *UserInst;
1859  Value* IVOperand;
1860  const SCEV *IncExpr;
1861 
1862  IVInc(Instruction *U, Value *O, const SCEV *E)
1863  : UserInst(U), IVOperand(O), IncExpr(E) {}
1864 };
1865 
1866 // The list of IV increments in program order. We typically add the head of a
1867 // chain without finding subsequent links.
1868 struct IVChain {
1869  SmallVector<IVInc, 1> Incs;
1870  const SCEV *ExprBase = nullptr;
1871 
1872  IVChain() = default;
1873  IVChain(const IVInc &Head, const SCEV *Base)
1874  : Incs(1, Head), ExprBase(Base) {}
1875 
1876  using const_iterator = SmallVectorImpl<IVInc>::const_iterator;
1877 
1878  // Return the first increment in the chain.
1879  const_iterator begin() const {
1880  assert(!Incs.empty());
1881  return std::next(Incs.begin());
1882  }
1883  const_iterator end() const {
1884  return Incs.end();
1885  }
1886 
1887  // Returns true if this chain contains any increments.
1888  bool hasIncs() const { return Incs.size() >= 2; }
1889 
1890  // Add an IVInc to the end of this chain.
1891  void add(const IVInc &X) { Incs.push_back(X); }
1892 
1893  // Returns the last UserInst in the chain.
1894  Instruction *tailUserInst() const { return Incs.back().UserInst; }
1895 
1896  // Returns true if IncExpr can be profitably added to this chain.
1897  bool isProfitableIncrement(const SCEV *OperExpr,
1898  const SCEV *IncExpr,
1899  ScalarEvolution&);
1900 };
1901 
1902 /// Helper for CollectChains to track multiple IV increment uses. Distinguish
1903 /// between FarUsers that definitely cross IV increments and NearUsers that may
1904 /// be used between IV increments.
1905 struct ChainUsers {
1907  SmallPtrSet<Instruction*, 4> NearUsers;
1908 };
1909 
1910 /// This class holds state for the main loop strength reduction logic.
1911 class LSRInstance {
1912  IVUsers &IU;
1913  ScalarEvolution &SE;
1914  DominatorTree &DT;
1915  LoopInfo &LI;
1916  AssumptionCache &AC;
1917  TargetLibraryInfo &TLI;
1918  const TargetTransformInfo &TTI;
1919  Loop *const L;
1920  MemorySSAUpdater *MSSAU;
1922  bool Changed = false;
1923 
1924  /// This is the insert position that the current loop's induction variable
1925  /// increment should be placed. In simple loops, this is the latch block's
1926  /// terminator. But in more complicated cases, this is a position which will
1927  /// dominate all the in-loop post-increment users.
1928  Instruction *IVIncInsertPos = nullptr;
1929 
1930  /// Interesting factors between use strides.
1931  ///
1932  /// We explicitly use a SetVector which contains a SmallSet, instead of the
1933  /// default, a SmallDenseSet, because we need to use the full range of
1934  /// int64_ts, and there's currently no good way of doing that with
1935  /// SmallDenseSet.
1937 
1938  /// Interesting use types, to facilitate truncation reuse.
1940 
1941  /// The list of interesting uses.
1942  mutable SmallVector<LSRUse, 16> Uses;
1943 
1944  /// Track which uses use which register candidates.
1945  RegUseTracker RegUses;
1946 
1947  // Limit the number of chains to avoid quadratic behavior. We don't expect to
1948  // have more than a few IV increment chains in a loop. Missing a Chain falls
1949  // back to normal LSR behavior for those uses.
1950  static const unsigned MaxChains = 8;
1951 
1952  /// IV users can form a chain of IV increments.
1954 
1955  /// IV users that belong to profitable IVChains.
1957 
1958  void OptimizeShadowIV();
1959  bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1960  ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1961  void OptimizeLoopTermCond();
1962 
1963  void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1964  SmallVectorImpl<ChainUsers> &ChainUsersVec);
1965  void FinalizeChain(IVChain &Chain);
1966  void CollectChains();
1967  void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1968  SmallVectorImpl<WeakTrackingVH> &DeadInsts);
1969 
1970  void CollectInterestingTypesAndFactors();
1971  void CollectFixupsAndInitialFormulae();
1972 
1973  // Support for sharing of LSRUses between LSRFixups.
1975  UseMapTy UseMap;
1976 
1977  bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1978  LSRUse::KindType Kind, MemAccessTy AccessTy);
1979 
1980  std::pair<size_t, int64_t> getUse(const SCEV *&Expr, LSRUse::KindType Kind,
1981  MemAccessTy AccessTy);
1982 
1983  void DeleteUse(LSRUse &LU, size_t LUIdx);
1984 
1985  LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1986 
1987  void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1988  void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1989  void CountRegisters(const Formula &F, size_t LUIdx);
1990  bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1991 
1992  void CollectLoopInvariantFixupsAndFormulae();
1993 
1994  void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1995  unsigned Depth = 0);
1996 
1997  void GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
1998  const Formula &Base, unsigned Depth,
1999  size_t Idx, bool IsScaledReg = false);
2000  void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
2001  void GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
2002  const Formula &Base, size_t Idx,
2003  bool IsScaledReg = false);
2004  void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
2005  void GenerateConstantOffsetsImpl(LSRUse &LU, unsigned LUIdx,
2006  const Formula &Base,
2007  const SmallVectorImpl<int64_t> &Worklist,
2008  size_t Idx, bool IsScaledReg = false);
2009  void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
2010  void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
2011  void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
2012  void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
2013  void GenerateCrossUseConstantOffsets();
2014  void GenerateAllReuseFormulae();
2015 
2016  void FilterOutUndesirableDedicatedRegisters();
2017 
2018  size_t EstimateSearchSpaceComplexity() const;
2019  void NarrowSearchSpaceByDetectingSupersets();
2020  void NarrowSearchSpaceByCollapsingUnrolledCode();
2021  void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
2022  void NarrowSearchSpaceByFilterFormulaWithSameScaledReg();
2023  void NarrowSearchSpaceByFilterPostInc();
2024  void NarrowSearchSpaceByDeletingCostlyFormulas();
2025  void NarrowSearchSpaceByPickingWinnerRegs();
2026  void NarrowSearchSpaceUsingHeuristics();
2027 
2028  void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
2029  Cost &SolutionCost,
2031  const Cost &CurCost,
2032  const SmallPtrSet<const SCEV *, 16> &CurRegs,
2033  DenseSet<const SCEV *> &VisitedRegs) const;
2034  void Solve(SmallVectorImpl<const Formula *> &Solution) const;
2035 
2037  HoistInsertPosition(BasicBlock::iterator IP,
2038  const SmallVectorImpl<Instruction *> &Inputs) const;
2040  AdjustInsertPositionForExpand(BasicBlock::iterator IP,
2041  const LSRFixup &LF,
2042  const LSRUse &LU,
2043  SCEVExpander &Rewriter) const;
2044 
2045  Value *Expand(const LSRUse &LU, const LSRFixup &LF, const Formula &F,
2047  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2048  void RewriteForPHI(PHINode *PN, const LSRUse &LU, const LSRFixup &LF,
2049  const Formula &F, SCEVExpander &Rewriter,
2050  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2051  void Rewrite(const LSRUse &LU, const LSRFixup &LF, const Formula &F,
2053  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2054  void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution);
2055 
2056 public:
2057  LSRInstance(Loop *L, IVUsers &IU, ScalarEvolution &SE, DominatorTree &DT,
2059  TargetLibraryInfo &TLI, MemorySSAUpdater *MSSAU);
2060 
2061  bool getChanged() const { return Changed; }
2062 
2063  void print_factors_and_types(raw_ostream &OS) const;
2064  void print_fixups(raw_ostream &OS) const;
2065  void print_uses(raw_ostream &OS) const;
2066  void print(raw_ostream &OS) const;
2067  void dump() const;
2068 };
2069 
2070 } // end anonymous namespace
2071 
2072 /// If IV is used in a int-to-float cast inside the loop then try to eliminate
2073 /// the cast operation.
2074 void LSRInstance::OptimizeShadowIV() {
2075  const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2076  if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2077  return;
2078 
2079  for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
2080  UI != E; /* empty */) {
2081  IVUsers::const_iterator CandidateUI = UI;
2082  ++UI;
2083  Instruction *ShadowUse = CandidateUI->getUser();
2084  Type *DestTy = nullptr;
2085  bool IsSigned = false;
2086 
2087  /* If shadow use is a int->float cast then insert a second IV
2088  to eliminate this cast.
2089 
2090  for (unsigned i = 0; i < n; ++i)
2091  foo((double)i);
2092 
2093  is transformed into
2094 
2095  double d = 0.0;
2096  for (unsigned i = 0; i < n; ++i, ++d)
2097  foo(d);
2098  */
2099  if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
2100  IsSigned = false;
2101  DestTy = UCast->getDestTy();
2102  }
2103  else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
2104  IsSigned = true;
2105  DestTy = SCast->getDestTy();
2106  }
2107  if (!DestTy) continue;
2108 
2109  // If target does not support DestTy natively then do not apply
2110  // this transformation.
2111  if (!TTI.isTypeLegal(DestTy)) continue;
2112 
2113  PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
2114  if (!PH) continue;
2115  if (PH->getNumIncomingValues() != 2) continue;
2116 
2117  // If the calculation in integers overflows, the result in FP type will
2118  // differ. So we only can do this transformation if we are guaranteed to not
2119  // deal with overflowing values
2120  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(SE.getSCEV(PH));
2121  if (!AR) continue;
2122  if (IsSigned && !AR->hasNoSignedWrap()) continue;
2123  if (!IsSigned && !AR->hasNoUnsignedWrap()) continue;
2124 
2125  Type *SrcTy = PH->getType();
2126  int Mantissa = DestTy->getFPMantissaWidth();
2127  if (Mantissa == -1) continue;
2128  if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
2129  continue;
2130 
2131  unsigned Entry, Latch;
2132  if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
2133  Entry = 0;
2134  Latch = 1;
2135  } else {
2136  Entry = 1;
2137  Latch = 0;
2138  }
2139 
2140  ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry));
2141  if (!Init) continue;
2142  Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
2143  (double)Init->getSExtValue() :
2144  (double)Init->getZExtValue());
2145 
2146  BinaryOperator *Incr =
2147  dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch));
2148  if (!Incr) continue;
2149  if (Incr->getOpcode() != Instruction::Add
2150  && Incr->getOpcode() != Instruction::Sub)
2151  continue;
2152 
2153  /* Initialize new IV, double d = 0.0 in above example. */
2154  ConstantInt *C = nullptr;
2155  if (Incr->getOperand(0) == PH)
2156  C = dyn_cast<ConstantInt>(Incr->getOperand(1));
2157  else if (Incr->getOperand(1) == PH)
2158  C = dyn_cast<ConstantInt>(Incr->getOperand(0));
2159  else
2160  continue;
2161 
2162  if (!C) continue;
2163 
2164  // Ignore negative constants, as the code below doesn't handle them
2165  // correctly. TODO: Remove this restriction.
2166  if (!C->getValue().isStrictlyPositive()) continue;
2167 
2168  /* Add new PHINode. */
2169  PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
2170 
2171  /* create new increment. '++d' in above example. */
2172  Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
2173  BinaryOperator *NewIncr =
2175  Instruction::FAdd : Instruction::FSub,
2176  NewPH, CFP, "IV.S.next.", Incr);
2177 
2178  NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
2179  NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
2180 
2181  /* Remove cast operation */
2182  ShadowUse->replaceAllUsesWith(NewPH);
2183  ShadowUse->eraseFromParent();
2184  Changed = true;
2185  break;
2186  }
2187 }
2188 
2189 /// If Cond has an operand that is an expression of an IV, set the IV user and
2190 /// stride information and return true, otherwise return false.
2191 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
2192  for (IVStrideUse &U : IU)
2193  if (U.getUser() == Cond) {
2194  // NOTE: we could handle setcc instructions with multiple uses here, but
2195  // InstCombine does it as well for simple uses, it's not clear that it
2196  // occurs enough in real life to handle.
2197  CondUse = &U;
2198  return true;
2199  }
2200  return false;
2201 }
2202 
2203 /// Rewrite the loop's terminating condition if it uses a max computation.
2204 ///
2205 /// This is a narrow solution to a specific, but acute, problem. For loops
2206 /// like this:
2207 ///
2208 /// i = 0;
2209 /// do {
2210 /// p[i] = 0.0;
2211 /// } while (++i < n);
2212 ///
2213 /// the trip count isn't just 'n', because 'n' might not be positive. And
2214 /// unfortunately this can come up even for loops where the user didn't use
2215 /// a C do-while loop. For example, seemingly well-behaved top-test loops
2216 /// will commonly be lowered like this:
2217 ///
2218 /// if (n > 0) {
2219 /// i = 0;
2220 /// do {
2221 /// p[i] = 0.0;
2222 /// } while (++i < n);
2223 /// }
2224 ///
2225 /// and then it's possible for subsequent optimization to obscure the if
2226 /// test in such a way that indvars can't find it.
2227 ///
2228 /// When indvars can't find the if test in loops like this, it creates a
2229 /// max expression, which allows it to give the loop a canonical
2230 /// induction variable:
2231 ///
2232 /// i = 0;
2233 /// max = n < 1 ? 1 : n;
2234 /// do {
2235 /// p[i] = 0.0;
2236 /// } while (++i != max);
2237 ///
2238 /// Canonical induction variables are necessary because the loop passes
2239 /// are designed around them. The most obvious example of this is the
2240 /// LoopInfo analysis, which doesn't remember trip count values. It
2241 /// expects to be able to rediscover the trip count each time it is
2242 /// needed, and it does this using a simple analysis that only succeeds if
2243 /// the loop has a canonical induction variable.
2244 ///
2245 /// However, when it comes time to generate code, the maximum operation
2246 /// can be quite costly, especially if it's inside of an outer loop.
2247 ///
2248 /// This function solves this problem by detecting this type of loop and
2249 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
2250 /// the instructions for the maximum computation.
2251 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
2252  // Check that the loop matches the pattern we're looking for.
2253  if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
2254  Cond->getPredicate() != CmpInst::ICMP_NE)
2255  return Cond;
2256 
2257  SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
2258  if (!Sel || !Sel->hasOneUse()) return Cond;
2259 
2260  const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2261  if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2262  return Cond;
2263  const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
2264 
2265  // Add one to the backedge-taken count to get the trip count.
2266  const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
2267  if (IterationCount != SE.getSCEV(Sel)) return Cond;
2268 
2269  // Check for a max calculation that matches the pattern. There's no check
2270  // for ICMP_ULE here because the comparison would be with zero, which
2271  // isn't interesting.
2273  const SCEVNAryExpr *Max = nullptr;
2274  if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
2275  Pred = ICmpInst::ICMP_SLE;
2276  Max = S;
2277  } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
2278  Pred = ICmpInst::ICMP_SLT;
2279  Max = S;
2280  } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
2281  Pred = ICmpInst::ICMP_ULT;
2282  Max = U;
2283  } else {
2284  // No match; bail.
2285  return Cond;
2286  }
2287 
2288  // To handle a max with more than two operands, this optimization would
2289  // require additional checking and setup.
2290  if (Max->getNumOperands() != 2)
2291  return Cond;
2292 
2293  const SCEV *MaxLHS = Max->getOperand(0);
2294  const SCEV *MaxRHS = Max->getOperand(1);
2295 
2296  // ScalarEvolution canonicalizes constants to the left. For < and >, look
2297  // for a comparison with 1. For <= and >=, a comparison with zero.
2298  if (!MaxLHS ||
2299  (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
2300  return Cond;
2301 
2302  // Check the relevant induction variable for conformance to
2303  // the pattern.
2304  const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
2305  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
2306  if (!AR || !AR->isAffine() ||
2307  AR->getStart() != One ||
2308  AR->getStepRecurrence(SE) != One)
2309  return Cond;
2310 
2311  assert(AR->getLoop() == L &&
2312  "Loop condition operand is an addrec in a different loop!");
2313 
2314  // Check the right operand of the select, and remember it, as it will
2315  // be used in the new comparison instruction.
2316  Value *NewRHS = nullptr;
2317  if (ICmpInst::isTrueWhenEqual(Pred)) {
2318  // Look for n+1, and grab n.
2319  if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
2320  if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2321  if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2322  NewRHS = BO->getOperand(0);
2323  if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
2324  if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2325  if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2326  NewRHS = BO->getOperand(0);
2327  if (!NewRHS)
2328  return Cond;
2329  } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
2330  NewRHS = Sel->getOperand(1);
2331  else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
2332  NewRHS = Sel->getOperand(2);
2333  else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
2334  NewRHS = SU->getValue();
2335  else
2336  // Max doesn't match expected pattern.
2337  return Cond;
2338 
2339  // Determine the new comparison opcode. It may be signed or unsigned,
2340  // and the original comparison may be either equality or inequality.
2341  if (Cond->getPredicate() == CmpInst::ICMP_EQ)
2342  Pred = CmpInst::getInversePredicate(Pred);
2343 
2344  // Ok, everything looks ok to change the condition into an SLT or SGE and
2345  // delete the max calculation.
2346  ICmpInst *NewCond =
2347  new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
2348 
2349  // Delete the max calculation instructions.
2350  Cond->replaceAllUsesWith(NewCond);
2351  CondUse->setUser(NewCond);
2352  Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
2353  Cond->eraseFromParent();
2354  Sel->eraseFromParent();
2355  if (Cmp->use_empty())
2356  Cmp->eraseFromParent();
2357  return NewCond;
2358 }
2359 
2360 /// Change loop terminating condition to use the postinc iv when possible.
2361 void
2362 LSRInstance::OptimizeLoopTermCond() {
2364 
2365  // We need a different set of heuristics for rotated and non-rotated loops.
2366  // If a loop is rotated then the latch is also the backedge, so inserting
2367  // post-inc expressions just before the latch is ideal. To reduce live ranges
2368  // it also makes sense to rewrite terminating conditions to use post-inc
2369  // expressions.
2370  //
2371  // If the loop is not rotated then the latch is not a backedge; the latch
2372  // check is done in the loop head. Adding post-inc expressions before the
2373  // latch will cause overlapping live-ranges of pre-inc and post-inc expressions
2374  // in the loop body. In this case we do *not* want to use post-inc expressions
2375  // in the latch check, and we want to insert post-inc expressions before
2376  // the backedge.
2377  BasicBlock *LatchBlock = L->getLoopLatch();
2378  SmallVector<BasicBlock*, 8> ExitingBlocks;
2379  L->getExitingBlocks(ExitingBlocks);
2380  if (llvm::all_of(ExitingBlocks, [&LatchBlock](const BasicBlock *BB) {
2381  return LatchBlock != BB;
2382  })) {
2383  // The backedge doesn't exit the loop; treat this as a head-tested loop.
2384  IVIncInsertPos = LatchBlock->getTerminator();
2385  return;
2386  }
2387 
2388  // Otherwise treat this as a rotated loop.
2389  for (BasicBlock *ExitingBlock : ExitingBlocks) {
2390  // Get the terminating condition for the loop if possible. If we
2391  // can, we want to change it to use a post-incremented version of its
2392  // induction variable, to allow coalescing the live ranges for the IV into
2393  // one register value.
2394 
2395  BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
2396  if (!TermBr)
2397  continue;
2398  // FIXME: Overly conservative, termination condition could be an 'or' etc..
2399  if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2400  continue;
2401 
2402  // Search IVUsesByStride to find Cond's IVUse if there is one.
2403  IVStrideUse *CondUse = nullptr;
2404  ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2405  if (!FindIVUserForCond(Cond, CondUse))
2406  continue;
2407 
2408  // If the trip count is computed in terms of a max (due to ScalarEvolution
2409  // being unable to find a sufficient guard, for example), change the loop
2410  // comparison to use SLT or ULT instead of NE.
2411  // One consequence of doing this now is that it disrupts the count-down
2412  // optimization. That's not always a bad thing though, because in such
2413  // cases it may still be worthwhile to avoid a max.
2414  Cond = OptimizeMax(Cond, CondUse);
2415 
2416  // If this exiting block dominates the latch block, it may also use
2417  // the post-inc value if it won't be shared with other uses.
2418  // Check for dominance.
2419  if (!DT.dominates(ExitingBlock, LatchBlock))
2420  continue;
2421 
2422  // Conservatively avoid trying to use the post-inc value in non-latch
2423  // exits if there may be pre-inc users in intervening blocks.
2424  if (LatchBlock != ExitingBlock)
2425  for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2426  // Test if the use is reachable from the exiting block. This dominator
2427  // query is a conservative approximation of reachability.
2428  if (&*UI != CondUse &&
2429  !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2430  // Conservatively assume there may be reuse if the quotient of their
2431  // strides could be a legal scale.
2432  const SCEV *A = IU.getStride(*CondUse, L);
2433  const SCEV *B = IU.getStride(*UI, L);
2434  if (!A || !B) continue;
2435  if (SE.getTypeSizeInBits(A->getType()) !=
2436  SE.getTypeSizeInBits(B->getType())) {
2437  if (SE.getTypeSizeInBits(A->getType()) >
2438  SE.getTypeSizeInBits(B->getType()))
2439  B = SE.getSignExtendExpr(B, A->getType());
2440  else
2441  A = SE.getSignExtendExpr(A, B->getType());
2442  }
2443  if (const SCEVConstant *D =
2444  dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2445  const ConstantInt *C = D->getValue();
2446  // Stride of one or negative one can have reuse with non-addresses.
2447  if (C->isOne() || C->isMinusOne())
2448  goto decline_post_inc;
2449  // Avoid weird situations.
2450  if (C->getValue().getMinSignedBits() >= 64 ||
2451  C->getValue().isMinSignedValue())
2452  goto decline_post_inc;
2453  // Check for possible scaled-address reuse.
2454  if (isAddressUse(TTI, UI->getUser(), UI->getOperandValToReplace())) {
2455  MemAccessTy AccessTy = getAccessType(
2456  TTI, UI->getUser(), UI->getOperandValToReplace());
2457  int64_t Scale = C->getSExtValue();
2458  if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2459  /*BaseOffset=*/0,
2460  /*HasBaseReg=*/false, Scale,
2461  AccessTy.AddrSpace))
2462  goto decline_post_inc;
2463  Scale = -Scale;
2464  if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2465  /*BaseOffset=*/0,
2466  /*HasBaseReg=*/false, Scale,
2467  AccessTy.AddrSpace))
2468  goto decline_post_inc;
2469  }
2470  }
2471  }
2472 
2473  LLVM_DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2474  << *Cond << '\n');
2475 
2476  // It's possible for the setcc instruction to be anywhere in the loop, and
2477  // possible for it to have multiple users. If it is not immediately before
2478  // the exiting block branch, move it.
2479  if (&*++BasicBlock::iterator(Cond) != TermBr) {
2480  if (Cond->hasOneUse()) {
2481  Cond->moveBefore(TermBr);
2482  } else {
2483  // Clone the terminating condition and insert into the loopend.
2484  ICmpInst *OldCond = Cond;
2485  Cond = cast<ICmpInst>(Cond->clone());
2486  Cond->setName(L->getHeader()->getName() + ".termcond");
2487  ExitingBlock->getInstList().insert(TermBr->getIterator(), Cond);
2488 
2489  // Clone the IVUse, as the old use still exists!
2490  CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2491  TermBr->replaceUsesOfWith(OldCond, Cond);
2492  }
2493  }
2494 
2495  // If we get to here, we know that we can transform the setcc instruction to
2496  // use the post-incremented version of the IV, allowing us to coalesce the
2497  // live ranges for the IV correctly.
2498  CondUse->transformToPostInc(L);
2499  Changed = true;
2500 
2501  PostIncs.insert(Cond);
2502  decline_post_inc:;
2503  }
2504 
2505  // Determine an insertion point for the loop induction variable increment. It
2506  // must dominate all the post-inc comparisons we just set up, and it must
2507  // dominate the loop latch edge.
2508  IVIncInsertPos = L->getLoopLatch()->getTerminator();
2509  for (Instruction *Inst : PostIncs) {
2510  BasicBlock *BB =
2511  DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2512  Inst->getParent());
2513  if (BB == Inst->getParent())
2514  IVIncInsertPos = Inst;
2515  else if (BB != IVIncInsertPos->getParent())
2516  IVIncInsertPos = BB->getTerminator();
2517  }
2518 }
2519 
2520 /// Determine if the given use can accommodate a fixup at the given offset and
2521 /// other details. If so, update the use and return true.
2522 bool LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset,
2523  bool HasBaseReg, LSRUse::KindType Kind,
2524  MemAccessTy AccessTy) {
2525  int64_t NewMinOffset = LU.MinOffset;
2526  int64_t NewMaxOffset = LU.MaxOffset;
2527  MemAccessTy NewAccessTy = AccessTy;
2528 
2529  // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2530  // something conservative, however this can pessimize in the case that one of
2531  // the uses will have all its uses outside the loop, for example.
2532  if (LU.Kind != Kind)
2533  return false;
2534 
2535  // Check for a mismatched access type, and fall back conservatively as needed.
2536  // TODO: Be less conservative when the type is similar and can use the same
2537  // addressing modes.
2538  if (Kind == LSRUse::Address) {
2539  if (AccessTy.MemTy != LU.AccessTy.MemTy) {
2540  NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext(),
2541  AccessTy.AddrSpace);
2542  }
2543  }
2544 
2545  // Conservatively assume HasBaseReg is true for now.
2546  if (NewOffset < LU.MinOffset) {
2547  if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2548  LU.MaxOffset - NewOffset, HasBaseReg))
2549  return false;
2550  NewMinOffset = NewOffset;
2551  } else if (NewOffset > LU.MaxOffset) {
2552  if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2553  NewOffset - LU.MinOffset, HasBaseReg))
2554  return false;
2555  NewMaxOffset = NewOffset;
2556  }
2557 
2558  // Update the use.
2559  LU.MinOffset = NewMinOffset;
2560  LU.MaxOffset = NewMaxOffset;
2561  LU.AccessTy = NewAccessTy;
2562  return true;
2563 }
2564 
2565 /// Return an LSRUse index and an offset value for a fixup which needs the given
2566 /// expression, with the given kind and optional access type. Either reuse an
2567 /// existing use or create a new one, as needed.
2568 std::pair<size_t, int64_t> LSRInstance::getUse(const SCEV *&Expr,
2569  LSRUse::KindType Kind,
2570  MemAccessTy AccessTy) {
2571  const SCEV *Copy = Expr;
2572  int64_t Offset = ExtractImmediate(Expr, SE);
2573 
2574  // Basic uses can't accept any offset, for example.
2575  if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ nullptr,
2576  Offset, /*HasBaseReg=*/ true)) {
2577  Expr = Copy;
2578  Offset = 0;
2579  }
2580 
2581  std::pair<UseMapTy::iterator, bool> P =
2582  UseMap.insert(std::make_pair(LSRUse::SCEVUseKindPair(Expr, Kind), 0));
2583  if (!P.second) {
2584  // A use already existed with this base.
2585  size_t LUIdx = P.first->second;
2586  LSRUse &LU = Uses[LUIdx];
2587  if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2588  // Reuse this use.
2589  return std::make_pair(LUIdx, Offset);
2590  }
2591 
2592  // Create a new use.
2593  size_t LUIdx = Uses.size();
2594  P.first->second = LUIdx;
2595  Uses.push_back(LSRUse(Kind, AccessTy));
2596  LSRUse &LU = Uses[LUIdx];
2597 
2598  LU.MinOffset = Offset;
2599  LU.MaxOffset = Offset;
2600  return std::make_pair(LUIdx, Offset);
2601 }
2602 
2603 /// Delete the given use from the Uses list.
2604 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2605  if (&LU != &Uses.back())
2606  std::swap(LU, Uses.back());
2607  Uses.pop_back();
2608 
2609  // Update RegUses.
2610  RegUses.swapAndDropUse(LUIdx, Uses.size());
2611 }
2612 
2613 /// Look for a use distinct from OrigLU which is has a formula that has the same
2614 /// registers as the given formula.
2615 LSRUse *
2616 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2617  const LSRUse &OrigLU) {
2618  // Search all uses for the formula. This could be more clever.
2619  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2620  LSRUse &LU = Uses[LUIdx];
2621  // Check whether this use is close enough to OrigLU, to see whether it's
2622  // worthwhile looking through its formulae.
2623  // Ignore ICmpZero uses because they may contain formulae generated by
2624  // GenerateICmpZeroScales, in which case adding fixup offsets may
2625  // be invalid.
2626  if (&LU != &OrigLU &&
2627  LU.Kind != LSRUse::ICmpZero &&
2628  LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2629  LU.WidestFixupType == OrigLU.WidestFixupType &&
2630  LU.HasFormulaWithSameRegs(OrigF)) {
2631  // Scan through this use's formulae.
2632  for (const Formula &F : LU.Formulae) {
2633  // Check to see if this formula has the same registers and symbols
2634  // as OrigF.
2635  if (F.BaseRegs == OrigF.BaseRegs &&
2636  F.ScaledReg == OrigF.ScaledReg &&
2637  F.BaseGV == OrigF.BaseGV &&
2638  F.Scale == OrigF.Scale &&
2639  F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2640  if (F.BaseOffset == 0)
2641  return &LU;
2642  // This is the formula where all the registers and symbols matched;
2643  // there aren't going to be any others. Since we declined it, we
2644  // can skip the rest of the formulae and proceed to the next LSRUse.
2645  break;
2646  }
2647  }
2648  }
2649  }
2650 
2651  // Nothing looked good.
2652  return nullptr;
2653 }
2654 
2655 void LSRInstance::CollectInterestingTypesAndFactors() {
2657 
2658  // Collect interesting types and strides.
2660  for (const IVStrideUse &U : IU) {
2661  const SCEV *Expr = IU.getExpr(U);
2662 
2663  // Collect interesting types.
2664  Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2665 
2666  // Add strides for mentioned loops.
2667  Worklist.push_back(Expr);
2668  do {
2669  const SCEV *S = Worklist.pop_back_val();
2670  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2671  if (AR->getLoop() == L)
2672  Strides.insert(AR->getStepRecurrence(SE));
2673  Worklist.push_back(AR->getStart());
2674  } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2675  Worklist.append(Add->op_begin(), Add->op_end());
2676  }
2677  } while (!Worklist.empty());
2678  }
2679 
2680  // Compute interesting factors from the set of interesting strides.
2682  I = Strides.begin(), E = Strides.end(); I != E; ++I)
2684  std::next(I); NewStrideIter != E; ++NewStrideIter) {
2685  const SCEV *OldStride = *I;
2686  const SCEV *NewStride = *NewStrideIter;
2687 
2688  if (SE.getTypeSizeInBits(OldStride->getType()) !=
2689  SE.getTypeSizeInBits(NewStride->getType())) {
2690  if (SE.getTypeSizeInBits(OldStride->getType()) >
2691  SE.getTypeSizeInBits(NewStride->getType()))
2692  NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2693  else
2694  OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2695  }
2696  if (const SCEVConstant *Factor =
2697  dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2698  SE, true))) {
2699  if (Factor->getAPInt().getMinSignedBits() <= 64)
2700  Factors.insert(Factor->getAPInt().getSExtValue());
2701  } else if (const SCEVConstant *Factor =
2702  dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2703  NewStride,
2704  SE, true))) {
2705  if (Factor->getAPInt().getMinSignedBits() <= 64)
2706  Factors.insert(Factor->getAPInt().getSExtValue());
2707  }
2708  }
2709 
2710  // If all uses use the same type, don't bother looking for truncation-based
2711  // reuse.
2712  if (Types.size() == 1)
2713  Types.clear();
2714 
2715  LLVM_DEBUG(print_factors_and_types(dbgs()));
2716 }
2717 
2718 /// Helper for CollectChains that finds an IV operand (computed by an AddRec in
2719 /// this loop) within [OI,OE) or returns OE. If IVUsers mapped Instructions to
2720 /// IVStrideUses, we could partially skip this.
2721 static User::op_iterator
2723  Loop *L, ScalarEvolution &SE) {
2724  for(; OI != OE; ++OI) {
2725  if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2726  if (!SE.isSCEVable(Oper->getType()))
2727  continue;
2728 
2729  if (const SCEVAddRecExpr *AR =
2730  dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2731  if (AR->getLoop() == L)
2732  break;
2733  }
2734  }
2735  }
2736  return OI;
2737 }
2738 
2739 /// IVChain logic must consistently peek base TruncInst operands, so wrap it in
2740 /// a convenient helper.
2741 static Value *getWideOperand(Value *Oper) {
2742  if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2743  return Trunc->getOperand(0);
2744  return Oper;
2745 }
2746 
2747 /// Return true if we allow an IV chain to include both types.
2748 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2749  Type *LType = LVal->getType();
2750  Type *RType = RVal->getType();
2751  return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy() &&
2752  // Different address spaces means (possibly)
2753  // different types of the pointer implementation,
2754  // e.g. i16 vs i32 so disallow that.
2755  (LType->getPointerAddressSpace() ==
2756  RType->getPointerAddressSpace()));
2757 }
2758 
2759 /// Return an approximation of this SCEV expression's "base", or NULL for any
2760 /// constant. Returning the expression itself is conservative. Returning a
2761 /// deeper subexpression is more precise and valid as long as it isn't less
2762 /// complex than another subexpression. For expressions involving multiple
2763 /// unscaled values, we need to return the pointer-type SCEVUnknown. This avoids
2764 /// forming chains across objects, such as: PrevOper==a[i], IVOper==b[i],
2765 /// IVInc==b-a.
2766 ///
2767 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2768 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2769 static const SCEV *getExprBase(const SCEV *S) {
2770  switch (S->getSCEVType()) {
2771  default: // uncluding scUnknown.
2772  return S;
2773  case scConstant:
2774  return nullptr;
2775  case scTruncate:
2776  return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2777  case scZeroExtend:
2778  return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2779  case scSignExtend:
2780  return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2781  case scAddExpr: {
2782  // Skip over scaled operands (scMulExpr) to follow add operands as long as
2783  // there's nothing more complex.
2784  // FIXME: not sure if we want to recognize negation.
2785  const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2786  for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2787  E(Add->op_begin()); I != E; ++I) {
2788  const SCEV *SubExpr = *I;
2789  if (SubExpr->getSCEVType() == scAddExpr)
2790  return getExprBase(SubExpr);
2791 
2792  if (SubExpr->getSCEVType() != scMulExpr)
2793  return SubExpr;
2794  }
2795  return S; // all operands are scaled, be conservative.
2796  }
2797  case scAddRecExpr:
2798  return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2799  }
2800  llvm_unreachable("Unknown SCEV kind!");
2801 }
2802 
2803 /// Return true if the chain increment is profitable to expand into a loop
2804 /// invariant value, which may require its own register. A profitable chain
2805 /// increment will be an offset relative to the same base. We allow such offsets
2806 /// to potentially be used as chain increment as long as it's not obviously
2807 /// expensive to expand using real instructions.
2808 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2809  const SCEV *IncExpr,
2810  ScalarEvolution &SE) {
2811  // Aggressively form chains when -stress-ivchain.
2812  if (StressIVChain)
2813  return true;
2814 
2815  // Do not replace a constant offset from IV head with a nonconstant IV
2816  // increment.
2817  if (!isa<SCEVConstant>(IncExpr)) {
2818  const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2819  if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2820  return false;
2821  }
2822 
2823  SmallPtrSet<const SCEV*, 8> Processed;
2824  return !isHighCostExpansion(IncExpr, Processed, SE);
2825 }
2826 
2827 /// Return true if the number of registers needed for the chain is estimated to
2828 /// be less than the number required for the individual IV users. First prohibit
2829 /// any IV users that keep the IV live across increments (the Users set should
2830 /// be empty). Next count the number and type of increments in the chain.
2831 ///
2832 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2833 /// effectively use postinc addressing modes. Only consider it profitable it the
2834 /// increments can be computed in fewer registers when chained.
2835 ///
2836 /// TODO: Consider IVInc free if it's already used in another chains.
2837 static bool isProfitableChain(IVChain &Chain,
2839  ScalarEvolution &SE,
2840  const TargetTransformInfo &TTI) {
2841  if (StressIVChain)
2842  return true;
2843 
2844  if (!Chain.hasIncs())
2845  return false;
2846 
2847  if (!Users.empty()) {
2848  LLVM_DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2849  for (Instruction *Inst
2850  : Users) { dbgs() << " " << *Inst << "\n"; });
2851  return false;
2852  }
2853  assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2854 
2855  // The chain itself may require a register, so intialize cost to 1.
2856  int cost = 1;
2857 
2858  // A complete chain likely eliminates the need for keeping the original IV in
2859  // a register. LSR does not currently know how to form a complete chain unless
2860  // the header phi already exists.
2861  if (isa<PHINode>(Chain.tailUserInst())
2862  && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2863  --cost;
2864  }
2865  const SCEV *LastIncExpr = nullptr;
2866  unsigned NumConstIncrements = 0;
2867  unsigned NumVarIncrements = 0;
2868  unsigned NumReusedIncrements = 0;
2869 
2870  if (TTI.isProfitableLSRChainElement(Chain.Incs[0].UserInst))
2871  return true;
2872 
2873  for (const IVInc &Inc : Chain) {
2874  if (TTI.isProfitableLSRChainElement(Inc.UserInst))
2875  return true;
2876  if (Inc.IncExpr->isZero())
2877  continue;
2878 
2879  // Incrementing by zero or some constant is neutral. We assume constants can
2880  // be folded into an addressing mode or an add's immediate operand.
2881  if (isa<SCEVConstant>(Inc.IncExpr)) {
2882  ++NumConstIncrements;
2883  continue;
2884  }
2885 
2886  if (Inc.IncExpr == LastIncExpr)
2887  ++NumReusedIncrements;
2888  else
2889  ++NumVarIncrements;
2890 
2891  LastIncExpr = Inc.IncExpr;
2892  }
2893  // An IV chain with a single increment is handled by LSR's postinc
2894  // uses. However, a chain with multiple increments requires keeping the IV's
2895  // value live longer than it needs to be if chained.
2896  if (NumConstIncrements > 1)
2897  --cost;
2898 
2899  // Materializing increment expressions in the preheader that didn't exist in
2900  // the original code may cost a register. For example, sign-extended array
2901  // indices can produce ridiculous increments like this:
2902  // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2903  cost += NumVarIncrements;
2904 
2905  // Reusing variable increments likely saves a register to hold the multiple of
2906  // the stride.
2907  cost -= NumReusedIncrements;
2908 
2909  LLVM_DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2910  << "\n");
2911 
2912  return cost < 0;
2913 }
2914 
2915 /// Add this IV user to an existing chain or make it the head of a new chain.
2916 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2917  SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2918  // When IVs are used as types of varying widths, they are generally converted
2919  // to a wider type with some uses remaining narrow under a (free) trunc.
2920  Value *const NextIV = getWideOperand(IVOper);
2921  const SCEV *const OperExpr = SE.getSCEV(NextIV);
2922  const SCEV *const OperExprBase = getExprBase(OperExpr);
2923 
2924  // Visit all existing chains. Check if its IVOper can be computed as a
2925  // profitable loop invariant increment from the last link in the Chain.
2926  unsigned ChainIdx = 0, NChains = IVChainVec.size();
2927  const SCEV *LastIncExpr = nullptr;
2928  for (; ChainIdx < NChains; ++ChainIdx) {
2929  IVChain &Chain = IVChainVec[ChainIdx];
2930 
2931  // Prune the solution space aggressively by checking that both IV operands
2932  // are expressions that operate on the same unscaled SCEVUnknown. This
2933  // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2934  // first avoids creating extra SCEV expressions.
2935  if (!StressIVChain && Chain.ExprBase != OperExprBase)
2936  continue;
2937 
2938  Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2939  if (!isCompatibleIVType(PrevIV, NextIV))
2940  continue;
2941 
2942  // A phi node terminates a chain.
2943  if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2944  continue;
2945 
2946  // The increment must be loop-invariant so it can be kept in a register.
2947  const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2948  const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2949  if (!SE.isLoopInvariant(IncExpr, L))
2950  continue;
2951 
2952  if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2953  LastIncExpr = IncExpr;
2954  break;
2955  }
2956  }
2957  // If we haven't found a chain, create a new one, unless we hit the max. Don't
2958  // bother for phi nodes, because they must be last in the chain.
2959  if (ChainIdx == NChains) {
2960  if (isa<PHINode>(UserInst))
2961  return;
2962  if (NChains >= MaxChains && !StressIVChain) {
2963  LLVM_DEBUG(dbgs() << "IV Chain Limit\n");
2964  return;
2965  }
2966  LastIncExpr = OperExpr;
2967  // IVUsers may have skipped over sign/zero extensions. We don't currently
2968  // attempt to form chains involving extensions unless they can be hoisted
2969  // into this loop's AddRec.
2970  if (!isa<SCEVAddRecExpr>(LastIncExpr))
2971  return;
2972  ++NChains;
2973  IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2974  OperExprBase));
2975  ChainUsersVec.resize(NChains);
2976  LLVM_DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2977  << ") IV=" << *LastIncExpr << "\n");
2978  } else {
2979  LLVM_DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2980  << ") IV+" << *LastIncExpr << "\n");
2981  // Add this IV user to the end of the chain.
2982  IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2983  }
2984  IVChain &Chain = IVChainVec[ChainIdx];
2985 
2986  SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2987  // This chain's NearUsers become FarUsers.
2988  if (!LastIncExpr->isZero()) {
2989  ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2990  NearUsers.end());
2991  NearUsers.clear();
2992  }
2993 
2994  // All other uses of IVOperand become near uses of the chain.
2995  // We currently ignore intermediate values within SCEV expressions, assuming
2996  // they will eventually be used be the current chain, or can be computed
2997  // from one of the chain increments. To be more precise we could
2998  // transitively follow its user and only add leaf IV users to the set.
2999  for (User *U : IVOper->users()) {
3000  Instruction *OtherUse = dyn_cast<Instruction>(U);
3001  if (!OtherUse)
3002  continue;
3003  // Uses in the chain will no longer be uses if the chain is formed.
3004  // Include the head of the chain in this iteration (not Chain.begin()).
3005  IVChain::const_iterator IncIter = Chain.Incs.begin();
3006  IVChain::const_iterator IncEnd = Chain.Incs.end();
3007  for( ; IncIter != IncEnd; ++IncIter) {
3008  if (IncIter->UserInst == OtherUse)
3009  break;
3010  }
3011  if (IncIter != IncEnd)
3012  continue;
3013 
3014  if (SE.isSCEVable(OtherUse->getType())
3015  && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
3016  && IU.isIVUserOrOperand(OtherUse)) {
3017  continue;
3018  }
3019  NearUsers.insert(OtherUse);
3020  }
3021 
3022  // Since this user is part of the chain, it's no longer considered a use
3023  // of the chain.
3024  ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
3025 }
3026 
3027 /// Populate the vector of Chains.
3028 ///
3029 /// This decreases ILP at the architecture level. Targets with ample registers,
3030 /// multiple memory ports, and no register renaming probably don't want
3031 /// this. However, such targets should probably disable LSR altogether.
3032 ///
3033 /// The job of LSR is to make a reasonable choice of induction variables across
3034 /// the loop. Subsequent passes can easily "unchain" computation exposing more
3035 /// ILP *within the loop* if the target wants it.
3036 ///
3037 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
3038 /// will not reorder memory operations, it will recognize this as a chain, but
3039 /// will generate redundant IV increments. Ideally this would be corrected later
3040 /// by a smart scheduler:
3041 /// = A[i]
3042 /// = A[i+x]
3043 /// A[i] =
3044 /// A[i+x] =
3045 ///
3046 /// TODO: Walk the entire domtree within this loop, not just the path to the
3047 /// loop latch. This will discover chains on side paths, but requires
3048 /// maintaining multiple copies of the Chains state.
3049 void LSRInstance::CollectChains() {
3050  LLVM_DEBUG(dbgs() << "Collecting IV Chains.\n");
3051  SmallVector<ChainUsers, 8> ChainUsersVec;
3052 
3053  SmallVector<BasicBlock *,8> LatchPath;
3054  BasicBlock *LoopHeader = L->getHeader();
3055  for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
3056  Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
3057  LatchPath.push_back(Rung->getBlock());
3058  }
3059  LatchPath.push_back(LoopHeader);
3060 
3061  // Walk the instruction stream from the loop header to the loop latch.
3062  for (BasicBlock *BB : reverse(LatchPath)) {
3063  for (Instruction &I : *BB) {
3064  // Skip instructions that weren't seen by IVUsers analysis.
3065  if (isa<PHINode>(I) || !IU.isIVUserOrOperand(&I))
3066  continue;
3067 
3068  // Ignore users that are part of a SCEV expression. This way we only
3069  // consider leaf IV Users. This effectively rediscovers a portion of
3070  // IVUsers analysis but in program order this time.
3071  if (SE.isSCEVable(I.getType()) && !isa<SCEVUnknown>(SE.getSCEV(&I)))
3072  continue;
3073 
3074  // Remove this instruction from any NearUsers set it may be in.
3075  for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
3076  ChainIdx < NChains; ++ChainIdx) {
3077  ChainUsersVec[ChainIdx].NearUsers.erase(&I);
3078  }
3079  // Search for operands that can be chained.
3080  SmallPtrSet<Instruction*, 4> UniqueOperands;
3081  User::op_iterator IVOpEnd = I.op_end();
3082  User::op_iterator IVOpIter = findIVOperand(I.op_begin(), IVOpEnd, L, SE);
3083  while (IVOpIter != IVOpEnd) {
3084  Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
3085  if (UniqueOperands.insert(IVOpInst).second)
3086  ChainInstruction(&I, IVOpInst, ChainUsersVec);
3087  IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
3088  }
3089  } // Continue walking down the instructions.
3090  } // Continue walking down the domtree.
3091  // Visit phi backedges to determine if the chain can generate the IV postinc.
3092  for (PHINode &PN : L->getHeader()->phis()) {
3093  if (!SE.isSCEVable(PN.getType()))
3094  continue;
3095 
3096  Instruction *IncV =
3097  dyn_cast<Instruction>(PN.getIncomingValueForBlock(L->getLoopLatch()));
3098  if (IncV)
3099  ChainInstruction(&PN, IncV, ChainUsersVec);
3100  }
3101  // Remove any unprofitable chains.
3102  unsigned ChainIdx = 0;
3103  for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
3104  UsersIdx < NChains; ++UsersIdx) {
3105  if (!isProfitableChain(IVChainVec[UsersIdx],
3106  ChainUsersVec[UsersIdx].FarUsers, SE, TTI))
3107  continue;
3108  // Preserve the chain at UsesIdx.
3109  if (ChainIdx != UsersIdx)
3110  IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
3111  FinalizeChain(IVChainVec[ChainIdx]);
3112  ++ChainIdx;
3113  }
3114  IVChainVec.resize(ChainIdx);
3115 }
3116 
3117 void LSRInstance::FinalizeChain(IVChain &Chain) {
3118  assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
3119  LLVM_DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
3120 
3121  for (const IVInc &Inc : Chain) {
3122  LLVM_DEBUG(dbgs() << " Inc: " << *Inc.UserInst << "\n");
3123  auto UseI = find(Inc.UserInst->operands(), Inc.IVOperand);
3124  assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand");
3125  IVIncSet.insert(UseI);
3126  }
3127 }
3128 
3129 /// Return true if the IVInc can be folded into an addressing mode.
3130 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
3131  Value *Operand, const TargetTransformInfo &TTI) {
3132  const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
3133  if (!IncConst || !isAddressUse(TTI, UserInst, Operand))
3134  return false;
3135 
3136  if (IncConst->getAPInt().getMinSignedBits() > 64)
3137  return false;
3138 
3139  MemAccessTy AccessTy = getAccessType(TTI, UserInst, Operand);
3140  int64_t IncOffset = IncConst->getValue()->getSExtValue();
3141  if (!isAlwaysFoldable(TTI, LSRUse::Address, AccessTy, /*BaseGV=*/nullptr,
3142  IncOffset, /*HasBaseReg=*/false))
3143  return false;
3144 
3145  return true;
3146 }
3147 
3148 /// Generate an add or subtract for each IVInc in a chain to materialize the IV
3149 /// user's operand from the previous IV user's operand.
3150 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
3151  SmallVectorImpl<WeakTrackingVH> &DeadInsts) {
3152  // Find the new IVOperand for the head of the chain. It may have been replaced
3153  // by LSR.
3154  const IVInc &Head = Chain.Incs[0];
3155  User::op_iterator IVOpEnd = Head.UserInst->op_end();
3156  // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
3157  User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
3158  IVOpEnd, L, SE);
3159  Value *IVSrc = nullptr;
3160  while (IVOpIter != IVOpEnd) {
3161  IVSrc = getWideOperand(*IVOpIter);
3162 
3163  // If this operand computes the expression that the chain needs, we may use
3164  // it. (Check this after setting IVSrc which is used below.)
3165  //
3166  // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
3167  // narrow for the chain, so we can no longer use it. We do allow using a
3168  // wider phi, assuming the LSR checked for free truncation. In that case we
3169  // should already have a truncate on this operand such that
3170  // getSCEV(IVSrc) == IncExpr.
3171  if (SE.getSCEV(*IVOpIter) == Head.IncExpr
3172  || SE.getSCEV(IVSrc) == Head.IncExpr) {
3173  break;
3174  }
3175  IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
3176  }
3177  if (IVOpIter == IVOpEnd) {
3178  // Gracefully give up on this chain.
3179  LLVM_DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
3180  return;
3181  }
3182  assert(IVSrc && "Failed to find IV chain source");
3183 
3184  LLVM_DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
3185  Type *IVTy = IVSrc->getType();
3186  Type *IntTy = SE.getEffectiveSCEVType(IVTy);
3187  const SCEV *LeftOverExpr = nullptr;
3188  for (const IVInc &Inc : Chain) {
3189  Instruction *InsertPt = Inc.UserInst;
3190  if (isa<PHINode>(InsertPt))
3191  InsertPt = L->getLoopLatch()->getTerminator();
3192 
3193  // IVOper will replace the current IV User's operand. IVSrc is the IV
3194  // value currently held in a register.
3195  Value *IVOper = IVSrc;
3196  if (!Inc.IncExpr->isZero()) {
3197  // IncExpr was the result of subtraction of two narrow values, so must
3198  // be signed.
3199  const SCEV *IncExpr = SE.getNoopOrSignExtend(Inc.IncExpr, IntTy);
3200  LeftOverExpr = LeftOverExpr ?
3201  SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
3202  }
3203  if (LeftOverExpr && !LeftOverExpr->isZero()) {
3204  // Expand the IV increment.
3205  Rewriter.clearPostInc();
3206  Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
3207  const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
3208  SE.getUnknown(IncV));
3209  IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
3210 
3211  // If an IV increment can't be folded, use it as the next IV value.
3212  if (!canFoldIVIncExpr(LeftOverExpr, Inc.UserInst, Inc.IVOperand, TTI)) {
3213  assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
3214  IVSrc = IVOper;
3215  LeftOverExpr = nullptr;
3216  }
3217  }
3218  Type *OperTy = Inc.IVOperand->getType();
3219  if (IVTy != OperTy) {
3220  assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
3221  "cannot extend a chained IV");
3222  IRBuilder<> Builder(InsertPt);
3223  IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
3224  }
3225  Inc.UserInst->replaceUsesOfWith(Inc.IVOperand, IVOper);
3226  if (auto *OperandIsInstr = dyn_cast<Instruction>(Inc.IVOperand))
3227  DeadInsts.emplace_back(OperandIsInstr);
3228  }
3229  // If LSR created a new, wider phi, we may also replace its postinc. We only
3230  // do this if we also found a wide value for the head of the chain.
3231  if (isa<PHINode>(Chain.tailUserInst())) {
3232  for (PHINode &Phi : L->getHeader()->phis()) {
3233  if (!isCompatibleIVType(&Phi, IVSrc))
3234  continue;
3235  Instruction *PostIncV = dyn_cast<Instruction>(
3236  Phi.getIncomingValueForBlock(L->getLoopLatch()));
3237  if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
3238  continue;
3239  Value *IVOper = IVSrc;
3240  Type *PostIncTy = PostIncV->getType();
3241  if (IVTy != PostIncTy) {
3242  assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
3244  Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
3245  IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
3246  }
3247  Phi.replaceUsesOfWith(PostIncV, IVOper);
3248  DeadInsts.emplace_back(PostIncV);
3249  }
3250  }
3251 }
3252 
3253 void LSRInstance::CollectFixupsAndInitialFormulae() {
3254  BranchInst *ExitBranch = nullptr;
3255  bool SaveCmp = TTI.canSaveCmp(L, &ExitBranch, &SE, &LI, &DT, &AC, &TLI);
3256 
3257  for (const IVStrideUse &U : IU) {
3258  Instruction *UserInst = U.getUser();
3259  // Skip IV users that are part of profitable IV Chains.
3260  User::op_iterator UseI =
3261  find(UserInst->operands(), U.getOperandValToReplace());
3262  assert(UseI != UserInst->op_end() && "cannot find IV operand");
3263  if (IVIncSet.count(UseI)) {
3264  LLVM_DEBUG(dbgs() << "Use is in profitable chain: " << **UseI << '\n');
3265  continue;
3266  }
3267 
3268  LSRUse::KindType Kind = LSRUse::Basic;
3269  MemAccessTy AccessTy;
3270  if (isAddressUse(TTI, UserInst, U.getOperandValToReplace())) {
3271  Kind = LSRUse::Address;
3272  AccessTy = getAccessType(TTI, UserInst, U.getOperandValToReplace());
3273  }
3274 
3275  const SCEV *S = IU.getExpr(U);
3276  PostIncLoopSet TmpPostIncLoops = U.getPostIncLoops();
3277 
3278  // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
3279  // (N - i == 0), and this allows (N - i) to be the expression that we work
3280  // with rather than just N or i, so we can consider the register
3281  // requirements for both N and i at the same time. Limiting this code to
3282  // equality icmps is not a problem because all interesting loops use
3283  // equality icmps, thanks to IndVarSimplify.
3284  if (ICmpInst *CI = dyn_cast<ICmpInst>(UserInst)) {
3285  // If CI can be saved in some target, like replaced inside hardware loop
3286  // in PowerPC, no need to generate initial formulae for it.
3287  if (SaveCmp && CI == dyn_cast<ICmpInst>(ExitBranch->getCondition()))
3288  continue;
3289  if (CI->isEquality()) {
3290  // Swap the operands if needed to put the OperandValToReplace on the
3291  // left, for consistency.
3292  Value *NV = CI->getOperand(1);
3293  if (NV == U.getOperandValToReplace()) {
3294  CI->setOperand(1, CI->getOperand(0));
3295  CI->setOperand(0, NV);
3296  NV = CI->getOperand(1);
3297  Changed = true;
3298  }
3299 
3300  // x == y --> x - y == 0
3301  const SCEV *N = SE.getSCEV(NV);
3302  if (SE.isLoopInvariant(N, L) && isSafeToExpand(N, SE)) {
3303  // S is normalized, so normalize N before folding it into S
3304  // to keep the result normalized.
3305  N = normalizeForPostIncUse(N, TmpPostIncLoops, SE);
3306  Kind = LSRUse::ICmpZero;
3307  S = SE.getMinusSCEV(N, S);
3308  }
3309 
3310  // -1 and the negations of all interesting strides (except the negation
3311  // of -1) are now also interesting.
3312  for (size_t i = 0, e = Factors.size(); i != e; ++i)
3313  if (Factors[i] != -1)
3314  Factors.insert(-(uint64_t)Factors[i]);
3315  Factors.insert(-1);
3316  }
3317  }
3318 
3319  // Get or create an LSRUse.
3320  std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
3321  size_t LUIdx = P.first;
3322  int64_t Offset = P.second;
3323  LSRUse &LU = Uses[LUIdx];
3324 
3325  // Record the fixup.
3326  LSRFixup &LF = LU.getNewFixup();
3327  LF.UserInst = UserInst;
3328  LF.OperandValToReplace = U.getOperandValToReplace();
3329  LF.PostIncLoops = TmpPostIncLoops;
3330  LF.Offset = Offset;
3331  LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3332 
3333  if (!LU.WidestFixupType ||
3334  SE.getTypeSizeInBits(LU.WidestFixupType) <
3335  SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3336  LU.WidestFixupType = LF.OperandValToReplace->getType();
3337 
3338  // If this is the first use of this LSRUse, give it a formula.
3339  if (LU.Formulae.empty()) {
3340  InsertInitialFormula(S, LU, LUIdx);
3341  CountRegisters(LU.Formulae.back(), LUIdx);
3342  }
3343  }
3344 
3345  LLVM_DEBUG(print_fixups(dbgs()));
3346 }
3347 
3348 /// Insert a formula for the given expression into the given use, separating out
3349 /// loop-variant portions from loop-invariant and loop-computable portions.
3350 void
3351 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
3352  // Mark uses whose expressions cannot be expanded.
3353  if (!isSafeToExpand(S, SE))
3354  LU.RigidFormula = true;
3355 
3356  Formula F;
3357  F.initialMatch(S, L, SE);
3358  bool Inserted = InsertFormula(LU, LUIdx, F);
3359  assert(Inserted && "Initial formula already exists!"); (void)Inserted;
3360 }
3361 
3362 /// Insert a simple single-register formula for the given expression into the
3363 /// given use.
3364 void
3365 LSRInstance::InsertSupplementalFormula(const SCEV *S,
3366  LSRUse &LU, size_t LUIdx) {
3367  Formula F;
3368  F.BaseRegs.push_back(S);
3369  F.HasBaseReg = true;
3370  bool Inserted = InsertFormula(LU, LUIdx, F);
3371  assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
3372 }
3373 
3374 /// Note which registers are used by the given formula, updating RegUses.
3375 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
3376  if (F.ScaledReg)
3377  RegUses.countRegister(F.ScaledReg, LUIdx);
3378  for (const SCEV *BaseReg : F.BaseRegs)
3379  RegUses.countRegister(BaseReg, LUIdx);
3380 }
3381 
3382 /// If the given formula has not yet been inserted, add it to the list, and
3383 /// return true. Return false otherwise.
3384 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
3385  // Do not insert formula that we will not be able to expand.
3386  assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F) &&
3387  "Formula is illegal");
3388 
3389  if (!LU.InsertFormula(F, *L))
3390  return false;
3391 
3392  CountRegisters(F, LUIdx);
3393  return true;
3394 }
3395 
3396 /// Check for other uses of loop-invariant values which we're tracking. These
3397 /// other uses will pin these values in registers, making them less profitable
3398 /// for elimination.
3399 /// TODO: This currently misses non-constant addrec step registers.
3400 /// TODO: Should this give more weight to users inside the loop?
3401 void
3402 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
3403  SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3405 
3406  while (!Worklist.empty()) {
3407  const SCEV *S = Worklist.pop_back_val();
3408 
3409  // Don't process the same SCEV twice
3410  if (!Visited.insert(S).second)
3411  continue;
3412 
3413  if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
3414  Worklist.append(N->op_begin(), N->op_end());
3415  else if (const SCEVIntegralCastExpr *C = dyn_cast<SCEVIntegralCastExpr>(S))
3416  Worklist.push_back(C->getOperand());
3417  else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
3418  Worklist.push_back(D->getLHS());
3419  Worklist.push_back(D->getRHS());
3420  } else if (const SCEVUnknown *US = dyn_cast<SCEVUnknown>(S)) {
3421  const Value *V = US->getValue();
3422  if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3423  // Look for instructions defined outside the loop.
3424  if (L->contains(Inst)) continue;
3425  } else if (isa<UndefValue>(V))
3426  // Undef doesn't have a live range, so it doesn't matter.
3427  continue;
3428  for (const Use &U : V->uses()) {
3429  const Instruction *UserInst = dyn_cast<Instruction>(U.getUser());
3430  // Ignore non-instructions.
3431  if (!UserInst)
3432  continue;
3433  // Don't bother if the instruction is an EHPad.
3434  if (UserInst->isEHPad())
3435  continue;
3436  // Ignore instructions in other functions (as can happen with
3437  // Constants).
3438  if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3439  continue;
3440  // Ignore instructions not dominated by the loop.
3441  const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3442  UserInst->getParent() :
3443  cast<PHINode>(UserInst)->getIncomingBlock(
3444  PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3445  if (!DT.dominates(L->getHeader(), UseBB))
3446  continue;
3447  // Don't bother if the instruction is in a BB which ends in an EHPad.
3448  if (UseBB->getTerminator()->isEHPad())
3449  continue;
3450  // Don't bother rewriting PHIs in catchswitch blocks.
3451  if (isa<CatchSwitchInst>(UserInst->getParent()->getTerminator()))
3452  continue;
3453  // Ignore uses which are part of other SCEV expressions, to avoid
3454  // analyzing them multiple times.
3455  if (SE.isSCEVable(UserInst->getType())) {
3456  const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3457  // If the user is a no-op, look through to its uses.
3458  if (!isa<SCEVUnknown>(UserS))
3459  continue;
3460  if (UserS == US) {
3461  Worklist.push_back(
3462  SE.getUnknown(const_cast<Instruction *>(UserInst)));
3463  continue;
3464  }
3465  }
3466  // Ignore icmp instructions which are already being analyzed.
3467  if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3468  unsigned OtherIdx = !U.getOperandNo();
3469  Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3470  if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3471  continue;
3472  }
3473 
3474  std::pair<size_t, int64_t> P = getUse(
3475  S, LSRUse::Basic, MemAccessTy());
3476  size_t LUIdx = P.first;
3477  int64_t Offset = P.second;
3478  LSRUse &LU = Uses[LUIdx];
3479  LSRFixup &LF = LU.getNewFixup();
3480  LF.UserInst = const_cast<Instruction *>(UserInst);
3481  LF.OperandValToReplace = U;
3482  LF.Offset = Offset;
3483  LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3484  if (!LU.WidestFixupType ||
3485  SE.getTypeSizeInBits(LU.WidestFixupType) <
3486  SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3487  LU.WidestFixupType = LF.OperandValToReplace->getType();
3488  InsertSupplementalFormula(US, LU, LUIdx);
3489  CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3490  break;
3491  }
3492  }
3493  }
3494 }
3495 
3496 /// Split S into subexpressions which can be pulled out into separate
3497 /// registers. If C is non-null, multiply each subexpression by C.
3498 ///
3499 /// Return remainder expression after factoring the subexpressions captured by
3500 /// Ops. If Ops is complete, return NULL.
3501 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3503  const Loop *L,
3504  ScalarEvolution &SE,
3505  unsigned Depth = 0) {
3506  // Arbitrarily cap recursion to protect compile time.
3507  if (Depth >= 3)
3508  return S;
3509 
3510  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3511  // Break out add operands.
3512  for (const SCEV *S : Add->operands()) {
3513  const SCEV *Remainder = CollectSubexprs(S, C, Ops, L, SE, Depth+1);
3514  if (Remainder)
3515  Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3516  }
3517  return nullptr;
3518  } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3519  // Split a non-zero base out of an addrec.
3520  if (AR->getStart()->isZero() || !AR->isAffine())
3521  return S;
3522 
3523  const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3524  C, Ops, L, SE, Depth+1);
3525  // Split the non-zero AddRec unless it is part of a nested recurrence that
3526  // does not pertain to this loop.
3527  if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3528  Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3529  Remainder = nullptr;
3530  }
3531  if (Remainder != AR->getStart()) {
3532  if (!Remainder)
3533  Remainder = SE.getConstant(AR->getType(), 0);
3534  return SE.getAddRecExpr(Remainder,
3535  AR->getStepRecurrence(SE),
3536  AR->getLoop(),
3537  //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3539  }
3540  } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3541  // Break (C * (a + b + c)) into C*a + C*b + C*c.
3542  if (Mul->getNumOperands() != 2)
3543  return S;
3544  if (const SCEVConstant *Op0 =
3545  dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3546  C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3547  const SCEV *Remainder =
3548  CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3549  if (Remainder)
3550  Ops.push_back(SE.getMulExpr(C, Remainder));
3551  return nullptr;
3552  }
3553  }
3554  return S;
3555 }
3556 
3557 /// Return true if the SCEV represents a value that may end up as a
3558 /// post-increment operation.
3560  LSRUse &LU, const SCEV *S, const Loop *L,
3561  ScalarEvolution &SE) {
3562  if (LU.Kind != LSRUse::Address ||
3563  !LU.AccessTy.getType()->isIntOrIntVectorTy())
3564  return false;
3565  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S);
3566  if (!AR)
3567  return false;
3568  const SCEV *LoopStep = AR->getStepRecurrence(SE);
3569  if (!isa<SCEVConstant>(LoopStep))
3570  return false;
3571  // Check if a post-indexed load/store can be used.
3574  const SCEV *LoopStart = AR->getStart();
3575  if (!isa<SCEVConstant>(LoopStart) && SE.isLoopInvariant(LoopStart, L))
3576  return true;
3577  }
3578  return false;
3579 }
3580 
3581 /// Helper function for LSRInstance::GenerateReassociations.
3582 void LSRInstance::GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
3583  const Formula &Base,
3584  unsigned Depth, size_t Idx,
3585  bool IsScaledReg) {
3586  const SCEV *BaseReg = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3587  // Don't generate reassociations for the base register of a value that
3588  // may generate a post-increment operator. The reason is that the
3589  // reassociations cause extra base+register formula to be created,
3590  // and possibly chosen, but the post-increment is more efficient.
3591  if (AMK == TTI::AMK_PostIndexed && mayUsePostIncMode(TTI, LU, BaseReg, L, SE))
3592  return;
3594  const SCEV *Remainder = CollectSubexprs(BaseReg, nullptr, AddOps, L, SE);
3595  if (Remainder)
3596  AddOps.push_back(Remainder);
3597 
3598  if (AddOps.size() == 1)
3599  return;
3600 
3601  for (SmallVectorImpl<const SCEV *>::const_iterator J = AddOps.begin(),
3602  JE = AddOps.end();
3603  J != JE; ++J) {
3604  // Loop-variant "unknown" values are uninteresting; we won't be able to
3605  // do anything meaningful with them.
3606  if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3607  continue;
3608 
3609  // Don't pull a constant into a register if the constant could be folded
3610  // into an immediate field.
3611  if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3612  LU.AccessTy, *J, Base.getNumRegs() > 1))
3613  continue;
3614 
3615  // Collect all operands except *J.
3616  SmallVector<const SCEV *, 8> InnerAddOps(
3617  ((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3618  InnerAddOps.append(std::next(J),
3619  ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3620 
3621  // Don't leave just a constant behind in a register if the constant could
3622  // be folded into an immediate field.
3623  if (InnerAddOps.size() == 1 &&
3624  isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3625  LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3626  continue;
3627 
3628  const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3629  if (InnerSum->isZero())
3630  continue;
3631  Formula F = Base;
3632 
3633  // Add the remaining pieces of the add back into the new formula.
3634  const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3635  if (InnerSumSC && SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3636  TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3637  InnerSumSC->getValue()->getZExtValue())) {
3638  F.UnfoldedOffset =
3639  (uint64_t)F.UnfoldedOffset + InnerSumSC->getValue()->getZExtValue();
3640  if (IsScaledReg)
3641  F.ScaledReg = nullptr;
3642  else
3643  F.BaseRegs.erase(F.BaseRegs.begin() + Idx);
3644  } else if (IsScaledReg)
3645  F.ScaledReg = InnerSum;
3646  else
3647  F.BaseRegs[Idx] = InnerSum;
3648 
3649  // Add J as its own register, or an unfolded immediate.
3650  const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3651  if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3652  TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3653  SC->getValue()->getZExtValue()))
3654  F.UnfoldedOffset =
3655  (uint64_t)F.UnfoldedOffset + SC->getValue()->getZExtValue();
3656  else
3657  F.BaseRegs.push_back(*J);
3658  // We may have changed the number of register in base regs, adjust the
3659  // formula accordingly.
3660  F.canonicalize(*L);
3661 
3662  if (InsertFormula(LU, LUIdx, F))
3663  // If that formula hadn't been seen before, recurse to find more like
3664  // it.
3665  // Add check on Log16(AddOps.size()) - same as Log2_32(AddOps.size()) >> 2)
3666  // Because just Depth is not enough to bound compile time.
3667  // This means that every time AddOps.size() is greater 16^x we will add
3668  // x to Depth.
3669  GenerateReassociations(LU, LUIdx, LU.Formulae.back(),
3670  Depth + 1 + (Log2_32(AddOps.size()) >> 2));
3671  }
3672 }
3673 
3674 /// Split out subexpressions from adds and the bases of addrecs.
3675 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3676  Formula Base, unsigned Depth) {
3677  assert(Base.isCanonical(*L) && "Input must be in the canonical form");
3678  // Arbitrarily cap recursion to protect compile time.
3679  if (Depth >= 3)
3680  return;
3681 
3682  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3683  GenerateReassociationsImpl(LU, LUIdx, Base, Depth, i);
3684 
3685  if (Base.Scale == 1)
3686  GenerateReassociationsImpl(LU, LUIdx, Base, Depth,
3687  /* Idx */ -1, /* IsScaledReg */ true);
3688 }
3689 
3690 /// Generate a formula consisting of all of the loop-dominating registers added
3691 /// into a single register.
3692 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3693  Formula Base) {
3694  // This method is only interesting on a plurality of registers.
3695  if (Base.BaseRegs.size() + (Base.Scale == 1) +
3696  (Base.UnfoldedOffset != 0) <= 1)
3697  return;
3698 
3699  // Flatten the representation, i.e., reg1 + 1*reg2 => reg1 + reg2, before
3700  // processing the formula.
3701  Base.unscale();
3703  Formula NewBase = Base;
3704  NewBase.BaseRegs.clear();
3705  Type *CombinedIntegerType = nullptr;
3706  for (const SCEV *BaseReg : Base.BaseRegs) {
3707  if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3708  !SE.hasComputableLoopEvolution(BaseReg, L)) {
3709  if (!CombinedIntegerType)
3710  CombinedIntegerType = SE.getEffectiveSCEVType(BaseReg->getType());
3711  Ops.push_back(BaseReg);
3712  }
3713  else
3714  NewBase.BaseRegs.push_back(BaseReg);
3715  }
3716 
3717  // If no register is relevant, we're done.
3718  if (Ops.size() == 0)
3719  return;
3720 
3721  // Utility function for generating the required variants of the combined
3722  // registers.
3723  auto GenerateFormula = [&](const SCEV *Sum) {
3724  Formula F = NewBase;
3725 
3726  // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3727  // opportunity to fold something. For now, just ignore such cases
3728  // rather than proceed with zero in a register.
3729  if (Sum->isZero())
3730  return;
3731 
3732  F.BaseRegs.push_back(Sum);
3733  F.canonicalize(*L);
3734  (void)InsertFormula(LU, LUIdx, F);
3735  };
3736 
3737  // If we collected at least two registers, generate a formula combining them.
3738  if (Ops.size() > 1) {
3739  SmallVector<const SCEV *, 4> OpsCopy(Ops); // Don't let SE modify Ops.
3740  GenerateFormula(SE.getAddExpr(OpsCopy));
3741  }
3742 
3743  // If we have an unfolded offset, generate a formula combining it with the
3744  // registers collected.
3745  if (NewBase.UnfoldedOffset) {
3746  assert(CombinedIntegerType && "Missing a type for the unfolded offset");
3747  Ops.push_back(SE.getConstant(CombinedIntegerType, NewBase.UnfoldedOffset,
3748  true));
3749  NewBase.UnfoldedOffset = 0;
3750  GenerateFormula(SE.getAddExpr(Ops));
3751  }
3752 }
3753 
3754 /// Helper function for LSRInstance::GenerateSymbolicOffsets.
3755 void LSRInstance::GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
3756  const Formula &Base, size_t Idx,
3757  bool IsScaledReg) {
3758  const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3759  GlobalValue *GV = ExtractSymbol(G, SE);
3760  if (G->isZero() || !GV)
3761  return;
3762  Formula F = Base;
3763  F.BaseGV = GV;
3764  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3765  return;
3766  if (IsScaledReg)
3767  F.ScaledReg = G;
3768  else
3769  F.BaseRegs[Idx] = G;
3770  (void)InsertFormula(LU, LUIdx, F);
3771 }
3772 
3773 /// Generate reuse formulae using symbolic offsets.
3774 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3775  Formula Base) {
3776  // We can't add a symbolic offset if the address already contains one.
3777  if (Base.BaseGV) return;
3778 
3779  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3780  GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, i);
3781  if (Base.Scale == 1)
3782  GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, /* Idx */ -1,
3783  /* IsScaledReg */ true);
3784 }
3785 
3786 /// Helper function for LSRInstance::GenerateConstantOffsets.
3787 void LSRInstance::GenerateConstantOffsetsImpl(
3788  LSRUse &LU, unsigned LUIdx, const Formula &Base,
3789  const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
3790 
3791  auto GenerateOffset = [&](const SCEV *G, int64_t Offset) {
3792  Formula F = Base;
3793  F.BaseOffset = (uint64_t)Base.BaseOffset - Offset;
3794 
3795  if (isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F)) {
3796  // Add the offset to the base register.
3797  const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), Offset), G);
3798  // If it cancelled out, drop the base register, otherwise update it.
3799  if (NewG->isZero()) {
3800  if (IsScaledReg) {
3801  F.Scale = 0;
3802  F.ScaledReg = nullptr;
3803  } else
3804  F.deleteBaseReg(F.BaseRegs[Idx]);
3805  F.canonicalize(*L);
3806  } else if (IsScaledReg)
3807  F.ScaledReg = NewG;
3808  else
3809  F.BaseRegs[Idx] = NewG;
3810 
3811  (void)InsertFormula(LU, LUIdx, F);
3812  }
3813  };
3814 
3815  const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3816 
3817  // With constant offsets and constant steps, we can generate pre-inc
3818  // accesses by having the offset equal the step. So, for access #0 with a
3819  // step of 8, we generate a G - 8 base which would require the first access
3820  // to be ((G - 8) + 8),+,8. The pre-indexed access then updates the pointer
3821  // for itself and hopefully becomes the base for other accesses. This means
3822  // means that a single pre-indexed access can be generated to become the new
3823  // base pointer for each iteration of the loop, resulting in no extra add/sub
3824  // instructions for pointer updating.
3825  if (AMK == TTI::AMK_PreIndexed && LU.Kind == LSRUse::Address) {
3826  if (auto *GAR = dyn_cast<SCEVAddRecExpr>(G)) {
3827  if (auto *StepRec =
3828  dyn_cast<SCEVConstant>(GAR->getStepRecurrence(SE))) {
3829  const APInt &StepInt = StepRec->getAPInt();
3830  int64_t Step = StepInt.isNegative() ?
3831  StepInt.getSExtValue() : StepInt.getZExtValue();
3832 
3833  for (int64_t Offset : Worklist) {
3834  Offset -= Step;
3835  GenerateOffset(G, Offset);
3836  }
3837  }
3838  }
3839  }
3840  for (int64_t Offset : Worklist)
3841  GenerateOffset(G, Offset);
3842 
3843  int64_t Imm = ExtractImmediate(G, SE);
3844  if (G->isZero() || Imm == 0)
3845  return;
3846  Formula F = Base;
3847  F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3848  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3849  return;
3850  if (IsScaledReg) {
3851  F.ScaledReg = G;
3852  } else {
3853  F.BaseRegs[Idx] = G;
3854  // We may generate non canonical Formula if G is a recurrent expr reg
3855  // related with current loop while F.ScaledReg is not.
3856  F.canonicalize(*L);
3857  }
3858  (void)InsertFormula(LU, LUIdx, F);
3859 }
3860 
3861 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3862 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3863  Formula Base) {
3864  // TODO: For now, just add the min and max offset, because it usually isn't
3865  // worthwhile looking at everything inbetween.
3866  SmallVector<int64_t, 2> Worklist;
3867  Worklist.push_back(LU.MinOffset);
3868  if (LU.MaxOffset != LU.MinOffset)
3869  Worklist.push_back(LU.MaxOffset);
3870 
3871  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3872  GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, i);
3873  if (Base.Scale == 1)
3874  GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, /* Idx */ -1,
3875  /* IsScaledReg */ true);
3876 }
3877 
3878 /// For ICmpZero, check to see if we can scale up the comparison. For example, x
3879 /// == y -> x*c == y*c.
3880 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3881  Formula Base) {
3882  if (LU.Kind != LSRUse::ICmpZero) return;
3883 
3884  // Determine the integer type for the base formula.
3885  Type *IntTy = Base.getType();
3886  if (!IntTy) return;
3887  if (SE.getTypeSizeInBits(IntTy) > 64) return;
3888 
3889  // Don't do this if there is more than one offset.
3890  if (LU.MinOffset != LU.MaxOffset) return;
3891 
3892  // Check if transformation is valid. It is illegal to multiply pointer.
3893  if (Base.ScaledReg && Base.ScaledReg->getType()->isPointerTy())
3894  return;
3895  for (const SCEV *BaseReg : Base.BaseRegs)
3896  if (BaseReg->getType()->isPointerTy())
3897  return;
3898  assert(!Base.BaseGV && "ICmpZero use is not legal!");
3899 
3900  // Check each interesting stride.
3901  for (int64_t Factor : Factors) {
3902  // Check that the multiplication doesn't overflow.
3903  if (Base.BaseOffset == std::numeric_limits<int64_t>::min() && Factor == -1)
3904  continue;
3905  int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3906  if (NewBaseOffset / Factor != Base.BaseOffset)
3907  continue;
3908  // If the offset will be truncated at this use, check that it is in bounds.
3909  if (!IntTy->isPointerTy() &&
3910  !ConstantInt::isValueValidForType(IntTy, NewBaseOffset))
3911  continue;
3912 
3913  // Check that multiplying with the use offset doesn't overflow.
3914  int64_t Offset = LU.MinOffset;
3915  if (Offset == std::numeric_limits<int64_t>::min() && Factor == -1)
3916  continue;
3917  Offset = (uint64_t)Offset * Factor;
3918  if (Offset / Factor != LU.MinOffset)
3919  continue;
3920  // If the offset will be truncated at this use, check that it is in bounds.
3921  if (!IntTy->isPointerTy() &&
3923  continue;
3924 
3925  Formula F = Base;
3926  F.BaseOffset = NewBaseOffset;
3927 
3928  // Check that this scale is legal.
3929  if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3930  continue;
3931 
3932  // Compensate for the use having MinOffset built into it.
3933  F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3934 
3935  const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3936 
3937  // Check that multiplying with each base register doesn't overflow.
3938  for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3939  F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3940  if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3941  goto next;
3942  }
3943 
3944  // Check that multiplying with the scaled register doesn't overflow.
3945  if (F.ScaledReg) {
3946  F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3947  if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3948  continue;
3949  }
3950 
3951  // Check that multiplying with the unfolded offset doesn't overflow.
3952  if (F.UnfoldedOffset != 0) {
3953  if (F.UnfoldedOffset == std::numeric_limits<int64_t>::min() &&
3954  Factor == -1)
3955  continue;
3956  F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3957  if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3958  continue;
3959  // If the offset will be truncated, check that it is in bounds.
3960  if (!IntTy->isPointerTy() &&
3961  !ConstantInt::isValueValidForType(IntTy, F.UnfoldedOffset))
3962  continue;
3963  }
3964 
3965  // If we make it here and it's legal, add it.
3966  (void)InsertFormula(LU, LUIdx, F);
3967  next:;
3968  }
3969 }
3970 
3971 /// Generate stride factor reuse formulae by making use of scaled-offset address
3972 /// modes, for example.
3973 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3974  // Determine the integer type for the base formula.
3975  Type *IntTy = Base.getType();
3976  if (!IntTy) return;
3977 
3978  // If this Formula already has a scaled register, we can't add another one.
3979  // Try to unscale the formula to generate a better scale.
3980  if (Base.Scale != 0 && !Base.unscale())
3981  return;
3982 
3983  assert(Base.Scale == 0 && "unscale did not did its job!");
3984 
3985  // Check each interesting stride.
3986  for (int64_t Factor : Factors) {
3987  Base.Scale = Factor;
3988  Base.HasBaseReg = Base.BaseRegs.size() > 1;
3989  // Check whether this scale is going to be legal.
3990  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3991  Base)) {
3992  // As a special-case, handle special out-of-loop Basic users specially.
3993  // TODO: Reconsider this special case.
3994  if (LU.Kind == LSRUse::Basic &&
3995  isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3996  LU.AccessTy, Base) &&
3997  LU.AllFixupsOutsideLoop)
3998  LU.Kind = LSRUse::Special;
3999  else
4000  continue;
4001  }
4002  // For an ICmpZero, negating a solitary base register won't lead to
4003  // new solutions.
4004  if (LU.Kind == LSRUse::ICmpZero &&
4005  !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
4006  continue;
4007  // For each addrec base reg, if its loop is current loop, apply the scale.
4008  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
4009  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i]);
4010  if (AR && (AR->getLoop() == L || LU.AllFixupsOutsideLoop)) {
4011  const SCEV *FactorS = SE.getConstant(IntTy, Factor);
4012  if (FactorS->isZero())
4013  continue;
4014  // Divide out the factor, ignoring high bits, since we'll be
4015  // scaling the value back up in the end.
4016  if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
4017  // TODO: This could be optimized to avoid all the copying.
4018  Formula F = Base;
4019  F.ScaledReg = Quotient;
4020  F.deleteBaseReg(F.BaseRegs[i]);
4021  // The canonical representation of 1*reg is reg, which is already in
4022  // Base. In that case, do not try to insert the formula, it will be
4023  // rejected anyway.
4024  if (F.Scale == 1 && (F.BaseRegs.empty() ||
4025  (AR->getLoop() != L && LU.AllFixupsOutsideLoop)))
4026  continue;
4027  // If AllFixupsOutsideLoop is true and F.Scale is 1, we may generate
4028  // non canonical Formula with ScaledReg's loop not being L.
4029  if (F.Scale == 1 && LU.AllFixupsOutsideLoop)
4030  F.canonicalize(*L);
4031  (void)InsertFormula(LU, LUIdx, F);
4032  }
4033  }
4034  }
4035  }
4036 }
4037 
4038 /// Generate reuse formulae from different IV types.
4039 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
4040  // Don't bother truncating symbolic values.
4041  if (Base.BaseGV) return;
4042 
4043  // Determine the integer type for the base formula.
4044  Type *DstTy = Base.getType();
4045  if (!DstTy) return;
4046  DstTy = SE.getEffectiveSCEVType(DstTy);
4047 
4048  for (Type *SrcTy : Types) {
4049  if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
4050  Formula F = Base;
4051 
4052  // Sometimes SCEV is able to prove zero during ext transform. It may
4053  // happen if SCEV did not do all possible transforms while creating the
4054  // initial node (maybe due to depth limitations), but it can do them while
4055  // taking ext.
4056  if (F.ScaledReg) {
4057  const SCEV *NewScaledReg = SE.getAnyExtendExpr(F.ScaledReg, SrcTy);
4058  if (NewScaledReg->isZero())
4059  continue;
4060  F.ScaledReg = NewScaledReg;
4061  }
4062  bool HasZeroBaseReg = false;
4063  for (const SCEV *&BaseReg : F.BaseRegs) {
4064  const SCEV *NewBaseReg = SE.getAnyExtendExpr(BaseReg, SrcTy);
4065  if (NewBaseReg->isZero()) {
4066  HasZeroBaseReg = true;
4067  break;
4068  }
4069  BaseReg = NewBaseReg;
4070  }
4071  if (HasZeroBaseReg)
4072  continue;
4073 
4074  // TODO: This assumes we've done basic processing on all uses and
4075  // have an idea what the register usage is.
4076  if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
4077  continue;
4078 
4079  F.canonicalize(*L);
4080  (void)InsertFormula(LU, LUIdx, F);
4081  }
4082  }
4083 }
4084 
4085 namespace {
4086 
4087 /// Helper class for GenerateCrossUseConstantOffsets. It's used to defer
4088 /// modifications so that the search phase doesn't have to worry about the data
4089 /// structures moving underneath it.
4090 struct WorkItem {
4091  size_t LUIdx;
4092  int64_t Imm;
4093  const SCEV *OrigReg;
4094 
4095  WorkItem(size_t LI, int64_t I, const SCEV *R)
4096  : LUIdx(LI), Imm(I), OrigReg(R) {}
4097 
4098  void print(raw_ostream &OS) const;
4099  void dump() const;
4100 };
4101 
4102 } // end anonymous namespace
4103 
4104 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
4105 void WorkItem::print(raw_ostream &OS) const {
4106  OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
4107  << " , add offset " << Imm;
4108 }
4109 
4110 LLVM_DUMP_METHOD void WorkItem::dump() const {
4111  print(errs()); errs() << '\n';
4112 }
4113 #endif
4114 
4115 /// Look for registers which are a constant distance apart and try to form reuse
4116 /// opportunities between them.
4117 void LSRInstance::GenerateCrossUseConstantOffsets() {
4118  // Group the registers by their value without any added constant offset.
4119  using ImmMapTy = std::map<int64_t, const SCEV *>;
4120 
4122  DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
4124  for (const SCEV *Use : RegUses) {
4125  const SCEV *Reg = Use; // Make a copy for ExtractImmediate to modify.
4126  int64_t Imm = ExtractImmediate(Reg, SE);
4127  auto Pair = Map.insert(std::make_pair(Reg, ImmMapTy()));
4128  if (Pair.second)
4129  Sequence.push_back(Reg);
4130  Pair.first->second.insert(std::make_pair(Imm, Use));
4131  UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
4132  }
4133 
4134  // Now examine each set of registers with the same base value. Build up
4135  // a list of work to do and do the work in a separate step so that we're
4136  // not adding formulae and register counts while we're searching.
4137  SmallVector<WorkItem, 32> WorkItems;
4138  SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
4139  for (const SCEV *Reg : Sequence) {
4140  const ImmMapTy &Imms = Map.find(Reg)->second;
4141 
4142  // It's not worthwhile looking for reuse if there's only one offset.
4143  if (Imms.size() == 1)
4144  continue;
4145 
4146  LLVM_DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
4147  for (const auto &Entry
4148  : Imms) dbgs()
4149  << ' ' << Entry.first;
4150  dbgs() << '\n');
4151 
4152  // Examine each offset.
4153  for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
4154  J != JE; ++J) {
4155  const SCEV *OrigReg = J->second;
4156 
4157  int64_t JImm = J->first;
4158  const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
4159 
4160  if (!isa<SCEVConstant>(OrigReg) &&
4161  UsedByIndicesMap[Reg].count() == 1) {
4162  LLVM_DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg
4163  << '\n');
4164  continue;
4165  }
4166 
4167  // Conservatively examine offsets between this orig reg a few selected
4168  // other orig regs.
4169  int64_t First = Imms.begin()->first;
4170  int64_t Last = std::prev(Imms.end())->first;
4171  // Compute (First + Last) / 2 without overflow using the fact that
4172  // First + Last = 2 * (First + Last) + (First ^ Last).
4173  int64_t Avg = (First & Last) + ((First ^ Last) >> 1);
4174  // If the result is negative and First is odd and Last even (or vice versa),
4175  // we rounded towards -inf. Add 1 in that case, to round towards 0.
4176  Avg = Avg + ((First ^ Last) & ((uint64_t)Avg >> 63));
4177  ImmMapTy::const_iterator OtherImms[] = {
4178  Imms.begin(), std::prev(Imms.end()),
4179  Imms.lower_bound(Avg)};
4180  for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
4181  ImmMapTy::const_iterator M = OtherImms[i];
4182  if (M == J || M == JE) continue;
4183 
4184  // Compute the difference between the two.
4185  int64_t Imm = (uint64_t)JImm - M->first;
4186  for (unsigned LUIdx : UsedByIndices.set_bits())
4187  // Make a memo of this use, offset, and register tuple.
4188  if (UniqueItems.insert(std::make_pair(LUIdx, Imm)).second)
4189  WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
4190  }
4191  }
4192  }
4193 
4194  Map.clear();
4195  Sequence.clear();
4196  UsedByIndicesMap.clear();
4197  UniqueItems.clear();
4198 
4199  // Now iterate through the worklist and add new formulae.
4200  for (const WorkItem &WI : WorkItems) {
4201  size_t LUIdx = WI.LUIdx;
4202  LSRUse &LU = Uses[LUIdx];
4203  int64_t Imm = WI.Imm;
4204  const SCEV *OrigReg = WI.OrigReg;
4205 
4206  Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
4207  const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
4208  unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
4209 
4210  // TODO: Use a more targeted data structure.
4211  for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
4212  Formula F = LU.Formulae[L];
4213  // FIXME: The code for the scaled and unscaled registers looks
4214  // very similar but slightly different. Investigate if they
4215  // could be merged. That way, we would not have to unscale the
4216  // Formula.
4217  F.unscale();
4218  // Use the immediate in the scaled register.
4219  if (F.ScaledReg == OrigReg) {
4220  int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
4221  // Don't create 50 + reg(-50).
4222  if (F.referencesReg(SE.getSCEV(
4223  ConstantInt::get(IntTy, -(uint64_t)Offset))))
4224  continue;
4225  Formula NewF = F;
4226  NewF.BaseOffset = Offset;
4227  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
4228  NewF))
4229  continue;
4230  NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
4231 
4232  // If the new scale is a constant in a register, and adding the constant
4233  // value to the immediate would produce a value closer to zero than the
4234  // immediate itself, then the formula isn't worthwhile.
4235  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
4236  if (C->getValue()->isNegative() != (NewF.BaseOffset < 0) &&
4237  (C->getAPInt().abs() * APInt(BitWidth, F.Scale))
4238  .ule(std::abs(NewF.BaseOffset)))
4239  continue;
4240 
4241  // OK, looks good.
4242  NewF.canonicalize(*this->L);
4243  (void)InsertFormula(LU, LUIdx, NewF);
4244  } else {
4245  // Use the immediate in a base register.
4246  for (size_t N = 0, NE = F.BaseRegs.size(); N != NE; ++N) {
4247  const SCEV *BaseReg = F.BaseRegs[N];
4248  if (BaseReg != OrigReg)
4249  continue;
4250  Formula NewF = F;
4251  NewF.BaseOffset = (uint64_t)NewF.BaseOffset + Imm;
4252  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset,
4253  LU.Kind, LU.AccessTy, NewF)) {
4254  if (AMK == TTI::AMK_PostIndexed &&
4255  mayUsePostIncMode(TTI, LU, OrigReg, this->L, SE))
4256  continue;
4257  if (!TTI.isLegalAddImmediate((uint64_t)NewF.UnfoldedOffset + Imm))
4258  continue;
4259  NewF = F;
4260  NewF.UnfoldedOffset = (uint64_t)NewF.UnfoldedOffset + Imm;
4261  }
4262  NewF.BaseRegs[N] = SE.getAddExpr(NegImmS, BaseReg);
4263 
4264  // If the new formula has a constant in a register, and adding the
4265  // constant value to the immediate would produce a value closer to
4266  // zero than the immediate itself, then the formula isn't worthwhile.
4267  for (const SCEV *NewReg : NewF.BaseRegs)
4268  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewReg))
4269  if ((C->getAPInt() + NewF.BaseOffset)
4270  .abs()
4271  .slt(std::abs(NewF.BaseOffset)) &&
4272  (C->getAPInt() + NewF.BaseOffset).countTrailingZeros() >=
4273  countTrailingZeros<uint64_t>(NewF.BaseOffset))
4274  goto skip_formula;
4275 
4276  // Ok, looks good.
4277  NewF.canonicalize(*this->L);
4278  (void)InsertFormula(LU, LUIdx, NewF);
4279  break;
4280  skip_formula:;
4281  }
4282  }
4283  }
4284  }
4285 }
4286 
4287 /// Generate formulae for each use.
4288 void
4289 LSRInstance::GenerateAllReuseFormulae() {
4290  // This is split into multiple loops so that hasRegsUsedByUsesOtherThan
4291  // queries are more precise.
4292  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4293  LSRUse &LU = Uses[LUIdx];
4294  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4295  GenerateReassociations(LU, LUIdx, LU.Formulae[i]);
4296  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4297  GenerateCombinations(LU, LUIdx, LU.Formulae[i]);
4298  }
4299  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4300  LSRUse &LU = Uses[LUIdx];
4301  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4302  GenerateSymbolicOffsets(LU, LUIdx, LU.Formulae[i]);
4303  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4304  GenerateConstantOffsets(LU, LUIdx, LU.Formulae[i]);
4305  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4306  GenerateICmpZeroScales(LU, LUIdx, LU.Formulae[i]);
4307  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4308  GenerateScales(LU, LUIdx, LU.Formulae[i]);
4309  }
4310  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4311  LSRUse &LU = Uses[LUIdx];
4312  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4313  GenerateTruncates(LU, LUIdx, LU.Formulae[i]);
4314  }
4315 
4316  GenerateCrossUseConstantOffsets();
4317 
4318  LLVM_DEBUG(dbgs() << "\n"
4319  "After generating reuse formulae:\n";
4320  print_uses(dbgs()));
4321 }
4322 
4323 /// If there are multiple formulae with the same set of registers used
4324 /// by other uses, pick the best one and delete the others.
4325 void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
4326  DenseSet<const SCEV *> VisitedRegs;
4329 #ifndef NDEBUG
4330  bool ChangedFormulae = false;
4331 #endif
4332 
4333  // Collect the best formula for each unique set of shared registers. This
4334  // is reset for each use.
4335  using BestFormulaeTy =
4336  DenseMap<SmallVector<const SCEV *, 4>, size_t, UniquifierDenseMapInfo>;
4337 
4338  BestFormulaeTy BestFormulae;
4339 
4340  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4341  LSRUse &LU = Uses[LUIdx];
4342  LLVM_DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs());
4343  dbgs() << '\n');
4344 
4345  bool Any = false;
4346  for (size_t FIdx = 0, NumForms = LU.Formulae.size();
4347  FIdx != NumForms; ++FIdx) {
4348  Formula &F = LU.Formulae[FIdx];
4349 
4350  // Some formulas are instant losers. For example, they may depend on
4351  // nonexistent AddRecs from other loops. These need to be filtered
4352  // immediately, otherwise heuristics could choose them over others leading
4353  // to an unsatisfactory solution. Passing LoserRegs into RateFormula here
4354  // avoids the need to recompute this information across formulae using the
4355  // same bad AddRec. Passing LoserRegs is also essential unless we remove
4356  // the corresponding bad register from the Regs set.
4357  Cost CostF(L, SE, TTI, AMK);
4358  Regs.clear();
4359  CostF.RateFormula(F, Regs, VisitedRegs, LU, &LoserRegs);
4360  if (CostF.isLoser()) {
4361  // During initial formula generation, undesirable formulae are generated
4362  // by uses within other loops that have some non-trivial address mode or
4363  // use the postinc form of the IV. LSR needs to provide these formulae
4364  // as the basis of rediscovering the desired formula that uses an AddRec
4365  // corresponding to the existing phi. Once all formulae have been
4366  // generated, these initial losers may be pruned.
4367  LLVM_DEBUG(dbgs() << " Filtering loser "; F.print(dbgs());
4368  dbgs() << "\n");
4369  }
4370  else {
4372  for (const SCEV *Reg : F.BaseRegs) {
4373  if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
4374  Key.push_back(Reg);
4375  }
4376  if (F.ScaledReg &&
4377  RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
4378  Key.push_back(F.ScaledReg);
4379  // Unstable sort by host order ok, because this is only used for
4380  // uniquifying.
4381  llvm::sort(Key);
4382 
4383  std::pair<BestFormulaeTy::const_iterator, bool> P =
4384  BestFormulae.insert(std::make_pair(Key, FIdx));
4385  if (P.second)
4386  continue;
4387 
4388  Formula &Best = LU.Formulae[P.first->second];
4389 
4390  Cost CostBest(L, SE, TTI, AMK);
4391  Regs.clear();
4392  CostBest.RateFormula(Best, Regs, VisitedRegs, LU);
4393  if (CostF.isLess(CostBest))
4394  std::swap(F, Best);
4395  LLVM_DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
4396  dbgs() << "\n"
4397  " in favor of formula ";
4398  Best.print(dbgs()); dbgs() << '\n');
4399  }
4400 #ifndef NDEBUG
4401  ChangedFormulae = true;
4402 #endif
4403  LU.DeleteFormula(F);
4404  --FIdx;
4405  --NumForms;
4406  Any = true;
4407  }
4408 
4409  // Now that we've filtered out some formulae, recompute the Regs set.
4410  if (Any)
4411  LU.RecomputeRegs(LUIdx, RegUses);
4412 
4413  // Reset this to prepare for the next use.
4414  BestFormulae.clear();
4415  }
4416 
4417  LLVM_DEBUG(if (ChangedFormulae) {
4418  dbgs() << "\n"
4419  "After filtering out undesirable candidates:\n";
4420  print_uses(dbgs());
4421  });
4422 }
4423 
4424 /// Estimate the worst-case number of solutions the solver might have to
4425 /// consider. It almost never considers this many solutions because it prune the
4426 /// search space, but the pruning isn't always sufficient.
4427 size_t LSRInstance::EstimateSearchSpaceComplexity() const {
4428  size_t Power = 1;
4429  for (const LSRUse &LU : Uses) {
4430  size_t FSize = LU.Formulae.size();
4431  if (FSize >= ComplexityLimit) {
4432  Power = ComplexityLimit;
4433  break;
4434  }
4435  Power *= FSize;
4436  if (Power >= ComplexityLimit)
4437  break;
4438  }
4439  return Power;
4440 }
4441 
4442 /// When one formula uses a superset of the registers of another formula, it
4443 /// won't help reduce register pressure (though it may not necessarily hurt
4444 /// register pressure); remove it to simplify the system.
4445 void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
4446  if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4447  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4448 
4449  LLVM_DEBUG(dbgs() << "Narrowing the search space by eliminating formulae "
4450  "which use a superset of registers used by other "
4451  "formulae.\n");
4452 
4453  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4454  LSRUse &LU = Uses[LUIdx];
4455  bool Any = false;
4456  for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4457  Formula &F = LU.Formulae[i];
4458  // Look for a formula with a constant or GV in a register. If the use
4459  // also has a formula with that same value in an immediate field,
4460  // delete the one that uses a register.
4462  I = F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I) {
4463  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*I)) {
4464  Formula NewF = F;
4465  //FIXME: Formulas should store bitwidth to do wrapping properly.
4466  // See PR41034.
4467  NewF.BaseOffset += (uint64_t)C->getValue()->getSExtValue();
4468  NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4469  (I - F.BaseRegs.begin()));
4470  if (LU.HasFormulaWithSameRegs(NewF)) {
4471  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4472  dbgs() << '\n');
4473  LU.DeleteFormula(F);
4474  --i;
4475  --e;
4476  Any = true;
4477  break;
4478  }
4479  } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(*I)) {
4480  if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue()))
4481  if (!F.BaseGV) {
4482  Formula NewF = F;
4483  NewF.BaseGV = GV;
4484  NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4485  (I - F.BaseRegs.begin()));
4486  if (LU.HasFormulaWithSameRegs(NewF)) {
4487  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4488  dbgs() << '\n');
4489  LU.DeleteFormula(F);
4490  --i;
4491  --e;
4492  Any = true;
4493  break;
4494  }
4495  }
4496  }
4497  }
4498  }
4499  if (Any)
4500  LU.RecomputeRegs(LUIdx, RegUses);
4501  }
4502 
4503  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4504  }
4505 }
4506 
4507 /// When there are many registers for expressions like A, A+1, A+2, etc.,
4508 /// allocate a single register for them.
4509 void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
4510  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4511  return;
4512 
4513  LLVM_DEBUG(
4514  dbgs() << "The search space is too complex.\n"
4515  "Narrowing the search space by assuming that uses separated "
4516  "by a constant offset will use the same registers.\n");
4517 
4518  // This is especially useful for unrolled loops.
4519 
4520  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4521  LSRUse &LU = Uses[LUIdx];
4522  for (const Formula &F : LU.Formulae) {
4523  if (F.BaseOffset == 0 || (F.Scale != 0 && F.Scale != 1))
4524  continue;
4525 
4526  LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU);
4527  if (!LUThatHas)
4528  continue;
4529 
4530  if (!reconcileNewOffset(*LUThatHas, F.BaseOffset, /*HasBaseReg=*/ false,
4531  LU.Kind, LU.AccessTy))
4532  continue;
4533 
4534  LLVM_DEBUG(dbgs() << " Deleting use "; LU.print(dbgs()); dbgs() << '\n');
4535 
4536  LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
4537 
4538  // Transfer the fixups of LU to LUThatHas.
4539  for (LSRFixup &Fixup : LU.Fixups) {
4540  Fixup.Offset += F.BaseOffset;
4541  LUThatHas->pushFixup(Fixup);
4542  LLVM_DEBUG(dbgs() << "New fixup has offset " << Fixup.Offset << '\n');
4543  }
4544 
4545  // Delete formulae from the new use which are no longer legal.
4546  bool Any = false;
4547  for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
4548  Formula &F = LUThatHas->Formulae[i];
4549  if (!isLegalUse(TTI, LUThatHas->MinOffset, LUThatHas->MaxOffset,
4550  LUThatHas->Kind, LUThatHas->AccessTy, F)) {
4551  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4552  LUThatHas->DeleteFormula(F);
4553  --i;
4554  --e;
4555  Any = true;
4556  }
4557  }
4558 
4559  if (Any)
4560  LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
4561 
4562  // Delete the old use.
4563  DeleteUse(LU, LUIdx);
4564  --LUIdx;
4565  --NumUses;
4566  break;
4567  }
4568  }
4569 
4570  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4571 }
4572 
4573 /// Call FilterOutUndesirableDedicatedRegisters again, if necessary, now that
4574 /// we've done more filtering, as it may be able to find more formulae to
4575 /// eliminate.
4576 void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
4577  if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4578  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4579 
4580  LLVM_DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
4581  "undesirable dedicated registers.\n");
4582 
4583  FilterOutUndesirableDedicatedRegisters();
4584 
4585  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4586  }
4587 }
4588 
4589 /// If a LSRUse has multiple formulae with the same ScaledReg and Scale.
4590 /// Pick the best one and delete the others.
4591 /// This narrowing heuristic is to keep as many formulae with different
4592 /// Scale and ScaledReg pair as possible while narrowing the search space.
4593 /// The benefit is that it is more likely to find out a better solution
4594 /// from a formulae set with more Scale and ScaledReg variations than
4595 /// a formulae set with the same Scale and ScaledReg. The picking winner
4596 /// reg heuristic will often keep the formulae with the same Scale and
4597 /// ScaledReg and filter others, and we want to avoid that if possible.
4598 void LSRInstance::NarrowSearchSpaceByFilterFormulaWithSameScaledReg() {
4599  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4600  return;
4601 
4602  LLVM_DEBUG(
4603  dbgs() << "The search space is too complex.\n"
4604  "Narrowing the search space by choosing the best Formula "
4605  "from the Formulae with the same Scale and ScaledReg.\n");
4606 
4607  // Map the "Scale * ScaledReg" pair to the best formula of current LSRUse.
4608  using BestFormulaeTy = DenseMap<std::pair<const SCEV *, int64_t>, size_t>;
4609 
4610  BestFormulaeTy BestFormulae;
4611 #ifndef NDEBUG
4612  bool ChangedFormulae = false;
4613 #endif
4614  DenseSet<const SCEV *> VisitedRegs;
4616 
4617  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4618  LSRUse &LU = Uses[LUIdx];
4619  LLVM_DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs());
4620  dbgs() << '\n');
4621 
4622  // Return true if Formula FA is better than Formula FB.
4623  auto IsBetterThan = [&](Formula &FA, Formula &FB) {
4624  // First we will try to choose the Formula with fewer new registers.
4625  // For a register used by current Formula, the more the register is
4626  // shared among LSRUses, the less we increase the register number
4627  // counter of the formula.
4628  size_t FARegNum = 0;
4629  for (const SCEV *Reg : FA.BaseRegs) {
4630  const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4631  FARegNum += (NumUses - UsedByIndices.count() + 1);
4632  }
4633  size_t FBRegNum = 0;
4634  for (const SCEV *Reg : FB.BaseRegs) {
4635  const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4636  FBRegNum += (NumUses - UsedByIndices.count() + 1);
4637  }
4638  if (FARegNum != FBRegNum)
4639  return FARegNum < FBRegNum;
4640 
4641  // If the new register numbers are the same, choose the Formula with
4642  // less Cost.
4643  Cost CostFA(L, SE, TTI, AMK);
4644  Cost CostFB(L, SE, TTI, AMK);
4645  Regs.clear();
4646  CostFA.RateFormula(FA, Regs, VisitedRegs, LU);
4647  Regs.clear();
4648  CostFB.RateFormula(FB, Regs, VisitedRegs, LU);
4649  return CostFA.isLess(CostFB);
4650  };
4651 
4652  bool Any = false;
4653  for (size_t FIdx = 0, NumForms = LU.Formulae.size(); FIdx != NumForms;
4654  ++FIdx) {
4655  Formula &F = LU.Formulae[FIdx];
4656  if (!F.ScaledReg)
4657  continue;
4658  auto P = BestFormulae.insert({{F.ScaledReg, F.Scale}, FIdx});
4659  if (P.second)
4660  continue;
4661 
4662  Formula &Best = LU.Formulae[P.first->second];
4663  if (IsBetterThan(F, Best))
4664  std::swap(F, Best);
4665  LLVM_DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
4666  dbgs() << "\n"
4667  " in favor of formula ";
4668  Best.print(dbgs()); dbgs() << '\n');
4669 #ifndef NDEBUG
4670  ChangedFormulae = true;
4671 #endif
4672  LU.DeleteFormula(F);
4673  --FIdx;
4674  --NumForms;
4675  Any = true;
4676  }
4677  if (Any)
4678  LU.RecomputeRegs(LUIdx, RegUses);
4679 
4680  // Reset this to prepare for the next use.
4681  BestFormulae.clear();
4682  }
4683 
4684  LLVM_DEBUG(if (ChangedFormulae) {
4685  dbgs() << "\n"
4686  "After filtering out undesirable candidates:\n";
4687  print_uses(dbgs());
4688  });
4689 }
4690 
4691 /// If we are over the complexity limit, filter out any post-inc prefering
4692 /// variables to only post-inc values.
4693 void LSRInstance::NarrowSearchSpaceByFilterPostInc() {
4694  if (AMK != TTI::AMK_PostIndexed)
4695  return;
4696  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4697  return;
4698 
4699  LLVM_DEBUG(dbgs() << "The search space is too complex.\n"
4700  "Narrowing the search space by choosing the lowest "
4701  "register Formula for PostInc Uses.\n");
4702 
4703  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4704  LSRUse &LU = Uses[LUIdx];
4705 
4706  if (LU.Kind != LSRUse::Address)
4707  continue;
4708  if (!TTI.isIndexedLoadLegal(TTI.MIM_PostInc, LU.AccessTy.getType()) &&
4709  !TTI.isIndexedStoreLegal(TTI.MIM_PostInc, LU.AccessTy.getType()))
4710  continue;
4711 
4712  size_t MinRegs = std::numeric_limits<size_t>::max();
4713  for (const Formula &F : LU.Formulae)
4714  MinRegs = std::min(F.getNumRegs(), MinRegs);
4715 
4716  bool Any = false;
4717  for (size_t FIdx = 0, NumForms = LU.Formulae.size(); FIdx != NumForms;
4718  ++FIdx) {
4719  Formula &F = LU.Formulae[FIdx];
4720  if (F.getNumRegs() > MinRegs) {
4721  LLVM_DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
4722  dbgs() << "\n");
4723  LU.DeleteFormula(F);
4724  --FIdx;
4725  --NumForms;
4726  Any = true;
4727  }
4728  }
4729  if (Any)
4730  LU.RecomputeRegs(LUIdx, RegUses);
4731 
4732  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4733  break;
4734  }
4735 
4736  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4737 }
4738 
4739 /// The function delete formulas with high registers number expectation.
4740 /// Assuming we don't know the value of each formula (already delete
4741 /// all inefficient), generate probability of not selecting for each
4742 /// register.
4743 /// For example,
4744 /// Use1:
4745 /// reg(a) + reg({0,+,1})
4746 /// reg(a) + reg({-1,+,1}) + 1
4747 /// reg({a,+,1})
4748 /// Use2:
4749 /// reg(b) + reg({0,+,1})
4750 /// reg(b) + reg({-1,+,1}) + 1
4751 /// reg({b,+,1})
4752 /// Use3:
4753 /// reg(c) + reg(b) + reg({0,+,1})
4754 /// reg(c) + reg({b,+,1})
4755 ///
4756 /// Probability of not selecting
4757 /// Use1 Use2 Use3
4758 /// reg(a) (1/3) * 1 * 1
4759 /// reg(b) 1 * (1/3) * (1/2)
4760 /// reg({0,+,1}) (2/3) * (2/3) * (1/2)
4761 /// reg({-1,+,1}) (2/3) * (2/3) * 1
4762 /// reg({a,+,1}) (2/3) * 1 * 1
4763 /// reg({b,+,1}) 1 * (2/3) * (2/3)
4764 /// reg(c) 1 * 1 * 0
4765 ///
4766 /// Now count registers number mathematical expectation for each formula:
4767 /// Note that for each use we exclude probability if not selecting for the use.
4768 /// For example for Use1 probability for reg(a) would be just 1 * 1 (excluding
4769 /// probabilty 1/3 of not selecting for Use1).
4770 /// Use1:
4771 /// reg(a) + reg({0,+,1}) 1 + 1/3 -- to be deleted
4772 /// reg(a) + reg({-1,+,1}) + 1 1 + 4/9 -- to be deleted
4773 /// reg({a,+,1}) 1
4774 /// Use2:
4775 /// reg(b) + reg({0,+,1}) 1/2 + 1/3 -- to be deleted
4776 /// reg(b) + reg({-1,+,1}) + 1 1/2 + 2/3 -- to be deleted
4777 /// reg({b,+,1}) 2/3
4778 /// Use3:
4779 /// reg(c) + reg(b) + reg({0,+,1}) 1 + 1/3 + 4/9 -- to be deleted
4780 /// reg(c) + reg({b,+,1}) 1 + 2/3
4781 void LSRInstance::NarrowSearchSpaceByDeletingCostlyFormulas() {
4782  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4783  return;
4784  // Ok, we have too many of formulae on our hands to conveniently handle.
4785  // Use a rough heuristic to thin out the list.
4786 
4787  // Set of Regs wich will be 100% used in final solution.
4788  // Used in each formula of a solution (in example above this is reg(c)).
4789  // We can skip them in calculations.
4791  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4792 
4793  // Map each register to probability of not selecting
4795  for (const SCEV *Reg : RegUses) {
4796  if (UniqRegs.count(Reg))
4797  continue;
4798  float PNotSel = 1;
4799  for (const LSRUse &LU : Uses) {
4800  if (!LU.Regs.count(Reg))
4801  continue;
4802  float P = LU.getNotSelectedProbability(Reg);
4803  if (P != 0.0)
4804  PNotSel *= P;
4805  else
4806  UniqRegs.insert(Reg);
4807  }
4808  RegNumMap.insert(std::make_pair(Reg, PNotSel));
4809  }
4810 
4811  LLVM_DEBUG(
4812  dbgs() << "Narrowing the search space by deleting costly formulas\n");
4813 
4814  // Delete formulas where registers number expectation is high.
4815  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4816  LSRUse &LU = Uses[LUIdx];
4817  // If nothing to delete - continue.
4818  if (LU.Formulae.size() < 2)
4819  continue;
4820  // This is temporary solution to test performance. Float should be
4821  // replaced with round independent type (based on integers) to avoid
4822  // different results for different target builds.
4823  float FMinRegNum = LU.Formulae[0].getNumRegs();
4824  float FMinARegNum = LU.Formulae[0].getNumRegs();
4825  size_t MinIdx = 0;
4826  for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4827  Formula &F = LU.Formulae[i];
4828  float FRegNum = 0;
4829  float FARegNum = 0;
4830  for (const SCEV *BaseReg : F.BaseRegs) {
4831  if (UniqRegs.count(BaseReg))
4832  continue;
4833  FRegNum += RegNumMap[BaseReg] / LU.getNotSelectedProbability(BaseReg);
4834  if (isa<SCEVAddRecExpr>(BaseReg))
4835  FARegNum +=
4836  RegNumMap[BaseReg] / LU.getNotSelectedProbability(BaseReg);
4837  }
4838  if (const SCEV *ScaledReg = F.ScaledReg) {
4839  if (!UniqRegs.count(ScaledReg)) {
4840  FRegNum +=
4841  RegNumMap[ScaledReg] / LU.getNotSelectedProbability(ScaledReg);
4842  if (isa<SCEVAddRecExpr>(ScaledReg))
4843  FARegNum +=
4844  RegNumMap[ScaledReg] / LU.getNotSelectedProbability(ScaledReg);
4845  }
4846  }
4847  if (FMinRegNum > FRegNum ||
4848  (FMinRegNum == FRegNum && FMinARegNum > FARegNum)) {
4849  FMinRegNum = FRegNum;
4850  FMinARegNum = FARegNum;
4851  MinIdx = i;
4852  }
4853  }
4854  LLVM_DEBUG(dbgs() << " The formula "; LU.Formulae[MinIdx].print(dbgs());
4855  dbgs() << " with min reg num " << FMinRegNum << '\n');
4856  if (MinIdx != 0)
4857  std::swap(LU.Formulae[MinIdx], LU.Formulae[0]);
4858  while (LU.Formulae.size() != 1) {
4859  LLVM_DEBUG(dbgs() << " Deleting "; LU.Formulae.back().print(dbgs());
4860  dbgs() << '\n');
4861  LU.Formulae.pop_back();
4862  }
4863  LU.RecomputeRegs(LUIdx, RegUses);
4864  assert(LU.Formulae.size() == 1 && "Should be exactly 1 min regs formula");
4865  Formula &F = LU.Formulae[0];
4866  LLVM_DEBUG(dbgs() << " Leaving only "; F.print(dbgs()); dbgs() << '\n');
4867  // When we choose the formula, the regs become unique.
4868  UniqRegs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
4869  if (F.ScaledReg)
4870  UniqRegs.insert(F.ScaledReg);
4871  }
4872  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4873 }
4874 
4875 /// Pick a register which seems likely to be profitable, and then in any use
4876 /// which has any reference to that register, delete all formulae which do not
4877 /// reference that register.
4878 void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
4879  // With all other options exhausted, loop until the system is simple
4880  // enough to handle.
4882  while (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4883  // Ok, we have too many of formulae on our hands to conveniently handle.
4884  // Use a rough heuristic to thin out the list.
4885  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4886 
4887  // Pick the register which is used by the most LSRUses, which is likely
4888  // to be a good reuse register candidate.
4889  const SCEV *Best = nullptr;
4890  unsigned BestNum = 0;
4891  for (const SCEV *Reg : RegUses) {
4892  if (Taken.count(Reg))
4893  continue;
4894  if (!Best) {
4895  Best = Reg;
4896  BestNum = RegUses.getUsedByIndices(Reg).count();
4897  } else {
4898  unsigned Count = RegUses.getUsedByIndices(Reg).count();
4899  if (Count > BestNum) {
4900  Best = Reg;
4901  BestNum = Count;
4902  }
4903  }
4904  }
4905  assert(Best && "Failed to find best LSRUse candidate");
4906 
4907  LLVM_DEBUG(dbgs() << "Narrowing the search space by assuming " << *Best
4908  << " will yield profitable reuse.\n");
4909  Taken.insert(Best);
4910 
4911  // In any use with formulae which references this register, delete formulae
4912  // which don't reference it.
4913  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4914  LSRUse &LU = Uses[LUIdx];
4915  if (!LU.Regs.count(Best)) continue;
4916 
4917  bool Any = false;
4918  for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4919  Formula &F = LU.Formulae[i];
4920  if (!F.referencesReg(Best)) {
4921  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4922  LU.DeleteFormula(F);
4923  --e;
4924  --i;
4925  Any = true;
4926  assert(e != 0 && "Use has no formulae left! Is Regs inconsistent?");
4927  continue;
4928  }
4929  }
4930 
4931  if (Any)
4932  LU.RecomputeRegs(LUIdx, RegUses);
4933  }
4934 
4935  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4936  }
4937 }
4938 
4939 /// If there are an extraordinary number of formulae to choose from, use some
4940 /// rough heuristics to prune down the number of formulae. This keeps the main
4941 /// solver from taking an extraordinary amount of time in some worst-case
4942 /// scenarios.
4943 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
4944  NarrowSearchSpaceByDetectingSupersets();
4945  NarrowSearchSpaceByCollapsingUnrolledCode();
4946  NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
4947  if (FilterSameScaledReg)
4948  NarrowSearchSpaceByFilterFormulaWithSameScaledReg();
4949  NarrowSearchSpaceByFilterPostInc();
4950  if (LSRExpNarrow)
4951  NarrowSearchSpaceByDeletingCostlyFormulas();
4952  else
4953  NarrowSearchSpaceByPickingWinnerRegs();
4954 }
4955 
4956 /// This is the recursive solver.
4957 void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
4958  Cost &SolutionCost,
4960  const Cost &CurCost,
4961  const SmallPtrSet<const SCEV *, 16> &CurRegs,
4962  DenseSet<const SCEV *> &VisitedRegs) const {
4963  // Some ideas:
4964  // - prune more:
4965  // - use more aggressive filtering
4966  // - sort the formula so that the most profitable solutions are found first
4967  // - sort the uses too
4968  // - search faster:
4969  // - don't compute a cost, and then compare. compare while computing a cost
4970  // and bail early.
4971  // - track register sets with SmallBitVector
4972 
4973  const LSRUse &LU = Uses[Workspace.size()];
4974 
4975  // If this use references any register that's already a part of the
4976  // in-progress solution, consider it a requirement that a formula must
4977  // reference that register in order to be considered. This prunes out
4978  // unprofitable searching.
4980  for (const SCEV *S : CurRegs)
4981  if (LU.Regs.count(S))
4982  ReqRegs.insert(S);
4983 
4985  Cost NewCost(L, SE, TTI, AMK);
4986  for (const Formula &F : LU.Formulae) {
4987  // Ignore formulae which may not be ideal in terms of register reuse of
4988  // ReqRegs. The formula should use all required registers before
4989  // introducing new ones.
4990  // This can sometimes (notably when trying to favour postinc) lead to
4991  // sub-optimial decisions. There it is best left to the cost modelling to
4992  // get correct.
4993  if (AMK != TTI::AMK_PostIndexed || LU.Kind != LSRUse::Address) {
4994  int NumReqRegsToFind = std::min(F.getNumRegs(), ReqRegs.size());
4995  for (const SCEV *Reg : ReqRegs) {
4996  if ((F.ScaledReg && F.ScaledReg == Reg) ||
4997  is_contained(F.BaseRegs, Reg)) {
4998  --NumReqRegsToFind;
4999  if (NumReqRegsToFind == 0)
5000  break;
5001  }
5002  }
5003  if (NumReqRegsToFind != 0) {
5004  // If none of the formulae satisfied the required registers, then we could
5005  // clear ReqRegs and try again. Currently, we simply give up in this case.
5006  continue;
5007  }
5008  }
5009 
5010  // Evaluate the cost of the current formula. If it's already worse than
5011  // the current best, prune the search at that point.
5012  NewCost = CurCost;
5013  NewRegs = CurRegs;
5014  NewCost.RateFormula(F, NewRegs, VisitedRegs, LU);
5015  if (NewCost.isLess(SolutionCost)) {
5016  Workspace.push_back(&F);
5017  if (Workspace.size() != Uses.size()) {
5018  SolveRecurse(Solution, SolutionCost, Workspace, NewCost,
5019  NewRegs, VisitedRegs);
5020  if (F.getNumRegs() == 1 && Workspace.size() == 1)
5021  VisitedRegs.insert(F.ScaledReg ? F.ScaledReg : F.BaseRegs[0]);
5022  } else {
5023  LLVM_DEBUG(dbgs() << "New best at "; NewCost.print(dbgs());
5024  dbgs() << ".\nRegs:\n";
5025  for (const SCEV *S : NewRegs) dbgs()
5026  << "- " << *S << "\n";
5027  dbgs() << '\n');
5028 
5029  SolutionCost = NewCost;
5030  Solution = Workspace;
5031  }
5032  Workspace.pop_back();
5033  }
5034  }
5035 }
5036 
5037 /// Choose one formula from each use. Return the results in the given Solution
5038 /// vector.
5039 void LSRInstance::Solve(SmallVectorImpl<const Formula *> &Solution) const {
5041  Cost SolutionCost(L, SE, TTI, AMK);
5042  SolutionCost.Lose();
5043  Cost CurCost(L, SE, TTI, AMK);
5045  DenseSet<const SCEV *> VisitedRegs;
5046  Workspace.reserve(Uses.size());
5047 
5048  // SolveRecurse does all the work.
5049  SolveRecurse(Solution, SolutionCost, Workspace, CurCost,
5050  CurRegs, VisitedRegs);
5051  if (Solution.empty()) {
5052  LLVM_DEBUG(dbgs() << "\nNo Satisfactory Solution\n");
5053  return;
5054  }
5055 
5056  // Ok, we've now made all our decisions.
5057  LLVM_DEBUG(dbgs() << "\n"
5058  "The chosen solution requires ";
5059  SolutionCost.print(dbgs()); dbgs() << ":\n";
5060  for (size_t i = 0, e = Uses.size(); i != e; ++i) {
5061  dbgs() << " ";
5062  Uses[i].print(dbgs());
5063  dbgs() << "\n"
5064  " ";
5065  Solution[i]->print(dbgs());
5066  dbgs() << '\n';
5067  });
5068 
5069  assert(Solution.size() == Uses.size() && "Malformed solution!");
5070 }
5071 
5072 /// Helper for AdjustInsertPositionForExpand. Climb up the dominator tree far as
5073 /// we can go while still being dominated by the input positions. This helps
5074 /// canonicalize the insert position, which encourages sharing.
5076 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
5077  const SmallVectorImpl<Instruction *> &Inputs)
5078  const {
5079  Instruction *Tentative = &*IP;
5080  while (true) {
5081  bool AllDominate = true;
5082  Instruction *BetterPos = nullptr;
5083  // Don't bother attempting to insert before a catchswitch, their basic block
5084  // cannot have other non-PHI instructions.
5085  if (isa<CatchSwitchInst>(Tentative))
5086  return IP;
5087 
5088  for (Instruction *Inst : Inputs) {
5089  if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
5090  AllDominate = false;
5091  break;
5092  }
5093  // Attempt to find an insert position in the middle of the block,
5094  // instead of at the end, so that it can be used for other expansions.
5095  if (Tentative->getParent() == Inst->getParent() &&
5096  (!BetterPos || !DT.dominates(Inst, BetterPos)))
5097  BetterPos = &*std::next(BasicBlock::iterator(Inst));
5098  }
5099  if (!AllDominate)
5100  break;
5101  if (BetterPos)
5102  IP = BetterPos->getIterator();
5103  else
5104  IP = Tentative->getIterator();
5105 
5106  const Loop *IPLoop = LI.getLoopFor(IP->getParent());
5107  unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
5108 
5109  BasicBlock *IDom;
5110  for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
5111  if (!Rung) return IP;
5112  Rung = Rung->getIDom();
5113  if (!Rung) return IP;
5114  IDom = Rung->getBlock();
5115 
5116  // Don't climb into a loop though.
5117  const Loop *IDomLoop = LI.getLoopFor(IDom);
5118  unsigned IDomDepth = IDomLoop ? IDomLoop->getLoopDepth() : 0;
5119  if (IDomDepth <= IPLoopDepth &&
5120  (IDomDepth != IPLoopDepth || IDomLoop == IPLoop))
5121  break;
5122  }
5123 
5124  Tentative = IDom->getTerminator();
5125  }
5126 
5127  return IP;
5128 }
5129 
5130 /// Determine an input position which will be dominated by the operands and
5131 /// which will dominate the result.
5133 LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
5134  const LSRFixup &LF,
5135  const LSRUse &LU,
5136  SCEVExpander &Rewriter) const {
5137  // Collect some instructions which must be dominated by the
5138  // expanding replacement. These must be dominated by any operands that
5139  // will be required in the expansion.
5141  if (Instruction *I = dyn_cast<Instruction>(LF.OperandValToReplace))
5142  Inputs.push_back(I);
5143  if (LU.Kind == LSRUse::ICmpZero)
5144  if (Instruction *I =
5145  dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
5146  Inputs.push_back(I);
5147  if (LF.PostIncLoops.count(L)) {
5148  if (LF.isUseFullyOutsideLoop(L))
5149  Inputs.push_back(L->getLoopLatch()->getTerminator());
5150  else
5151  Inputs.push_back(IVIncInsertPos);
5152  }
5153  // The expansion must also be dominated by the increment positions of any
5154  // loops it for which it is using post-inc mode.
5155  for (const Loop *PIL : LF.PostIncLoops) {
5156  if (PIL == L) continue;
5157 
5158  // Be dominated by the loop exit.
5159  SmallVector<BasicBlock *, 4> ExitingBlocks;
5160  PIL->getExitingBlocks(ExitingBlocks);
5161  if (!ExitingBlocks.empty()) {
5162  BasicBlock *BB = ExitingBlocks[0];
5163  for (unsigned i = 1, e = ExitingBlocks.size(); i != e; ++i)
5164  BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
5165  Inputs.push_back(BB->getTerminator());
5166  }
5167  }
5168 
5169  assert(!isa<PHINode>(LowestIP) && !LowestIP->isEHPad()
5170  && !isa<DbgInfoIntrinsic>(LowestIP) &&
5171  "Insertion point must be a normal instruction");
5172 
5173  // Then, climb up the immediate dominator tree as far as we can go while
5174  // still being dominated by the input positions.
5175  BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
5176 
5177  // Don't insert instructions before PHI nodes.
5178  while (isa<PHINode>(IP)) ++IP;
5179 
5180  // Ignore landingpad instructions.
5181  while (IP->isEHPad()) ++IP;
5182 
5183  // Ignore debug intrinsics.
5184  while (isa<DbgInfoIntrinsic>(IP)) ++IP;
5185 
5186  // Set IP below instructions recently inserted by SCEVExpander. This keeps the
5187  // IP consistent across expansions and allows the previously inserted
5188  // instructions to be reused by subsequent expansion.
5189  while (Rewriter.isInsertedInstruction(&*IP) && IP != LowestIP)
5190  ++IP;
5191 
5192  return IP;
5193 }
5194 
5195 /// Emit instructions for the leading candidate expression for this LSRUse (this
5196 /// is called "expanding").
5197 Value *LSRInstance::Expand(const LSRUse &LU, const LSRFixup &LF,
5198  const Formula &F, BasicBlock::iterator IP,
5200  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
5201  if (LU.RigidFormula)
5202  return LF.OperandValToReplace;
5203 
5204  // Determine an input position which will be dominated by the operands and
5205  // which will dominate the result.
5206  IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
5207  Rewriter.setInsertPoint(&*IP);
5208 
5209  // Inform the Rewriter if we have a post-increment use, so that it can
5210  // perform an advantageous expansion.
5211  Rewriter.setPostInc(LF.PostIncLoops);
5212 
5213  // This is the type that the user actually needs.
5214  Type *OpTy = LF.OperandValToReplace->getType();
5215  // This will be the type that we'll initially expand to.
5216  Type *Ty = F.getType();
5217  if (!Ty)
5218  // No type known; just expand directly to the ultimate type.
5219  Ty = OpTy;
5220  else if (SE.getEffectiveSCEVType(Ty) == SE.getEffectiveSCEVType(OpTy))
5221  // Expand directly to the ultimate type if it's the right size.
5222  Ty = OpTy;
5223  // This is the type to do integer arithmetic in.
5224  Type *IntTy = SE.getEffectiveSCEVType(Ty);
5225 
5226  // Build up a list of operands to add together to form the full base.
5228 
5229  // Expand the BaseRegs portion.
5230  for (const SCEV *Reg : F.BaseRegs) {
5231  assert(!Reg->isZero() && "Zero allocated in a base register!");
5232 
5233  // If we're expanding for a post-inc user, make the post-inc adjustment.
5234  Reg = denormalizeForPostIncUse(Reg, LF.PostIncLoops, SE);
5235  Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, nullptr)));
5236  }
5237 
5238  // Expand the ScaledReg portion.
5239  Value *ICmpScaledV = nullptr;
5240  if (F.Scale != 0) {
5241  const SCEV *ScaledS = F.ScaledReg;
5242 
5243  // If we're expanding for a post-inc user, make the post-inc adjustment.
5244  PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
5245  ScaledS = denormalizeForPostIncUse(ScaledS, Loops, SE);
5246 
5247  if (LU.Kind == LSRUse::ICmpZero) {
5248  // Expand ScaleReg as if it was part of the base regs.
5249  if (F.Scale == 1)
5250  Ops.push_back(
5251  SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr)));
5252  else {
5253  // An interesting way of "folding" with an icmp is to use a negated
5254  // scale, which we'll implement by inserting it into the other operand
5255  // of the icmp.
5256  assert(F.Scale == -1 &&
5257  "The only scale supported by ICmpZero uses is -1!");
5258  ICmpScaledV = Rewriter.expandCodeFor(ScaledS, nullptr);
5259  }
5260  } else {
5261  // Otherwise just expand the scaled register and an explicit scale,
5262  // which is expected to be matched as part of the address.
5263 
5264  // Flush the operand list to suppress SCEVExpander hoisting address modes.
5265  // Unless the addressing mode will not be folded.
5266  if (!Ops.empty() && LU.Kind == LSRUse::Address &&
5267  isAMCompletelyFolded(TTI, LU, F)) {
5268  Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), nullptr);
5269  Ops.clear();
5270  Ops.push_back(SE.getUnknown(FullV));
5271  }
5272  ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr));
5273  if (F.Scale != 1)
5274  ScaledS =
5275  SE.getMulExpr(ScaledS, SE.getConstant(ScaledS->getType(), F.Scale));
5276  Ops.push_back(ScaledS);
5277  }
5278  }
5279 
5280  // Expand the GV portion.
5281  if (F.BaseGV) {
5282  // Flush the operand list to suppress SCEVExpander hoisting.
5283  if (!Ops.empty()) {
5284  Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
5285  Ops.clear();
5286  Ops.push_back(SE.getUnknown(FullV));
5287  }
5288  Ops.push_back(SE.getUnknown(F.BaseGV));
5289  }
5290 
5291  // Flush the operand list to suppress SCEVExpander hoisting of both folded and
5292  // unfolded offsets. LSR assumes they both live next to their uses.
5293  if (!Ops.empty()) {
5294  Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
5295  Ops.clear();
5296  Ops.push_back(SE.getUnknown(FullV));
5297  }
5298 
5299  // Expand the immediate portion.
5300  int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
5301  if (Offset != 0) {